[Mesa-dev] [4.1/6] i965: Add sanity check for non-compressible texture views

Jason Ekstrand jason at jlekstrand.net
Wed Sep 7 22:28:41 UTC 2016


On Sep 7, 2016 10:24 AM, "Topi Pohjolainen" <topi.pohjolainen at gmail.com>
wrote:
>
> Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
> ---
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 34
++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> index 054c5c8..7bd4a97 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -439,6 +439,38 @@ brw_find_matching_rb(const struct gl_framebuffer *fb,
>  }
>
>  static bool

Needs to also be inline so that release builds won't complain about an
unused static function.  Other than that, looks fine to me.

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

> +brw_texture_view_sane(const struct brw_context *brw,
> +                      const struct intel_mipmap_tree *mt, unsigned
format)
> +{
> +   /* There are special cases only for lossless compression. */
> +   if (!intel_miptree_is_lossless_compressed(brw, mt))
> +      return true;
> +
> +   if
(isl_format_supports_lossless_compression(brw->intelScreen->devinfo,
> +                                                format))
> +      return true;
> +
> +   /* Logic elsewhere needs to take care to resolve the color buffer
prior
> +    * to sampling it as non-compressed.
> +    */
> +   if (mt->fast_clear_state != INTEL_FAST_CLEAR_STATE_RESOLVED)
> +      return false;
> +
> +   const struct gl_framebuffer *fb = brw->ctx.DrawBuffer;
> +   const unsigned rb_index = brw_find_matching_rb(fb, mt);
> +
> +   if (rb_index == fb->_NumColorDrawBuffers)
> +      return true;
> +
> +   /* Underlying surface is compressed but it is sampled using a format
that
> +    * the sampling engine doesn't support as compressed. Compression
must be
> +    * disabled for both sampling engine and data port in case the same
surface
> +    * is used also as render target.
> +    */
> +   return brw->draw_aux_buffer_disabled[rb_index];
> +}
> +
> +static bool
>  brw_disable_aux_surface(const struct brw_context *brw,
>                          const struct intel_mipmap_tree *mt)
>  {
> @@ -588,6 +620,8 @@ brw_update_texture_surface(struct gl_context *ctx,
>            obj->Target == GL_TEXTURE_CUBE_MAP_ARRAY)
>           view.usage |= ISL_SURF_USAGE_CUBE_BIT;
>
> +      assert(brw_texture_view_sane(brw, mt, format));
> +
>        const int flags =
>           brw_disable_aux_surface(brw, mt) ? INTEL_AUX_BUFFER_DISABLED :
0;
>        brw_emit_surface_state(brw, mt, flags, mt->target, view,
> --
> 2.5.5
>
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