[Mesa-dev] [PATCH 4/4] radeonsi: unify si_set_optimal_micro_tile_mode call sites

[Nicolai Hähnle]

For the series:

Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

On 07.09.2016 13:46, Marek Olšák wrote:
> From: Marek Olšák <marek.olsak at amd.com>
>
> There is nothing special happening in those code blocks.
> ---
>  src/gallium/drivers/radeon/r600_texture.c | 12 ++++--------
>  1 file changed, 4 insertions(+), 8 deletions(-)
>
> diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
> index e452588..41fd94b 100644
> --- a/src/gallium/drivers/radeon/r600_texture.c
> +++ b/src/gallium/drivers/radeon/r600_texture.c
> @@ -2496,24 +2496,20 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
>  		}
>
>  		/* Try to clear DCC first, otherwise try CMASK. */
>  		if (tex->dcc_offset && tex->surface.level[0].dcc_enabled) {
>  			uint32_t reset_value;
>  			bool clear_words_needed;
>
>  			if (rctx->screen->debug_flags & DBG_NO_DCC_CLEAR)
>  				continue;
>
> -			/* We can change the micro tile mode before a full clear. */
> -			if (rctx->screen->chip_class >= SI)
> -				si_set_optimal_micro_tile_mode(rctx->screen, tex);
> -
>  			if (!vi_get_fast_clear_parameters(fb->cbufs[i]->format,
>  							  color, &reset_value,
>  							  &clear_words_needed))
>  				continue;
>
>  			vi_dcc_clear_level(rctx, tex, 0, reset_value);
>
>  			if (clear_words_needed)
>  				tex->dirty_level_mask |= 1 << fb->cbufs[i]->u.tex.level;
>  			tex->separate_dcc_dirty = true;
> @@ -2526,32 +2522,32 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
>  			/* Stoney/RB+ doesn't work with CMASK fast clear. */
>  			if (rctx->family == CHIP_STONEY)
>  				continue;
>
>  			/* ensure CMASK is enabled */
>  			r600_texture_alloc_cmask_separate(rctx->screen, tex);
>  			if (tex->cmask.size == 0) {
>  				continue;
>  			}
>
> -			/* We can change the micro tile mode before a full clear. */
> -			if (rctx->screen->chip_class >= SI)
> -				si_set_optimal_micro_tile_mode(rctx->screen, tex);
> -
>  			/* Do the fast clear. */
>  			rctx->clear_buffer(&rctx->b, &tex->cmask_buffer->b.b,
>  					   tex->cmask.offset, tex->cmask.size, 0,
>  					   R600_COHERENCY_CB_META);
>
>  			tex->dirty_level_mask |= 1 << fb->cbufs[i]->u.tex.level;
>  		}
>
> +		/* We can change the micro tile mode before a full clear. */
> +		if (rctx->screen->chip_class >= SI)
> +			si_set_optimal_micro_tile_mode(rctx->screen, tex);
> +
>  		evergreen_set_clear_color(tex, fb->cbufs[i]->format, color);
>
>  		if (dirty_cbufs)
>  			*dirty_cbufs |= 1 << i;
>  		rctx->set_atom_dirty(rctx, fb_state, true);
>  		*buffers &= ~clear_bit;
>  	}
>  }
>
>  void r600_init_screen_texture_functions(struct r600_common_screen *rscreen)
>