[Mesa-dev] [PATCH 4/5] aubinator: Make gen_disasm_disassemble handle split sends

[Sirisha Gandikota]

From: Sirisha Gandikota <Sirisha.Gandikota at intel.com>

Skylake adds new SENDS and SENDSC opcodes, which should be
handled in the send-with-EOT check. Make an is_send() helper
that checks if the opcode is SEND/SENDC/SENDS/SENDSC (Ken)

Signed-off-by: Sirisha Gandikota <Sirisha.Gandikota at intel.com>
---
 src/intel/tools/disasm.c | 22 ++++++++++++++++------
 1 file changed, 16 insertions(+), 6 deletions(-)

diff --git a/src/intel/tools/disasm.c b/src/intel/tools/disasm.c
index 7e5a7cb..13e4ce2 100644
--- a/src/intel/tools/disasm.c
+++ b/src/intel/tools/disasm.c
@@ -35,12 +35,25 @@ struct gen_disasm {
     struct gen_device_info devinfo;
 };
 
+
+static bool
+is_send(uint32_t opcode)
+{
+   if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC ||
+       opcode == BRW_OPCODE_SENDS || opcode == BRW_OPCODE_SENDSC ) {
+      return true;
+   } else {
+      return false;
+   }
+}
+
 void
 gen_disasm_disassemble(struct gen_disasm *disasm, void *assembly, int start,
                        int end, FILE *out)
 {
    struct gen_device_info *devinfo = &disasm->devinfo;
    bool dump_hex = false;
+   uint32_t opcode = 0;
 
    for (int offset = start; offset < end;) {
       brw_inst *insn = assembly + offset;
@@ -74,14 +87,11 @@ gen_disasm_disassemble(struct gen_disasm *disasm, void *assembly, int start,
       brw_disassemble_inst(out, devinfo, insn, compacted);
 
       /* Simplistic, but efficient way to terminate disasm */
-      if (brw_inst_opcode(devinfo, insn) == BRW_OPCODE_SEND ||
-          brw_inst_opcode(devinfo, insn) == BRW_OPCODE_SENDC) {
-         if (brw_inst_eot(devinfo, insn))
-            break;
+      opcode = brw_inst_opcode(devinfo, insn);
+      if (opcode == 0 || (is_send(opcode) && brw_inst_eot(devinfo, insn))) {
+         break;
       }
 
-      if (brw_inst_opcode(devinfo, insn) == 0)
-         break;
    }
 }
 
-- 
2.7.4