[Mesa-dev] [PATCH 1/5] winsys/radeon: replace OUT_CS with radeon_emit

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index 612a876..9de00c2 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -195,22 +195,20 @@ radeon_drm_cs_create(struct radeon_winsys_ctx *ctx,
     cs->csc = &cs->csc1;
     cs->cst = &cs->csc2;
     cs->base.current.buf = cs->csc->buf;
     cs->base.current.max_dw = ARRAY_SIZE(cs->csc->buf);
     cs->ring_type = ring_type;
 
     p_atomic_inc(&ws->num_cs);
     return &cs->base;
 }
 
-#define OUT_CS(cs, value) (cs)->current.buf[(cs)->current.cdw++] = (value)
-
 static inline void update_reloc(struct drm_radeon_cs_reloc *reloc,
                                 enum radeon_bo_domain rd,
                                 enum radeon_bo_domain wd,
                                 unsigned priority,
                                 enum radeon_bo_domain *added_domains)
 {
     *added_domains = (rd | wd) & ~(reloc->read_domains | reloc->write_domain);
 
     reloc->read_domains |= rd;
     reloc->write_domain |= wd;
@@ -454,41 +452,41 @@ static int radeon_drm_cs_flush(struct radeon_winsys_cs *rcs,
                                struct pipe_fence_handle **fence)
 {
     struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
     struct radeon_cs_context *tmp;
 
     switch (cs->ring_type) {
     case RING_DMA:
         /* pad DMA ring to 8 DWs */
         if (cs->ws->info.chip_class <= SI) {
             while (rcs->current.cdw & 7)
-                OUT_CS(&cs->base, 0xf0000000); /* NOP packet */
+                radeon_emit(&cs->base, 0xf0000000); /* NOP packet */
         } else {
             while (rcs->current.cdw & 7)
-                OUT_CS(&cs->base, 0x00000000); /* NOP packet */
+                radeon_emit(&cs->base, 0x00000000); /* NOP packet */
         }
         break;
     case RING_GFX:
         /* pad GFX ring to 8 DWs to meet CP fetch alignment requirements
          * r6xx, requires at least 4 dw alignment to avoid a hw bug.
          */
         if (cs->ws->info.gfx_ib_pad_with_type2) {
             while (rcs->current.cdw & 7)
-                OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */
+                radeon_emit(&cs->base, 0x80000000); /* type2 nop packet */
         } else {
             while (rcs->current.cdw & 7)
-                OUT_CS(&cs->base, 0xffff1000); /* type3 nop packet */
+                radeon_emit(&cs->base, 0xffff1000); /* type3 nop packet */
         }
         break;
     case RING_UVD:
         while (rcs->current.cdw & 15)
-            OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */
+            radeon_emit(&cs->base, 0x80000000); /* type2 nop packet */
         break;
     default:
         break;
     }
 
     if (rcs->current.cdw > rcs->current.max_dw) {
        fprintf(stderr, "radeon: command stream overflowed\n");
     }
 
     if (fence) {
-- 
2.7.4