[Mesa-dev] [PATCH 08/12] winsys/amdgpu: remove unused field domains from amdgpu_cs_buffer

[Nicolai Hähnle]

From: Nicolai Hähnle <nicolai.haehnle at amd.com>

---
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 53 ++++++++++---------------------
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.h |  1 -
 2 files changed, 17 insertions(+), 37 deletions(-)

diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index 10a4416..df9859b 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -285,22 +285,23 @@ int amdgpu_lookup_buffer(struct amdgpu_cs_context *cs, struct amdgpu_winsys_bo *
           * will collide here: ^ and here:   ^,
           * meaning that we should get very few collisions in the end. */
          cs->buffer_indices_hashlist[hash] = i;
          return i;
       }
    }
    return -1;
 }
 
 static int
-amdgpu_lookup_or_add_buffer(struct amdgpu_cs_context *cs, struct amdgpu_winsys_bo *bo)
+amdgpu_lookup_or_add_buffer(struct amdgpu_cs *acs, struct amdgpu_winsys_bo *bo)
 {
+   struct amdgpu_cs_context *cs = acs->csc;
    struct amdgpu_cs_buffer *buffer;
    unsigned hash;
    int idx = amdgpu_lookup_buffer(cs, bo);
 
    if (idx >= 0)
       return idx;
 
    /* New buffer, check if the backing array is large enough. */
    if (cs->num_buffers >= cs->max_num_buffers) {
       unsigned new_max =
@@ -340,70 +341,50 @@ amdgpu_lookup_or_add_buffer(struct amdgpu_cs_context *cs, struct amdgpu_winsys_b
    memset(buffer, 0, sizeof(*buffer));
    amdgpu_winsys_bo_reference(&buffer->bo, bo);
    cs->handles[idx] = bo->bo;
    cs->flags[idx] = 0;
    p_atomic_inc(&bo->num_cs_references);
    cs->num_buffers++;
 
    hash = bo->unique_id & (ARRAY_SIZE(cs->buffer_indices_hashlist)-1);
    cs->buffer_indices_hashlist[hash] = idx;
 
-   return idx;
-}
-
-static unsigned amdgpu_add_buffer(struct amdgpu_cs *acs,
-                                 struct amdgpu_winsys_bo *bo,
-                                 enum radeon_bo_usage usage,
-                                 enum radeon_bo_domain domains,
-                                 unsigned priority,
-                                 enum radeon_bo_domain *added_domains)
-{
-   struct amdgpu_cs_context *cs = acs->csc;
-   struct amdgpu_cs_buffer *buffer;
-   int i = amdgpu_lookup_or_add_buffer(cs, bo);
-
-   assert(priority < 64);
-
-   if (i < 0) {
-      *added_domains = 0;
-      return ~0;
-   }
+   if (bo->initial_domain & RADEON_DOMAIN_VRAM)
+      acs->main.base.used_vram += bo->base.size;
+   else if (bo->initial_domain & RADEON_DOMAIN_GTT)
+      acs->main.base.used_gart += bo->base.size;
 
-   buffer = &cs->buffers[i];
-   buffer->priority_usage |= 1llu << priority;
-   buffer->usage |= usage;
-   *added_domains = domains & ~buffer->domains;
-   buffer->domains |= domains;
-   cs->flags[i] = MAX2(cs->flags[i], priority / 4);
-   return i;
+   return idx;
 }
 
 static unsigned amdgpu_cs_add_buffer(struct radeon_winsys_cs *rcs,
                                     struct pb_buffer *buf,
                                     enum radeon_bo_usage usage,
                                     enum radeon_bo_domain domains,
                                     enum radeon_bo_priority priority)
 {
    /* Don't use the "domains" parameter. Amdgpu doesn't support changing
     * the buffer placement during command submission.
     */
-   struct amdgpu_cs *cs = amdgpu_cs(rcs);
+   struct amdgpu_cs *acs = amdgpu_cs(rcs);
+   struct amdgpu_cs_context *cs = acs->csc;
    struct amdgpu_winsys_bo *bo = (struct amdgpu_winsys_bo*)buf;
-   enum radeon_bo_domain added_domains;
-   unsigned index = amdgpu_add_buffer(cs, bo, usage, bo->initial_domain,
-                                     priority, &added_domains);
+   struct amdgpu_cs_buffer *buffer;
+   int index = amdgpu_lookup_or_add_buffer(acs, bo);
 
-   if (added_domains & RADEON_DOMAIN_VRAM)
-      cs->main.base.used_vram += bo->base.size;
-   else if (added_domains & RADEON_DOMAIN_GTT)
-      cs->main.base.used_gart += bo->base.size;
+   if (index < 0)
+      return 0;
 
+   buffer = &cs->buffers[index];
+   buffer->priority_usage |= 1llu << priority;
+   buffer->usage |= usage;
+   cs->flags[index] = MAX2(cs->flags[index], priority / 4);
    return index;
 }
 
 static bool amdgpu_ib_new_buffer(struct amdgpu_winsys *ws, struct amdgpu_ib *ib)
 {
    struct pb_buffer *pb;
    uint8_t *mapped;
    unsigned buffer_size;
 
    /* Always create a buffer that is at least as large as the maximum seen IB
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
index 7455061..51753db 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
@@ -40,21 +40,20 @@ struct amdgpu_ctx {
    amdgpu_context_handle ctx;
    amdgpu_bo_handle user_fence_bo;
    uint64_t *user_fence_cpu_address_base;
    int refcount;
 };
 
 struct amdgpu_cs_buffer {
    struct amdgpu_winsys_bo *bo;
    uint64_t priority_usage;
    enum radeon_bo_usage usage;
-   enum radeon_bo_domain domains;
 };
 
 enum ib_type {
    IB_CONST_PREAMBLE = 0,
    IB_CONST = 1, /* the const IB must be first */
    IB_MAIN = 2,
    IB_NUM
 };
 
 struct amdgpu_ib {
-- 
2.7.4