[Mesa-dev] [PATCH 12/12] winsys/radeon: rename nrelocs, crelocs to max_relocs, num_relocs
Nicolai Hähnle
nhaehnle at gmail.com
Fri Sep 9 17:34:14 UTC 2016
From: Nicolai Hähnle <nicolai.haehnle at amd.com>
---
src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 48 +++++++++++++--------------
src/gallium/winsys/radeon/drm/radeon_drm_cs.h | 6 ++--
2 files changed, 27 insertions(+), 27 deletions(-)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index f0dcac0..b277379 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -118,27 +118,27 @@ static bool radeon_init_cs_context(struct radeon_cs_context *csc,
for (i = 0; i < ARRAY_SIZE(csc->reloc_indices_hashlist); i++) {
csc->reloc_indices_hashlist[i] = -1;
}
return true;
}
static void radeon_cs_context_cleanup(struct radeon_cs_context *csc)
{
unsigned i;
- for (i = 0; i < csc->crelocs; i++) {
+ for (i = 0; i < csc->num_relocs; i++) {
p_atomic_dec(&csc->relocs_bo[i].bo->num_cs_references);
radeon_bo_reference(&csc->relocs_bo[i].bo, NULL);
}
- csc->crelocs = 0;
- csc->validated_crelocs = 0;
+ csc->num_relocs = 0;
+ csc->num_validated_relocs = 0;
csc->chunks[0].length_dw = 0;
csc->chunks[1].length_dw = 0;
for (i = 0; i < ARRAY_SIZE(csc->reloc_indices_hashlist); i++) {
csc->reloc_indices_hashlist[i] = -1;
}
}
static void radeon_destroy_cs_context(struct radeon_cs_context *csc)
{
@@ -207,21 +207,21 @@ static inline void update_reloc(struct drm_radeon_cs_reloc *reloc,
int radeon_lookup_buffer(struct radeon_cs_context *csc, struct radeon_bo *bo)
{
unsigned hash = bo->handle & (ARRAY_SIZE(csc->reloc_indices_hashlist)-1);
int i = csc->reloc_indices_hashlist[hash];
/* not found or found */
if (i == -1 || csc->relocs_bo[i].bo == bo)
return i;
/* Hash collision, look for the BO in the list of relocs linearly. */
- for (i = csc->crelocs - 1; i >= 0; i--) {
+ for (i = csc->num_relocs - 1; i >= 0; i--) {
if (csc->relocs_bo[i].bo == bo) {
/* Put this reloc in the hash list.
* This will prevent additional hash collisions if there are
* several consecutive lookup_buffer calls for the same buffer.
*
* Example: Assuming buffers A,B,C collide in the hash list,
* the following sequence of relocs:
* AAAAAAAAAAABBBBBBBBBBBBBBCCCCCCCC
* will collide here: ^ and here: ^,
* meaning that we should get very few collisions in the end. */
@@ -265,50 +265,50 @@ static unsigned radeon_add_buffer(struct radeon_drm_cs *cs,
*
* This doesn't have to be done if virtual memory is enabled,
* because there is no offset patching with virtual memory.
*/
if (cs->ring_type != RING_DMA || cs->ws->info.has_virtual_memory) {
return i;
}
}
/* New relocation, check if the backing array is large enough. */
- if (csc->crelocs >= csc->nrelocs) {
+ if (csc->num_relocs >= csc->max_relocs) {
uint32_t size;
- csc->nrelocs = MAX2(csc->nrelocs + 16, (unsigned)(csc->nrelocs * 1.3));
+ csc->max_relocs = MAX2(csc->max_relocs + 16, (unsigned)(csc->max_relocs * 1.3));
- size = csc->nrelocs * sizeof(csc->relocs_bo[0]);
+ size = csc->max_relocs * sizeof(csc->relocs_bo[0]);
csc->relocs_bo = realloc(csc->relocs_bo, size);
- size = csc->nrelocs * sizeof(struct drm_radeon_cs_reloc);
+ size = csc->max_relocs * sizeof(struct drm_radeon_cs_reloc);
csc->relocs = realloc(csc->relocs, size);
csc->chunks[1].chunk_data = (uint64_t)(uintptr_t)csc->relocs;
}
/* Initialize the new relocation. */
- csc->relocs_bo[csc->crelocs].bo = NULL;
- csc->relocs_bo[csc->crelocs].priority_usage = 1llu << priority;
- radeon_bo_reference(&csc->relocs_bo[csc->crelocs].bo, bo);
+ csc->relocs_bo[csc->num_relocs].bo = NULL;
+ csc->relocs_bo[csc->num_relocs].priority_usage = 1llu << priority;
+ radeon_bo_reference(&csc->relocs_bo[csc->num_relocs].bo, bo);
p_atomic_inc(&bo->num_cs_references);
- reloc = &csc->relocs[csc->crelocs];
+ reloc = &csc->relocs[csc->num_relocs];
reloc->handle = bo->handle;
reloc->read_domains = rd;
reloc->write_domain = wd;
reloc->flags = priority / 4;
- csc->reloc_indices_hashlist[hash] = csc->crelocs;
+ csc->reloc_indices_hashlist[hash] = csc->num_relocs;
csc->chunks[1].length_dw += RELOC_DWORDS;
*added_domains = rd | wd;
- return csc->crelocs++;
+ return csc->num_relocs++;
}
static unsigned radeon_drm_cs_add_buffer(struct radeon_winsys_cs *rcs,
struct pb_buffer *buf,
enum radeon_bo_usage usage,
enum radeon_bo_domain domains,
enum radeon_bo_priority priority)
{
struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
struct radeon_bo *bo = (struct radeon_bo*)buf;
@@ -333,35 +333,35 @@ static int radeon_drm_cs_lookup_buffer(struct radeon_winsys_cs *rcs,
}
static bool radeon_drm_cs_validate(struct radeon_winsys_cs *rcs)
{
struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
bool status =
cs->base.used_gart < cs->ws->info.gart_size * 0.8 &&
cs->base.used_vram < cs->ws->info.vram_size * 0.8;
if (status) {
- cs->csc->validated_crelocs = cs->csc->crelocs;
+ cs->csc->num_validated_relocs = cs->csc->num_relocs;
} else {
/* Remove lately-added buffers. The validation failed with them
* and the CS is about to be flushed because of that. Keep only
* the already-validated buffers. */
unsigned i;
- for (i = cs->csc->validated_crelocs; i < cs->csc->crelocs; i++) {
+ for (i = cs->csc->num_validated_relocs; i < cs->csc->num_relocs; i++) {
p_atomic_dec(&cs->csc->relocs_bo[i].bo->num_cs_references);
radeon_bo_reference(&cs->csc->relocs_bo[i].bo, NULL);
}
- cs->csc->crelocs = cs->csc->validated_crelocs;
+ cs->csc->num_relocs = cs->csc->num_validated_relocs;
/* Flush if there are any relocs. Clean up otherwise. */
- if (cs->csc->crelocs) {
+ if (cs->csc->num_relocs) {
cs->flush_cs(cs->flush_data, RADEON_FLUSH_ASYNC, NULL);
} else {
radeon_cs_context_cleanup(cs->csc);
cs->base.used_vram = 0;
cs->base.used_gart = 0;
assert(cs->base.current.cdw == 0);
if (cs->base.current.cdw != 0) {
fprintf(stderr, "radeon: Unexpected error in %s.\n", __func__);
}
@@ -376,27 +376,27 @@ static bool radeon_drm_cs_check_space(struct radeon_winsys_cs *rcs, unsigned dw)
return rcs->current.max_dw - rcs->current.cdw >= dw;
}
static unsigned radeon_drm_cs_get_buffer_list(struct radeon_winsys_cs *rcs,
struct radeon_bo_list_item *list)
{
struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
int i;
if (list) {
- for (i = 0; i < cs->csc->crelocs; i++) {
+ for (i = 0; i < cs->csc->num_relocs; i++) {
list[i].bo_size = cs->csc->relocs_bo[i].bo->base.size;
list[i].vm_address = cs->csc->relocs_bo[i].bo->va;
list[i].priority_usage = cs->csc->relocs_bo[i].priority_usage;
}
}
- return cs->csc->crelocs;
+ return cs->csc->num_relocs;
}
void radeon_drm_cs_emit_ioctl_oneshot(void *job, int thread_index)
{
struct radeon_cs_context *csc = ((struct radeon_drm_cs*)job)->cst;
unsigned i;
int r;
r = drmCommandWriteRead(csc->fd, DRM_RADEON_CS,
&csc->cs, sizeof(struct drm_radeon_cs));
@@ -409,21 +409,21 @@ void radeon_drm_cs_emit_ioctl_oneshot(void *job, int thread_index)
fprintf(stderr, "radeon: The kernel rejected CS, dumping...\n");
for (i = 0; i < csc->chunks[0].length_dw; i++) {
fprintf(stderr, "0x%08X\n", csc->buf[i]);
}
} else {
fprintf(stderr, "radeon: The kernel rejected CS, "
"see dmesg for more information (%i).\n", r);
}
}
- for (i = 0; i < csc->crelocs; i++)
+ for (i = 0; i < csc->num_relocs; i++)
p_atomic_dec(&csc->relocs_bo[i].bo->num_active_ioctls);
radeon_cs_context_cleanup(csc);
}
/*
* Make sure previous submission of this cs are completed
*/
void radeon_drm_cs_sync_flush(struct radeon_winsys_cs *rcs)
{
@@ -490,27 +490,27 @@ static int radeon_drm_cs_flush(struct radeon_winsys_cs *rcs,
radeon_drm_cs_sync_flush(rcs);
/* Swap command streams. */
tmp = cs->csc;
cs->csc = cs->cst;
cs->cst = tmp;
/* If the CS is not empty or overflowed, emit it in a separate thread. */
if (cs->base.current.cdw && cs->base.current.cdw <= cs->base.current.max_dw && !debug_get_option_noop()) {
- unsigned i, crelocs;
+ unsigned i, num_relocs;
- crelocs = cs->cst->crelocs;
+ num_relocs = cs->cst->num_relocs;
cs->cst->chunks[0].length_dw = cs->base.current.cdw;
- for (i = 0; i < crelocs; i++) {
+ for (i = 0; i < num_relocs; i++) {
/* Update the number of active asynchronous CS ioctls for the buffer. */
p_atomic_inc(&cs->cst->relocs_bo[i].bo->num_active_ioctls);
}
switch (cs->ring_type) {
case RING_DMA:
cs->cst->flags[0] = 0;
cs->cst->flags[1] = RADEON_CS_RING_DMA;
cs->cst->cs.num_chunks = 3;
if (cs->ws->info.has_virtual_memory) {
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.h b/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
index 208452d..bd55548 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
@@ -37,23 +37,23 @@ struct radeon_bo_item {
struct radeon_cs_context {
uint32_t buf[16 * 1024];
int fd;
struct drm_radeon_cs cs;
struct drm_radeon_cs_chunk chunks[3];
uint64_t chunk_array[3];
uint32_t flags[2];
/* Buffers. */
- unsigned nrelocs;
- unsigned crelocs;
- unsigned validated_crelocs;
+ unsigned max_relocs;
+ unsigned num_relocs;
+ unsigned num_validated_relocs;
struct radeon_bo_item *relocs_bo;
struct drm_radeon_cs_reloc *relocs;
int reloc_indices_hashlist[4096];
};
struct radeon_drm_cs {
struct radeon_winsys_cs base;
enum ring_type ring_type;
--
2.7.4
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