[Mesa-dev] [PATCH 1/7] gallium/radeon: set new r600_resource fields correctly in other places too

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

This was missed in:

    commit 0d2e43fcb1198a6e67c85feadb1ca8c360ddc284
    Author: Marek Olšák <marek.olsak at amd.com>
    Date:   Thu Aug 18 16:30:00 2016 +0200

        gallium/radeon: derive buffer placement and flags only at initialization
---
 src/gallium/drivers/radeon/r600_texture.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 41fd94b..1dbaff7 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -490,21 +490,26 @@ static void r600_degrade_tile_mode_to_linear(struct r600_common_context *rctx,
 		}
 	}
 
 	r600_texture_discard_cmask(rctx->screen, rtex);
 	r600_texture_discard_dcc(rctx->screen, rtex);
 
 	/* Replace the structure fields of rtex. */
 	rtex->resource.b.b.bind = templ.bind;
 	pb_reference(&rtex->resource.buf, new_tex->resource.buf);
 	rtex->resource.gpu_address = new_tex->resource.gpu_address;
+	rtex->resource.vram_usage = new_tex->resource.vram_usage;
+	rtex->resource.gart_usage = new_tex->resource.gart_usage;
+	rtex->resource.bo_size = new_tex->resource.bo_size;
+	rtex->resource.bo_alignment = new_tex->resource.bo_alignment;
 	rtex->resource.domains = new_tex->resource.domains;
+	rtex->resource.flags = new_tex->resource.flags;
 	rtex->size = new_tex->size;
 	rtex->surface = new_tex->surface;
 	rtex->non_disp_tiling = new_tex->non_disp_tiling;
 	rtex->cb_color_info = new_tex->cb_color_info;
 	rtex->cmask = new_tex->cmask; /* needed even without CMASK */
 
 	assert(!rtex->htile_buffer);
 	assert(!rtex->cmask.size);
 	assert(!rtex->fmask.size);
 	assert(!rtex->dcc_offset);
@@ -1112,21 +1117,27 @@ r600_texture_create_object(struct pipe_screen *screen,
 		r600_init_resource_fields(rscreen, resource, rtex->size,
 					  rtex->surface.bo_alignment);
 
 		if (!r600_alloc_resource(rscreen, resource)) {
 			FREE(rtex);
 			return NULL;
 		}
 	} else {
 		resource->buf = buf;
 		resource->gpu_address = rscreen->ws->buffer_get_virtual_address(resource->buf);
+		resource->bo_size = buf->size;
+		resource->bo_alignment = buf->alignment;
 		resource->domains = rscreen->ws->buffer_get_initial_domain(resource->buf);
+		if (resource->domains & RADEON_DOMAIN_VRAM)
+			resource->vram_usage = buf->size;
+		else if (resource->domains & RADEON_DOMAIN_GTT)
+			resource->gart_usage = buf->size;
 	}
 
 	if (rtex->cmask.size) {
 		/* Initialize the cmask to 0xCC (= compressed state). */
 		r600_screen_clear_buffer(rscreen, &rtex->cmask_buffer->b.b,
 					 rtex->cmask.offset, rtex->cmask.size,
 					 0xCCCCCCCC, R600_COHERENCY_NONE);
 	}
 
 	/* Initialize DCC only if the texture is not being imported. */
-- 
2.7.4