[Mesa-dev] [PATCH 09/14] winsys/radeon: add slab entry structures to radeon_bo

Nicolai Hähnle nhaehnle at gmail.com
Tue Sep 13 09:56:20 UTC 2016


From: Nicolai Hähnle <nicolai.haehnle at amd.com>

Already adjust the map/unmap logic accordingly.
---
 src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 94 ++++++++++++++++++---------
 src/gallium/winsys/radeon/drm/radeon_drm_bo.h | 23 +++++--
 2 files changed, 78 insertions(+), 39 deletions(-)

diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index db92035..df6e53c 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -262,32 +262,34 @@ static void radeon_bomgr_free_va(struct radeon_drm_winsys *rws,
 out:
     pipe_mutex_unlock(rws->bo_va_mutex);
 }
 
 void radeon_bo_destroy(struct pb_buffer *_buf)
 {
     struct radeon_bo *bo = radeon_bo(_buf);
     struct radeon_drm_winsys *rws = bo->rws;
     struct drm_gem_close args;
 
+    assert(bo->handle && "must not be called for slab entries");
+
     memset(&args, 0, sizeof(args));
 
     pipe_mutex_lock(rws->bo_handles_mutex);
     util_hash_table_remove(rws->bo_handles, (void*)(uintptr_t)bo->handle);
     if (bo->flink_name) {
         util_hash_table_remove(rws->bo_names,
                                (void*)(uintptr_t)bo->flink_name);
     }
     pipe_mutex_unlock(rws->bo_handles_mutex);
 
-    if (bo->ptr)
-        os_munmap(bo->ptr, bo->base.size);
+    if (bo->u.real.ptr)
+        os_munmap(bo->u.real.ptr, bo->base.size);
 
     if (rws->info.has_virtual_memory) {
         if (rws->va_unmap_working) {
             struct drm_radeon_gem_va va;
 
             va.handle = bo->handle;
             va.vm_id = 0;
             va.operation = RADEON_VA_UNMAP;
             va.flags = RADEON_VM_PAGE_READABLE |
                        RADEON_VM_PAGE_WRITEABLE |
@@ -303,101 +305,111 @@ void radeon_bo_destroy(struct pb_buffer *_buf)
             }
 	}
 
 	radeon_bomgr_free_va(rws, bo->va, bo->base.size);
     }
 
     /* Close object. */
     args.handle = bo->handle;
     drmIoctl(rws->fd, DRM_IOCTL_GEM_CLOSE, &args);
 
-    pipe_mutex_destroy(bo->map_mutex);
+    pipe_mutex_destroy(bo->u.real.map_mutex);
 
     if (bo->initial_domain & RADEON_DOMAIN_VRAM)
         rws->allocated_vram -= align(bo->base.size, rws->info.gart_page_size);
     else if (bo->initial_domain & RADEON_DOMAIN_GTT)
         rws->allocated_gtt -= align(bo->base.size, rws->info.gart_page_size);
 
-    if (bo->map_count >= 1) {
+    if (bo->u.real.map_count >= 1) {
         if (bo->initial_domain & RADEON_DOMAIN_VRAM)
             bo->rws->mapped_vram -= bo->base.size;
         else
             bo->rws->mapped_gtt -= bo->base.size;
     }
 
     FREE(bo);
 }
 
 static void radeon_bo_destroy_or_cache(struct pb_buffer *_buf)
 {
    struct radeon_bo *bo = radeon_bo(_buf);
 
-   if (bo->use_reusable_pool)
-      pb_cache_add_buffer(&bo->cache_entry);
+    assert(bo->handle && "must not be called for slab entries");
+
+   if (bo->u.real.use_reusable_pool)
+      pb_cache_add_buffer(&bo->u.real.cache_entry);
    else
       radeon_bo_destroy(_buf);
 }
 
 void *radeon_bo_do_map(struct radeon_bo *bo)
 {
     struct drm_radeon_gem_mmap args = {0};
     void *ptr;
+    unsigned offset;
 
     /* If the buffer is created from user memory, return the user pointer. */
     if (bo->user_ptr)
         return bo->user_ptr;
 
+    if (bo->handle) {
+        offset = 0;
+    } else {
+        offset = bo->va - bo->u.slab.real->va;
+        bo = bo->u.slab.real;
+    }
+
     /* Map the buffer. */
-    pipe_mutex_lock(bo->map_mutex);
+    pipe_mutex_lock(bo->u.real.map_mutex);
     /* Return the pointer if it's already mapped. */
-    if (bo->ptr) {
-        bo->map_count++;
-        pipe_mutex_unlock(bo->map_mutex);
-        return bo->ptr;
+    if (bo->u.real.ptr) {
+        bo->u.real.map_count++;
+        pipe_mutex_unlock(bo->u.real.map_mutex);
+        return bo->u.real.ptr + offset;
     }
     args.handle = bo->handle;
     args.offset = 0;
     args.size = (uint64_t)bo->base.size;
     if (drmCommandWriteRead(bo->rws->fd,
                             DRM_RADEON_GEM_MMAP,
                             &args,
                             sizeof(args))) {
-        pipe_mutex_unlock(bo->map_mutex);
+        pipe_mutex_unlock(bo->u.real.map_mutex);
         fprintf(stderr, "radeon: gem_mmap failed: %p 0x%08X\n",
                 bo, bo->handle);
         return NULL;
     }
 
     ptr = os_mmap(0, args.size, PROT_READ|PROT_WRITE, MAP_SHARED,
                bo->rws->fd, args.addr_ptr);
     if (ptr == MAP_FAILED) {
         /* Clear the cache and try again. */
         pb_cache_release_all_buffers(&bo->rws->bo_cache);
 
         ptr = os_mmap(0, args.size, PROT_READ|PROT_WRITE, MAP_SHARED,
                       bo->rws->fd, args.addr_ptr);
         if (ptr == MAP_FAILED) {
-            pipe_mutex_unlock(bo->map_mutex);
+            pipe_mutex_unlock(bo->u.real.map_mutex);
             fprintf(stderr, "radeon: mmap failed, errno: %i\n", errno);
             return NULL;
         }
     }
-    bo->ptr = ptr;
-    bo->map_count = 1;
+    bo->u.real.ptr = ptr;
+    bo->u.real.map_count = 1;
 
     if (bo->initial_domain & RADEON_DOMAIN_VRAM)
        bo->rws->mapped_vram += bo->base.size;
     else
        bo->rws->mapped_gtt += bo->base.size;
 
-    pipe_mutex_unlock(bo->map_mutex);
-    return bo->ptr;
+    pipe_mutex_unlock(bo->u.real.map_mutex);
+    return bo->u.real.ptr + offset;
 }
 
 static void *radeon_bo_map(struct pb_buffer *buf,
                            struct radeon_winsys_cs *rcs,
                            enum pipe_transfer_usage usage)
 {
     struct radeon_bo *bo = (struct radeon_bo*)buf;
     struct radeon_drm_cs *cs = (struct radeon_drm_cs*)rcs;
 
     /* If it's not unsynchronized bo_map, flush CS if needed and then wait. */
@@ -471,41 +483,44 @@ static void *radeon_bo_map(struct pb_buffer *buf,
     return radeon_bo_do_map(bo);
 }
 
 static void radeon_bo_unmap(struct pb_buffer *_buf)
 {
     struct radeon_bo *bo = (struct radeon_bo*)_buf;
 
     if (bo->user_ptr)
         return;
 
-    pipe_mutex_lock(bo->map_mutex);
-    if (!bo->ptr) {
-        pipe_mutex_unlock(bo->map_mutex);
+    if (!bo->handle)
+        bo = bo->u.slab.real;
+
+    pipe_mutex_lock(bo->u.real.map_mutex);
+    if (!bo->u.real.ptr) {
+        pipe_mutex_unlock(bo->u.real.map_mutex);
         return; /* it's not been mapped */
     }
 
-    assert(bo->map_count);
-    if (--bo->map_count) {
-        pipe_mutex_unlock(bo->map_mutex);
+    assert(bo->u.real.map_count);
+    if (--bo->u.real.map_count) {
+        pipe_mutex_unlock(bo->u.real.map_mutex);
         return; /* it's been mapped multiple times */
     }
 
-    os_munmap(bo->ptr, bo->base.size);
-    bo->ptr = NULL;
+    os_munmap(bo->u.real.ptr, bo->base.size);
+    bo->u.real.ptr = NULL;
 
     if (bo->initial_domain & RADEON_DOMAIN_VRAM)
        bo->rws->mapped_vram -= bo->base.size;
     else
        bo->rws->mapped_gtt -= bo->base.size;
 
-    pipe_mutex_unlock(bo->map_mutex);
+    pipe_mutex_unlock(bo->u.real.map_mutex);
 }
 
 static const struct pb_vtbl radeon_bo_vtbl = {
     radeon_bo_destroy_or_cache
     /* other functions are never called */
 };
 
 #ifndef RADEON_GEM_GTT_WC
 #define RADEON_GEM_GTT_WC		(1 << 2)
 #endif
@@ -550,35 +565,37 @@ static struct radeon_bo *radeon_create_bo(struct radeon_drm_winsys *rws,
     if (drmCommandWriteRead(rws->fd, DRM_RADEON_GEM_CREATE,
                             &args, sizeof(args))) {
         fprintf(stderr, "radeon: Failed to allocate a buffer:\n");
         fprintf(stderr, "radeon:    size      : %u bytes\n", size);
         fprintf(stderr, "radeon:    alignment : %u bytes\n", alignment);
         fprintf(stderr, "radeon:    domains   : %u\n", args.initial_domain);
         fprintf(stderr, "radeon:    flags     : %u\n", args.flags);
         return NULL;
     }
 
+    assert(args.handle != 0);
+
     bo = CALLOC_STRUCT(radeon_bo);
     if (!bo)
         return NULL;
 
     pipe_reference_init(&bo->base.reference, 1);
     bo->base.alignment = alignment;
     bo->base.usage = usage;
     bo->base.size = size;
     bo->base.vtbl = &radeon_bo_vtbl;
     bo->rws = rws;
     bo->handle = args.handle;
     bo->va = 0;
     bo->initial_domain = initial_domains;
-    pipe_mutex_init(bo->map_mutex);
-    pb_cache_init_entry(&rws->bo_cache, &bo->cache_entry, &bo->base,
+    pipe_mutex_init(bo->u.real.map_mutex);
+    pb_cache_init_entry(&rws->bo_cache, &bo->u.real.cache_entry, &bo->base,
                         pb_cache_bucket);
 
     if (rws->info.has_virtual_memory) {
         struct drm_radeon_gem_va va;
         unsigned va_gap_size;
 
         va_gap_size = rws->check_vm ? MAX2(4 * alignment, 64 * 1024) : 0;
         bo->va = radeon_bomgr_find_va(rws, size + va_gap_size, alignment);
 
         va.handle = bo->handle;
@@ -659,20 +676,22 @@ static unsigned eg_tile_split_rev(unsigned eg_tile_split)
     case 4096:  return 6;
     }
 }
 
 static void radeon_bo_get_metadata(struct pb_buffer *_buf,
 				   struct radeon_bo_metadata *md)
 {
     struct radeon_bo *bo = radeon_bo(_buf);
     struct drm_radeon_gem_set_tiling args;
 
+    assert(bo->handle && "must not be called for slab entries");
+
     memset(&args, 0, sizeof(args));
 
     args.handle = bo->handle;
 
     drmCommandWriteRead(bo->rws->fd,
                         DRM_RADEON_GEM_GET_TILING,
                         &args,
                         sizeof(args));
 
     md->microtile = RADEON_LAYOUT_LINEAR;
@@ -692,20 +711,22 @@ static void radeon_bo_get_metadata(struct pb_buffer *_buf,
     md->tile_split = eg_tile_split(md->tile_split);
     md->scanout = bo->rws->gen >= DRV_SI && !(args.tiling_flags & RADEON_TILING_R600_NO_SCANOUT);
 }
 
 static void radeon_bo_set_metadata(struct pb_buffer *_buf,
                                    struct radeon_bo_metadata *md)
 {
     struct radeon_bo *bo = radeon_bo(_buf);
     struct drm_radeon_gem_set_tiling args;
 
+    assert(bo->handle && "must not be called for slab entries");
+
     memset(&args, 0, sizeof(args));
 
     os_wait_until_zero(&bo->num_active_ioctls, PIPE_TIMEOUT_INFINITE);
 
     if (md->microtile == RADEON_LAYOUT_TILED)
         args.tiling_flags |= RADEON_TILING_MICRO;
     else if (md->microtile == RADEON_LAYOUT_SQUARETILED)
         args.tiling_flags |= RADEON_TILING_MICRO_SQUARE;
 
     if (md->macrotile == RADEON_LAYOUT_TILED)
@@ -789,21 +810,21 @@ radeon_winsys_bo_create(struct radeon_winsys *rws,
                           pb_cache_bucket);
     if (!bo) {
         /* Clear the cache and try again. */
         pb_cache_release_all_buffers(&ws->bo_cache);
         bo = radeon_create_bo(ws, size, alignment, usage, domain, flags,
                               pb_cache_bucket);
         if (!bo)
             return NULL;
     }
 
-    bo->use_reusable_pool = true;
+    bo->u.real.use_reusable_pool = true;
 
     pipe_mutex_lock(ws->bo_handles_mutex);
     util_hash_table_set(ws->bo_handles, (void*)(uintptr_t)bo->handle, bo);
     pipe_mutex_unlock(ws->bo_handles_mutex);
 
     return &bo->base;
 }
 
 static struct pb_buffer *radeon_winsys_bo_from_ptr(struct radeon_winsys *rws,
                                                    void *pointer, uint64_t size)
@@ -822,33 +843,35 @@ static struct pb_buffer *radeon_winsys_bo_from_ptr(struct radeon_winsys *rws,
     args.size = align(size, ws->info.gart_page_size);
     args.flags = RADEON_GEM_USERPTR_ANONONLY |
         RADEON_GEM_USERPTR_VALIDATE |
         RADEON_GEM_USERPTR_REGISTER;
     if (drmCommandWriteRead(ws->fd, DRM_RADEON_GEM_USERPTR,
                             &args, sizeof(args))) {
         FREE(bo);
         return NULL;
     }
 
+    assert(args.handle != 0);
+
     pipe_mutex_lock(ws->bo_handles_mutex);
 
     /* Initialize it. */
     pipe_reference_init(&bo->base.reference, 1);
     bo->handle = args.handle;
     bo->base.alignment = 0;
     bo->base.size = size;
     bo->base.vtbl = &radeon_bo_vtbl;
     bo->rws = ws;
     bo->user_ptr = pointer;
     bo->va = 0;
     bo->initial_domain = RADEON_DOMAIN_GTT;
-    pipe_mutex_init(bo->map_mutex);
+    pipe_mutex_init(bo->u.real.map_mutex);
 
     util_hash_table_set(ws->bo_handles, (void*)(uintptr_t)bo->handle, bo);
 
     pipe_mutex_unlock(ws->bo_handles_mutex);
 
     if (ws->info.has_virtual_memory) {
         struct drm_radeon_gem_va va;
 
         bo->va = radeon_bomgr_find_va(ws, bo->base.size, 1 << 20);
 
@@ -956,30 +979,32 @@ static struct pb_buffer *radeon_winsys_bo_from_handle(struct radeon_winsys *rws,
          * Could check errno to determine whether the kernel is new enough, but
          * it doesn't really matter why this failed, just that it failed.
          */
         if (size == (off_t)-1) {
             FREE(bo);
             goto fail;
         }
         lseek(whandle->handle, 0, SEEK_SET);
     }
 
+    assert(handle != 0);
+
     bo->handle = handle;
 
     /* Initialize it. */
     pipe_reference_init(&bo->base.reference, 1);
     bo->base.alignment = 0;
     bo->base.size = (unsigned) size;
     bo->base.vtbl = &radeon_bo_vtbl;
     bo->rws = ws;
     bo->va = 0;
-    pipe_mutex_init(bo->map_mutex);
+    pipe_mutex_init(bo->u.real.map_mutex);
 
     if (bo->flink_name)
         util_hash_table_set(ws->bo_names, (void*)(uintptr_t)bo->flink_name, bo);
 
     util_hash_table_set(ws->bo_handles, (void*)(uintptr_t)bo->handle, bo);
 
 done:
     pipe_mutex_unlock(ws->bo_handles_mutex);
 
     if (stride)
@@ -1037,23 +1062,28 @@ fail:
 
 static bool radeon_winsys_bo_get_handle(struct pb_buffer *buffer,
                                         unsigned stride, unsigned offset,
                                         unsigned slice_size,
                                         struct winsys_handle *whandle)
 {
     struct drm_gem_flink flink;
     struct radeon_bo *bo = radeon_bo(buffer);
     struct radeon_drm_winsys *ws = bo->rws;
 
+    if (!bo->handle) {
+        offset += bo->va - bo->u.slab.real->va;
+        bo = bo->u.slab.real;
+    }
+
     memset(&flink, 0, sizeof(flink));
 
-    bo->use_reusable_pool = false;
+    bo->u.real.use_reusable_pool = false;
 
     if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) {
         if (!bo->flink_name) {
             flink.handle = bo->handle;
 
             if (ioctl(ws->fd, DRM_IOCTL_GEM_FLINK, &flink)) {
                 return false;
             }
 
             bo->flink_name = flink.name;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.h b/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
index a9f31c0..b9a4a05 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
@@ -27,37 +27,46 @@
 /*
  * Authors:
  *      Jérôme Glisse <glisse at freedesktop.org>
  *      Marek Olšák <maraeo at gmail.com>
  */
 #ifndef RADEON_DRM_BO_H
 #define RADEON_DRM_BO_H
 
 #include "radeon_drm_winsys.h"
 #include "os/os_thread.h"
+#include "pipebuffer/pb_slab.h"
 
 struct radeon_bo {
     struct pb_buffer base;
-    struct pb_cache_entry cache_entry;
+    union {
+        struct {
+            struct pb_cache_entry cache_entry;
+
+            void *ptr;
+            pipe_mutex map_mutex;
+            unsigned map_count;
+            bool use_reusable_pool;
+        } real;
+        struct {
+            struct pb_slab_entry entry;
+            struct radeon_bo *real;
+        } slab;
+    } u;
 
     struct radeon_drm_winsys *rws;
     void *user_ptr; /* from buffer_from_ptr */
 
-    void *ptr;
-    pipe_mutex map_mutex;
-    unsigned map_count;
-
-    uint32_t handle;
+    uint32_t handle; /* 0 for slab entries */
     uint32_t flink_name;
     uint64_t va;
     enum radeon_bo_domain initial_domain;
-    bool use_reusable_pool;
 
     /* how many command streams is this bo referenced in? */
     int num_cs_references;
 
     /* how many command streams, which are being emitted in a separate
      * thread, is this bo referenced in? */
     int num_active_ioctls;
 };
 
 void radeon_bo_destroy(struct pb_buffer *_buf);
-- 
2.7.4



More information about the mesa-dev mailing list