[Mesa-dev] [PATCH v3 8/9] nv50/ir: optimize ADD3(d, a, b, c) to ADD(d, c, a + b)

[Samuel Pitoiset]

This is similar to what we already do for MAD/FMA.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 284f187..6ba2af6 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -605,6 +605,14 @@ ConstantFolding::expr(Instruction *i,
          return;
       }
       break;
+   case OP_ADD3:
+      switch (i->dType) {
+      case TYPE_S32:
+      case TYPE_U32: res.data.u32 = a->data.u32 + b->data.u32; break;
+      default:
+         return;
+      }
+      break;
    case OP_POW:
       switch (i->dType) {
       case TYPE_F32: res.data.f32 = pow(a->data.f32, b->data.f32); break;
@@ -721,7 +729,8 @@ ConstantFolding::expr(Instruction *i,
 
    switch (i->op) {
    case OP_MAD:
-   case OP_FMA: {
+   case OP_FMA:
+   case OP_ADD3: {
       ImmediateValue src0, src1 = *i->getSrc(0)->asImm();
 
       // Move the immediate into position 1, where we know it might be
-- 
2.9.3