[Mesa-dev] [PATCH 3/3] i965/vec4: Always use the predicated MOV path for FIND_LIVE_CHANNEL
Jason Ekstrand
jason at jlekstrand.net
Wed Sep 14 22:09:34 UTC 2016
The old method of looking at ce0 assumed that the enabled channels are
tightly packed. There is no documentation that guarantees this, however,
so it's a bit dangerous to assume it. In any case, the predicated MOV
implementation was only 2 instructions so it's not that bad to just use
that all the time and we know for 100% sure it's correct.
Signed-off-by: Jason Ekstrand <jason at jlekstrand.net>
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 32 +++++++++++---------------------
1 file changed, 11 insertions(+), 21 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 04fca74..836d555 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -3437,28 +3437,18 @@ brw_find_live_channel(struct brw_codegen *p, struct brw_reg dst,
} else {
brw_set_default_mask_control(p, BRW_MASK_DISABLE);
- if (devinfo->gen >= 8) {
- /* In SIMD4x2 mode the first active channel index is just the
- * negation of the first bit of the mask register.
- */
- inst = brw_AND(p, brw_writemask(dst, WRITEMASK_X),
- negate(retype(brw_mask_reg(0), BRW_REGISTER_TYPE_UD)),
- brw_imm_ud(1));
-
- } else {
- /* Overwrite the destination without and with execution masking to
- * find out which of the channels is active.
- */
- brw_push_insn_state(p);
- brw_set_default_exec_size(p, BRW_EXECUTE_4);
- brw_MOV(p, brw_writemask(vec4(dst), WRITEMASK_X),
- brw_imm_ud(1));
+ /* Overwrite the destination without and with execution masking to
+ * find out which of the channels is active.
+ */
+ brw_push_insn_state(p);
+ brw_set_default_exec_size(p, BRW_EXECUTE_4);
+ brw_MOV(p, brw_writemask(vec4(dst), WRITEMASK_X),
+ brw_imm_ud(1));
- inst = brw_MOV(p, brw_writemask(vec4(dst), WRITEMASK_X),
- brw_imm_ud(0));
- brw_pop_insn_state(p);
- brw_inst_set_mask_control(devinfo, inst, BRW_MASK_ENABLE);
- }
+ inst = brw_MOV(p, brw_writemask(vec4(dst), WRITEMASK_X),
+ brw_imm_ud(0));
+ brw_pop_insn_state(p);
+ brw_inst_set_mask_control(devinfo, inst, BRW_MASK_ENABLE);
}
brw_pop_insn_state(p);
--
2.5.0.400.gff86faf
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