[Mesa-dev] [PATCH 8/9] squash! [rfc] radeonsi: enable 64-bit integer support.

Nicolai Hähnle nhaehnle at gmail.com
Fri Sep 16 13:48:40 UTC 2016


From: Nicolai Hähnle <nicolai.haehnle at amd.com>

- PIPE_CAP_INT64 is not there yet
- emit DIV/MOD without the divide-by-zero workaround
---
 src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 5 +++++
 src/gallium/drivers/radeonsi/si_pipe.c              | 1 -
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
index 9216143..bcb3143 100644
--- a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
+++ b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
@@ -2063,20 +2063,25 @@ void radeon_llvm_context_init(struct radeon_llvm_context *ctx, const char *tripl
 	bld_base->op_actions[TGSI_OPCODE_U64SNE].emit = emit_icmp;
 	bld_base->op_actions[TGSI_OPCODE_U64SGE].emit = emit_icmp;
 	bld_base->op_actions[TGSI_OPCODE_U64SLT].emit = emit_icmp;
 	bld_base->op_actions[TGSI_OPCODE_I64SGE].emit = emit_icmp;
 	bld_base->op_actions[TGSI_OPCODE_I64SLT].emit = emit_icmp;
 
 	bld_base->op_actions[TGSI_OPCODE_U64ADD].emit = emit_uadd;
 	bld_base->op_actions[TGSI_OPCODE_U64SHL].emit = emit_shl;
 	bld_base->op_actions[TGSI_OPCODE_U64SHR].emit = emit_ushr;
 	bld_base->op_actions[TGSI_OPCODE_I64SHR].emit = emit_ishr;
+
+	bld_base->op_actions[TGSI_OPCODE_U64MOD].emit = emit_umod;
+	bld_base->op_actions[TGSI_OPCODE_I64MOD].emit = emit_mod;
+	bld_base->op_actions[TGSI_OPCODE_U64DIV].emit = emit_udiv;
+	bld_base->op_actions[TGSI_OPCODE_I64DIV].emit = emit_idiv;
 }
 
 void radeon_llvm_create_func(struct radeon_llvm_context *ctx,
 			     LLVMTypeRef *return_types, unsigned num_return_elems,
 			     LLVMTypeRef *ParamTypes, unsigned ParamCount)
 {
 	LLVMTypeRef main_fn_type, ret_type;
 	LLVMBasicBlockRef main_fn_body;
 
 	if (num_return_elems)
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index ca930fe..8f9e6f5 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -393,21 +393,20 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 	case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 	case PIPE_CAP_QUERY_MEMORY_INFO:
 	case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 	case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 	case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 	case PIPE_CAP_GENERATE_MIPMAP:
 	case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 	case PIPE_CAP_STRING_MARKER:
 	case PIPE_CAP_CLEAR_TEXTURE:
 	case PIPE_CAP_CULL_DISTANCE:
-	case PIPE_CAP_INT64:
 		return 1;
 
 	case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 		return !SI_BIG_ENDIAN && sscreen->b.info.has_userptr;
 
 	case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 		return (sscreen->b.info.drm_major == 2 &&
 			sscreen->b.info.drm_minor >= 43) ||
 		       sscreen->b.info.drm_major == 3;
 
-- 
2.7.4



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