[Mesa-dev] [PATCH] nvc0/ir: fix comments about instructions info

Ilia Mirkin imirkin at alum.mit.edu
Sat Sep 17 15:12:19 UTC 2016


Acked-by: Ilia Mirkin <imirkin at alum.mit.edu>

I didn't double-check the bits, but those sound right, and the number
of bits set now matches up to the number of instructions in the
comments.

On Tue, Sep 13, 2016 at 1:37 PM, Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
> The comment for the commutative flags was wrong because OP_MUL is
> before OP_MAD. While we are at it add missing opcodes, and fix
> the comment about the short forms.
>
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
>  src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
> index f5981de..f75e395 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
> @@ -156,13 +156,14 @@ void TargetNVC0::initOpInfo()
>
>     static const uint32_t commutative[(OP_LAST + 31) / 32] =
>     {
> -      // ADD, MAD, MUL, AND, OR, XOR, MAX, MIN
> +      // ADD, MUL, MAD, FMA, AND, OR, XOR, MAX, MIN, SET_AND, SET_OR, SET_XOR,
> +      // SET, SELP, SLCT
>        0x0670ca00, 0x0000003f, 0x00000000, 0x00000000
>     };
>
>     static const uint32_t shortForm[(OP_LAST + 31) / 32] =
>     {
> -      // ADD, MAD, MUL, AND, OR, XOR, PRESIN, PREEX2, SFN, CVT, PINTERP, MOV
> +      // ADD, MUL, MAD, FMA, AND, OR, XOR, MAX, MIN
>        0x0670ca00, 0x00000000, 0x00000000, 0x00000000
>     };
>
> --
> 2.9.3
>
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