[Mesa-dev] [PATCH 3/6] nv50/ir: optimize IMAD to SHLADD in presence of power of 2

[Samuel Pitoiset]

Only and only if src1 is a power of 2 we can replace IMAD by SHLADD.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 74a5a85..336f407 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -915,6 +915,7 @@ ConstantFolding::opnd3(Instruction *i, ImmediateValue &imm2)
 void
 ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
 {
+   const Target *target = prog->getTarget();
    const int t = !s;
    const operation op = i->op;
    Instruction *newi = i;
@@ -1016,6 +1017,18 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
          i->src(1).mod = i->src(2).mod;
          i->setSrc(2, NULL);
          i->op = OP_ADD;
+      } else
+      if (s == 1 && imm0.isPow2() && target->isOpSupported(i->op, i->dType)) {
+         int32_t v;
+         switch (i->dType) {
+         case TYPE_S32: v = util_last_bit_signed(imm0.reg.data.s32) - 1; break;
+         case TYPE_U32: v = util_last_bit(imm0.reg.data.u32) - 1; break;
+         default:
+            return;
+         }
+         bld.setPosition(i, false);
+         i->op = OP_SHLADD;
+         i->setSrc(1, bld.mkImm(v));
       }
       break;
    case OP_ADD:
-- 
2.10.0