[Mesa-dev] [PATCH 1/3] isl: Only allow Y-tiling for ASTC textures

[Nanley Chery]

Signed-off-by: Nanley Chery <nanley.g.chery at intel.com>
---
 src/intel/isl/isl_gen7.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/intel/isl/isl_gen7.c b/src/intel/isl/isl_gen7.c
index 4f1cc9d..36a3401 100644
--- a/src/intel/isl/isl_gen7.c
+++ b/src/intel/isl/isl_gen7.c
@@ -231,6 +231,12 @@ gen6_filter_tiling(const struct isl_device *dev,
       *flags &= ~ISL_TILING_W_BIT;
    }
 
+   /* From the SKL+ PRMs, RENDER_SURFACE_STATE:TileMode,
+    *    If Surface Format is ASTC*, this field must be TILEMODE_YMAJOR.
+    */
+   if (isl_format_get_layout(info->format)->txc == ISL_TXC_ASTC)
+      *flags &= ISL_TILING_Y0_BIT;
+
    /* The HiZ format and tiling always go together */
    if (info->format == ISL_FORMAT_HIZ) {
       *flags &= ISL_TILING_HIZ_BIT;
-- 
2.10.0