[Mesa-dev] [llvm] r282237 - [InstCombine] Fix for PR29124: reduce insertelements to shufflevector

[Alexey Bataev]

Hello Michael,
Will look at it ASAP

Best regards,
Alexey Bataev

> 26 сент. 2016 г., в 10:07, Michel Dänzer <michel at daenzer.net> написал(а):
> 
> 
> Hi Alexey,
> 
> 
>> On 23/09/16 06:14 PM, Alexey Bataev via llvm-commits wrote:
>> Author: abataev
>> Date: Fri Sep 23 04:14:08 2016
>> New Revision: 282237
>> 
>> URL: http://llvm.org/viewvc/llvm-project?rev=282237&view=rev
>> Log:
>> [InstCombine] Fix for PR29124: reduce insertelements to shufflevector
> 
> This change introduced failures with the Mesa llvmpipe driver unit test
> lp_test_format. See below for information about the CPU, and the
> attachment for the IR and results of the failing sub-tests. Let me know
> if you need more information.
> 
> 
> processor    : 0
> vendor_id    : AuthenticAMD
> cpu family    : 21
> model        : 48
> model name    : AMD A10-7850K Radeon R7, 12 Compute Cores 4C+8G
> stepping    : 1
> microcode    : 0x6003106
> cpu MHz        : 4100.000
> cache size    : 2048 KB
> physical id    : 0
> siblings    : 4
> core id        : 0
> cpu cores    : 2
> apicid        : 16
> initial apicid    : 0
> fpu        : yes
> fpu_exception    : yes
> cpuid level    : 13
> wp        : yes
> flags        : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
> pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt
> pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc extd_apicid
> aperfmperf eagerfpu pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2
> popcnt aes xsave avx f16c lahf_lm cmp_legacy svm extapic cr8_legacy abm
> sse4a misalignsse 3dnowprefetch osvw ibs xop skinit wdt lwp fma4 tce
> nodeid_msr tbm topoext perfctr_core perfctr_nb bpext arat cpb hw_pstate
> npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid
> decodeassists pausefilter pfthreshold vmmcall fsgsbase bmi1 xsaveopt
> bugs        : fxsave_leak sysret_ss_attrs
> bogomips    : 8200.55
> TLB size    : 1536 4K pages
> clflush size    : 64
> cache_alignment    : 64
> address sizes    : 48 bits physical, 48 bits virtual
> power management: ts ttp tm 100mhzsteps hwpstate cpb eff_freq_ro [13]
> 
> 
> -- 
> Earthling Michel Dänzer               |               http://www.amd.com
> Libre software enthusiast             |             Mesa and X developer
> <lp_test_format.txt>