[Mesa-dev] [PATCH v3 5/8] intel/isl: Handle HiZ and CCS tiling more directly

Jason Ekstrand jason at jlekstrand.net
Tue Sep 27 16:22:02 UTC 2016


The HiZ and CCS tiling formats are always used for HiZ and CCS surfaces
respectively.  There's no reason why we should go through filter_tiling and
it's much easier to always get HiZ and CCS right if we just handle them
directly.

Signed-off-by: Jason Ekstrand <jason at jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Chad Versace <chadversary at chromium.org>
Reviewed-by: Nanley Chery <nanley.g.chery at intel.com>
---
 src/intel/isl/isl.c      | 18 ++++++++++++++++--
 src/intel/isl/isl_gen7.c | 14 --------------
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 33d7079..ee5330e 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -226,6 +226,22 @@ isl_surf_choose_tiling(const struct isl_device *dev,
 {
    isl_tiling_flags_t tiling_flags = info->tiling_flags;
 
+   /* HiZ surfaces always use the HiZ tiling */
+   if (info->usage & ISL_SURF_USAGE_HIZ_BIT) {
+      assert(info->format == ISL_FORMAT_HIZ);
+      assert(tiling_flags == ISL_TILING_HIZ_BIT);
+      *tiling = ISL_TILING_HIZ;
+      return true;
+   }
+
+   /* CCS surfaces always use the CCS tiling */
+   if (info->usage & ISL_SURF_USAGE_CCS_BIT) {
+      assert(isl_format_get_layout(info->format)->txc == ISL_TXC_CCS);
+      assert(tiling_flags == ISL_TILING_CCS_BIT);
+      *tiling = ISL_TILING_CCS;
+      return true;
+   }
+
    if (ISL_DEV_GEN(dev) >= 7) {
       gen7_filter_tiling(dev, info, &tiling_flags);
    } else {
@@ -254,8 +270,6 @@ isl_surf_choose_tiling(const struct isl_device *dev,
       CHOOSE(ISL_TILING_LINEAR);
    }
 
-   CHOOSE(ISL_TILING_CCS);
-   CHOOSE(ISL_TILING_HIZ);
    CHOOSE(ISL_TILING_Ys);
    CHOOSE(ISL_TILING_Yf);
    CHOOSE(ISL_TILING_Y0);
diff --git a/src/intel/isl/isl_gen7.c b/src/intel/isl/isl_gen7.c
index 7b40291..316b51b 100644
--- a/src/intel/isl/isl_gen7.c
+++ b/src/intel/isl/isl_gen7.c
@@ -217,24 +217,10 @@ gen7_filter_tiling(const struct isl_device *dev,
       *flags &= ~ISL_TILING_W_BIT;
    }
 
-   /* The HiZ format and tiling always go together */
-   if (info->format == ISL_FORMAT_HIZ) {
-      *flags &= ISL_TILING_HIZ_BIT;
-   } else {
-      *flags &= ~ISL_TILING_HIZ_BIT;
-   }
-
    /* MCS buffers are always Y-tiled */
    if (isl_format_get_layout(info->format)->txc == ISL_TXC_MCS)
       *flags &= ISL_TILING_Y0_BIT;
 
-   /* The CCS formats and tiling always go together */
-   if (isl_format_get_layout(info->format)->txc == ISL_TXC_CCS) {
-      *flags &= ISL_TILING_CCS_BIT;
-   } else {
-      *flags &= ~ISL_TILING_CCS_BIT;
-   }
-
    if (info->usage & (ISL_SURF_USAGE_DISPLAY_ROTATE_90_BIT |
                       ISL_SURF_USAGE_DISPLAY_ROTATE_180_BIT |
                       ISL_SURF_USAGE_DISPLAY_ROTATE_270_BIT)) {
-- 
2.5.0.400.gff86faf



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