[Mesa-dev] [PATCH 2/6] gallium/radeon: use the new parent/child pools for transfers

Nicolai Hähnle nhaehnle at gmail.com
Tue Sep 27 18:21:16 UTC 2016


From: Nicolai Hähnle <nicolai.haehnle at amd.com>

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97894
---
 src/gallium/drivers/radeon/r600_buffer_common.c | 4 ++--
 src/gallium/drivers/radeon/r600_pipe_common.c   | 9 ++++++---
 src/gallium/drivers/radeon/r600_pipe_common.h   | 4 +++-
 3 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c
index 2e8b6f4..6f5018f 100644
--- a/src/gallium/drivers/radeon/r600_buffer_common.c
+++ b/src/gallium/drivers/radeon/r600_buffer_common.c
@@ -276,21 +276,21 @@ void r600_invalidate_resource(struct pipe_context *ctx,
 static void *r600_buffer_get_transfer(struct pipe_context *ctx,
 				      struct pipe_resource *resource,
                                       unsigned level,
                                       unsigned usage,
                                       const struct pipe_box *box,
 				      struct pipe_transfer **ptransfer,
 				      void *data, struct r600_resource *staging,
 				      unsigned offset)
 {
 	struct r600_common_context *rctx = (struct r600_common_context*)ctx;
-	struct r600_transfer *transfer = slab_alloc_st(&rctx->pool_transfers);
+	struct r600_transfer *transfer = slab_alloc(&rctx->pool_transfers);
 
 	transfer->transfer.resource = resource;
 	transfer->transfer.level = level;
 	transfer->transfer.usage = usage;
 	transfer->transfer.box = *box;
 	transfer->transfer.stride = 0;
 	transfer->transfer.layer_stride = 0;
 	transfer->offset = offset;
 	transfer->staging = staging;
 	*ptransfer = &transfer->transfer;
@@ -461,21 +461,21 @@ static void r600_buffer_transfer_unmap(struct pipe_context *ctx,
 	struct r600_common_context *rctx = (struct r600_common_context*)ctx;
 	struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
 
 	if (transfer->usage & PIPE_TRANSFER_WRITE &&
 	    !(transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT))
 		r600_buffer_do_flush_region(ctx, transfer, &transfer->box);
 
 	if (rtransfer->staging)
 		r600_resource_reference(&rtransfer->staging, NULL);
 
-	slab_free_st(&rctx->pool_transfers, transfer);
+	slab_free(&rctx->pool_transfers, transfer);
 }
 
 void r600_buffer_subdata(struct pipe_context *ctx,
 			 struct pipe_resource *buffer,
 			 unsigned usage, unsigned offset,
 			 unsigned size, const void *data)
 {
 	struct pipe_transfer *transfer = NULL;
 	struct pipe_box box;
 	uint8_t *map = NULL;
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index b0d9813..b35f0bb 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -424,22 +424,21 @@ static void r600_set_debug_callback(struct pipe_context *ctx,
 	if (cb)
 		rctx->debug = *cb;
 	else
 		memset(&rctx->debug, 0, sizeof(rctx->debug));
 }
 
 bool r600_common_context_init(struct r600_common_context *rctx,
 			      struct r600_common_screen *rscreen,
 			      unsigned context_flags)
 {
-	slab_create(&rctx->pool_transfers,
-			 sizeof(struct r600_transfer), 64);
+	slab_create_child(&rctx->pool_transfers, &rscreen->pool_transfers);
 
 	rctx->screen = rscreen;
 	rctx->ws = rscreen->ws;
 	rctx->family = rscreen->family;
 	rctx->chip_class = rscreen->chip_class;
 
 	if (rscreen->chip_class >= CIK)
 		rctx->max_db = MAX2(8, rscreen->info.num_render_backends);
 	else if (rscreen->chip_class >= EVERGREEN)
 		rctx->max_db = 8;
@@ -525,21 +524,21 @@ void r600_common_context_cleanup(struct r600_common_context *rctx)
 		rctx->ws->cs_destroy(rctx->gfx.cs);
 	if (rctx->dma.cs)
 		rctx->ws->cs_destroy(rctx->dma.cs);
 	if (rctx->ctx)
 		rctx->ws->ctx_destroy(rctx->ctx);
 
 	if (rctx->uploader) {
 		u_upload_destroy(rctx->uploader);
 	}
 
-	slab_destroy(&rctx->pool_transfers);
+	slab_destroy_child(&rctx->pool_transfers);
 
 	if (rctx->allocator_zeroed_memory) {
 		u_suballocator_destroy(rctx->allocator_zeroed_memory);
 	}
 	rctx->ws->fence_reference(&rctx->last_gfx_fence, NULL);
 	rctx->ws->fence_reference(&rctx->last_sdma_fence, NULL);
 }
 
 void r600_context_add_resource_size(struct pipe_context *ctx, struct pipe_resource *r)
 {
@@ -1137,20 +1136,22 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
 	}
 
 	r600_init_screen_texture_functions(rscreen);
 	r600_init_screen_query_functions(rscreen);
 
 	rscreen->ws = ws;
 	rscreen->family = rscreen->info.family;
 	rscreen->chip_class = rscreen->info.chip_class;
 	rscreen->debug_flags = debug_get_flags_option("R600_DEBUG", common_debug_options, 0);
 
+	slab_create_parent(&rscreen->pool_transfers, sizeof(struct r600_transfer), 64);
+
 	rscreen->force_aniso = MIN2(16, debug_get_num_option("R600_TEX_ANISO", -1));
 	if (rscreen->force_aniso >= 0) {
 		printf("radeon: Forcing anisotropy filter to %ix\n",
 		       /* round down to a power of two */
 		       1 << util_logbase2(rscreen->force_aniso));
 	}
 
 	util_format_s3tc_init();
 	pipe_mutex_init(rscreen->aux_context_lock);
 	pipe_mutex_init(rscreen->gpu_load_mutex);
@@ -1196,20 +1197,22 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
 
 void r600_destroy_common_screen(struct r600_common_screen *rscreen)
 {
 	r600_perfcounters_destroy(rscreen);
 	r600_gpu_load_kill_thread(rscreen);
 
 	pipe_mutex_destroy(rscreen->gpu_load_mutex);
 	pipe_mutex_destroy(rscreen->aux_context_lock);
 	rscreen->aux_context->destroy(rscreen->aux_context);
 
+	slab_destroy_parent(&rscreen->pool_transfers);
+
 	rscreen->ws->destroy(rscreen->ws);
 	FREE(rscreen);
 }
 
 bool r600_can_dump_shader(struct r600_common_screen *rscreen,
 			  unsigned processor)
 {
 	switch (processor) {
 	case PIPE_SHADER_VERTEX:
 		return (rscreen->debug_flags & DBG_VS) != 0;
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index d9f22e4..41561cf 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -360,20 +360,22 @@ struct r600_surface {
 struct r600_common_screen {
 	struct pipe_screen		b;
 	struct radeon_winsys		*ws;
 	enum radeon_family		family;
 	enum chip_class			chip_class;
 	struct radeon_info		info;
 	uint64_t			debug_flags;
 	bool				has_cp_dma;
 	bool				has_streamout;
 
+	struct slab_parent_pool		pool_transfers;
+
 	/* Texture filter settings. */
 	int				force_aniso; /* -1 = disabled */
 
 	/* Auxiliary context. Mainly used to initialize resources.
 	 * It must be locked prior to using and flushed before unlocking. */
 	struct pipe_context		*aux_context;
 	pipe_mutex			aux_context_lock;
 
 	/* This must be in the screen, because UE4 uses one context for
 	 * compilation and another one for rendering.
@@ -520,21 +522,21 @@ struct r600_common_context {
 	struct pipe_fence_handle	*last_sdma_fence;
 	unsigned			num_gfx_cs_flushes;
 	unsigned			initial_gfx_cs_size;
 	unsigned			gpu_reset_counter;
 	unsigned			last_dirty_fb_counter;
 	unsigned			last_compressed_colortex_counter;
 	unsigned			last_dirty_tex_descriptor_counter;
 
 	struct u_upload_mgr		*uploader;
 	struct u_suballocator		*allocator_zeroed_memory;
-	struct slab_mempool	pool_transfers;
+	struct slab_child_pool		pool_transfers;
 
 	/* Current unaccounted memory usage. */
 	uint64_t			vram;
 	uint64_t			gtt;
 
 	/* States. */
 	struct r600_streamout		streamout;
 	struct r600_scissors		scissors;
 	struct r600_viewports		viewports;
 	bool				scissor_enabled;
-- 
2.7.4



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