[Mesa-dev] [PATCH 3/3] radeonsi: use i32_0 and i32_1 more

Marek Olšák maraeo at gmail.com
Mon Apr 3 00:01:36 UTC 2017


From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeonsi/si_shader.c | 32 ++++++++++++++++----------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index e514d61..21efd9a 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -794,21 +794,21 @@ static LLVMValueRef get_tcs_tes_buffer_address_from_reg(
 		if (reg.Indirect.ArrayID)
 			param_base = array_first[reg.Indirect.ArrayID];
 		else
 			param_base = reg.Register.Index;
 
 		param_index = get_indirect_index(ctx, &reg.Indirect,
 		                                 reg.Register.Index - param_base);
 
 	} else {
 		param_base = reg.Register.Index;
-		param_index = LLVMConstInt(ctx->i32, 0, 0);
+		param_index = ctx->i32_0;
 	}
 
 	param_index_base = si_shader_io_get_unique_index(name[param_base],
 	                                                 index[param_base]);
 
 	param_index = LLVMBuildAdd(gallivm->builder, param_index,
 	                           LLVMConstInt(ctx->i32, param_index_base, 0),
 	                           "");
 
 	return get_tcs_tes_buffer_address(ctx, get_rel_patch_id(ctx),
@@ -876,21 +876,21 @@ static LLVMValueRef lds_load(struct lp_build_tgsi_context *bld_base,
 					      TGSI_NUM_CHANNELS);
 	}
 
 	dw_addr = lp_build_add(&bld_base->uint_bld, dw_addr,
 			    LLVMConstInt(ctx->i32, swizzle, 0));
 
 	value = ac_build_indexed_load(&ctx->ac, ctx->lds, dw_addr, false);
 	if (tgsi_type_is_64bit(type)) {
 		LLVMValueRef value2;
 		dw_addr = lp_build_add(&bld_base->uint_bld, dw_addr,
-				       LLVMConstInt(ctx->i32, 1, 0));
+				       ctx->i32_1);
 		value2 = ac_build_indexed_load(&ctx->ac, ctx->lds, dw_addr, false);
 		return si_llvm_emit_fetch_64bit(bld_base, type, value, value2);
 	}
 
 	return LLVMBuildBitCast(gallivm->builder, value,
 				tgsi2llvmtype(bld_base, type), "");
 }
 
 /**
  * Store to LDS.
@@ -1864,21 +1864,21 @@ static void si_llvm_init_export_args(struct lp_build_tgsi_context *bld_base,
 				  si_llvm_pack_two_int16(ctx, val+2));
 		break;
 	}
 
 	case V_028714_SPI_SHADER_SINT16_ABGR: {
 		LLVMValueRef max_rgb = LLVMConstInt(ctx->i32,
 			is_int8 ? 127 : is_int10 ? 511 : 32767, 0);
 		LLVMValueRef min_rgb = LLVMConstInt(ctx->i32,
 			is_int8 ? -128 : is_int10 ? -512 : -32768, 0);
 		LLVMValueRef max_alpha =
-			!is_int10 ? max_rgb : LLVMConstInt(ctx->i32, 1, 0);
+			!is_int10 ? max_rgb : ctx->i32_1;
 		LLVMValueRef min_alpha =
 			!is_int10 ? min_rgb : LLVMConstInt(ctx->i32, -2, 0);
 
 		/* Clamp. */
 		for (chan = 0; chan < 4; chan++) {
 			val[chan] = bitcast(bld_base, TGSI_TYPE_UNSIGNED, values[chan]);
 			val[chan] = lp_build_emit_llvm_binary(bld_base,
 					TGSI_OPCODE_IMIN,
 					val[chan], chan == 3 ? max_alpha : max_rgb);
 			val[chan] = lp_build_emit_llvm_binary(bld_base,
@@ -2058,21 +2058,21 @@ static void emit_streamout_output(struct si_shader_context *ctx,
 		for (int j = 0; j < num_comps; j++) {
 			vdata = LLVMBuildInsertElement(builder, vdata, out[j],
 						       LLVMConstInt(ctx->i32, j, 0), "");
 		}
 		break;
 	}
 
 	ac_build_buffer_store_dword(&ctx->ac, so_buffers[buf_idx],
 				    vdata, num_comps,
 				    so_write_offsets[buf_idx],
-				    LLVMConstInt(ctx->i32, 0, 0),
+				    ctx->i32_0,
 				    stream_out->dst_offset * 4, 1, 1, true, false);
 }
 
 /**
  * Write streamout data to buffers for vertex stream @p stream (different
  * vertex streams can occur for GS copy shaders).
  */
 static void si_llvm_emit_streamout(struct si_shader_context *ctx,
 				   struct si_shader_output_values *outputs,
 				   unsigned noutput, unsigned stream)
@@ -2498,21 +2498,21 @@ static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base,
 	byteoffset = LLVMBuildMul(gallivm->builder, rel_patch_id,
 				  LLVMConstInt(ctx->i32, 4 * stride, 0), "");
 
 	lp_build_if(&inner_if_ctx, gallivm,
 		    LLVMBuildICmp(gallivm->builder, LLVMIntEQ,
 				  rel_patch_id, bld_base->uint_bld.zero, ""));
 
 	/* Store the dynamic HS control word. */
 	ac_build_buffer_store_dword(&ctx->ac, buffer,
 				    LLVMConstInt(ctx->i32, 0x80000000, 0),
-				    1, LLVMConstInt(ctx->i32, 0, 0), tf_base,
+				    1, ctx->i32_0, tf_base,
 				    0, 1, 0, true, false);
 
 	lp_build_endif(&inner_if_ctx);
 
 	/* Store the tessellation factors. */
 	ac_build_buffer_store_dword(&ctx->ac, buffer, vec0,
 				    MIN2(stride, 4), byteoffset, tf_base,
 				    4, 1, 0, true, false);
 	if (vec1)
 		ac_build_buffer_store_dword(&ctx->ac, buffer, vec1,
@@ -3063,21 +3063,21 @@ static LLVMValueRef get_buffer_size(
 		LLVMBuildExtractElement(builder, descriptor,
 					LLVMConstInt(ctx->i32, 2, 0), "");
 
 	if (ctx->screen->b.chip_class == VI) {
 		/* On VI, the descriptor contains the size in bytes,
 		 * but TXQ must return the size in elements.
 		 * The stride is always non-zero for resources using TXQ.
 		 */
 		LLVMValueRef stride =
 			LLVMBuildExtractElement(builder, descriptor,
-						LLVMConstInt(ctx->i32, 1, 0), "");
+						ctx->i32_1, "");
 		stride = LLVMBuildLShr(builder, stride,
 				       LLVMConstInt(ctx->i32, 16, 0), "");
 		stride = LLVMBuildAnd(builder, stride,
 				      LLVMConstInt(ctx->i32, 0x3FFF, 0), "");
 
 		size = LLVMBuildUDiv(builder, size, stride, "");
 	}
 
 	return size;
 }
@@ -3236,21 +3236,21 @@ static LLVMTypeRef const_array(LLVMTypeRef elem_type, int num_elements)
 static LLVMValueRef load_image_desc(struct si_shader_context *ctx,
 				    LLVMValueRef list, LLVMValueRef index,
 				    unsigned target)
 {
 	LLVMBuilderRef builder = ctx->gallivm.builder;
 
 	if (target == TGSI_TEXTURE_BUFFER) {
 		index = LLVMBuildMul(builder, index,
 				     LLVMConstInt(ctx->i32, 2, 0), "");
 		index = LLVMBuildAdd(builder, index,
-				     LLVMConstInt(ctx->i32, 1, 0), "");
+				     ctx->i32_1, "");
 		list = LLVMBuildPointerCast(builder, list,
 					    const_array(ctx->v4i32, 0), "");
 	}
 
 	return ac_build_indexed_load_const(&ctx->ac, list, index);
 }
 
 /**
  * Load the resource descriptor for \p image.
  */
@@ -4094,21 +4094,21 @@ static LLVMValueRef fix_resinfo(struct si_shader_context *ctx,
 	LLVMBuilderRef builder = ctx->gallivm.builder;
 
 	/* 1D textures are allocated and used as 2D on GFX9. */
         if (ctx->screen->b.chip_class >= GFX9 &&
 	    (target == TGSI_TEXTURE_1D_ARRAY ||
 	     target == TGSI_TEXTURE_SHADOW1D_ARRAY)) {
 		LLVMValueRef layers =
 			LLVMBuildExtractElement(builder, out,
 						LLVMConstInt(ctx->i32, 2, 0), "");
 		out = LLVMBuildInsertElement(builder, out, layers,
-					     LLVMConstInt(ctx->i32, 1, 0), "");
+					     ctx->i32_1, "");
 	}
 
 	/* Divide the number of layers by 6 to get the number of cubes. */
 	if (target == TGSI_TEXTURE_CUBE_ARRAY ||
 	    target == TGSI_TEXTURE_SHADOWCUBE_ARRAY) {
 		LLVMValueRef imm2 = LLVMConstInt(ctx->i32, 2, 0);
 
 		LLVMValueRef z = LLVMBuildExtractElement(builder, out, imm2, "");
 		z = LLVMBuildSDiv(builder, z, LLVMConstInt(ctx->i32, 6, 0), "");
 
@@ -4200,28 +4200,28 @@ static LLVMValueRef load_sampler_desc(struct si_shader_context *ctx,
 	LLVMBuilderRef builder = gallivm->builder;
 
 	switch (type) {
 	case DESC_IMAGE:
 		/* The image is at [0:7]. */
 		index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, 2, 0), "");
 		break;
 	case DESC_BUFFER:
 		/* The buffer is in [4:7]. */
 		index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, 4, 0), "");
-		index = LLVMBuildAdd(builder, index, LLVMConstInt(ctx->i32, 1, 0), "");
+		index = LLVMBuildAdd(builder, index, ctx->i32_1, "");
 		list = LLVMBuildPointerCast(builder, list,
 					    const_array(ctx->v4i32, 0), "");
 		break;
 	case DESC_FMASK:
 		/* The FMASK is at [8:15]. */
 		index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, 2, 0), "");
-		index = LLVMBuildAdd(builder, index, LLVMConstInt(ctx->i32, 1, 0), "");
+		index = LLVMBuildAdd(builder, index, ctx->i32_1, "");
 		break;
 	case DESC_SAMPLER:
 		/* The sampler state is at [12:15]. */
 		index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, 4, 0), "");
 		index = LLVMBuildAdd(builder, index, LLVMConstInt(ctx->i32, 3, 0), "");
 		list = LLVMBuildPointerCast(builder, list,
 					    const_array(ctx->v4i32, 0), "");
 		break;
 	}
 
@@ -4244,24 +4244,24 @@ static LLVMValueRef sici_fix_sampler_aniso(struct si_shader_context *ctx,
 {
 	LLVMBuilderRef builder = ctx->gallivm.builder;
 	LLVMValueRef img7, samp0;
 
 	if (ctx->screen->b.chip_class >= VI)
 		return samp;
 
 	img7 = LLVMBuildExtractElement(builder, res,
 				       LLVMConstInt(ctx->i32, 7, 0), "");
 	samp0 = LLVMBuildExtractElement(builder, samp,
-					LLVMConstInt(ctx->i32, 0, 0), "");
+					ctx->i32_0, "");
 	samp0 = LLVMBuildAnd(builder, samp0, img7, "");
 	return LLVMBuildInsertElement(builder, samp, samp0,
-				      LLVMConstInt(ctx->i32, 0, 0), "");
+				      ctx->i32_0, "");
 }
 
 static void tex_fetch_ptrs(
 	struct lp_build_tgsi_context *bld_base,
 	struct lp_build_emit_data *emit_data,
 	LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr, LLVMValueRef *fmask_ptr)
 {
 	struct si_shader_context *ctx = si_shader_context(bld_base);
 	LLVMValueRef list = LLVMGetParam(ctx->main_fn, SI_PARAM_SAMPLERS);
 	const struct tgsi_full_instruction *inst = emit_data->inst;
@@ -4896,21 +4896,21 @@ static void si_llvm_emit_txqs(
 
 	/* Read the samples from the descriptor directly. */
 	res = LLVMBuildBitCast(builder, res_ptr, ctx->v8i32, "");
 	samples = LLVMBuildExtractElement(
 		builder, res,
 		LLVMConstInt(ctx->i32, 3, 0), "");
 	samples = LLVMBuildLShr(builder, samples,
 				LLVMConstInt(ctx->i32, 16, 0), "");
 	samples = LLVMBuildAnd(builder, samples,
 			       LLVMConstInt(ctx->i32, 0xf, 0), "");
-	samples = LLVMBuildShl(builder, LLVMConstInt(ctx->i32, 1, 0),
+	samples = LLVMBuildShl(builder, ctx->i32_1,
 			       samples, "");
 
 	emit_data->output[emit_data->chan] = samples;
 }
 
 static void si_llvm_emit_ddxy(
 	const struct lp_build_tgsi_action *action,
 	struct lp_build_tgsi_context *bld_base,
 	struct lp_build_emit_data *emit_data)
 {
@@ -4987,26 +4987,26 @@ static void interp_fetch_args(
 		 * and place into first two channels.
 		 */
 		sample_id = lp_build_emit_fetch(bld_base,
 						emit_data->inst, 1, TGSI_CHAN_X);
 		sample_id = LLVMBuildBitCast(gallivm->builder, sample_id,
 					     ctx->i32, "");
 		sample_position = load_sample_position(ctx, sample_id);
 
 		emit_data->args[0] = LLVMBuildExtractElement(gallivm->builder,
 							     sample_position,
-							     LLVMConstInt(ctx->i32, 0, 0), "");
+							     ctx->i32_0, "");
 
 		emit_data->args[0] = LLVMBuildFSub(gallivm->builder, emit_data->args[0], halfval, "");
 		emit_data->args[1] = LLVMBuildExtractElement(gallivm->builder,
 							     sample_position,
-							     LLVMConstInt(ctx->i32, 1, 0), "");
+							     ctx->i32_1, "");
 		emit_data->args[1] = LLVMBuildFSub(gallivm->builder, emit_data->args[1], halfval, "");
 		emit_data->arg_count = 2;
 	}
 }
 
 static void build_interp_intrinsic(const struct lp_build_tgsi_action *action,
 				struct lp_build_tgsi_context *bld_base,
 				struct lp_build_emit_data *emit_data)
 {
 	struct si_shader_context *ctx = si_shader_context(bld_base);
@@ -5270,21 +5270,21 @@ static void si_llvm_emit_vertex(
 
 			ac_build_buffer_store_dword(&ctx->ac,
 						    ctx->gsvs_ring[stream],
 						    out_val, 1,
 						    voffset, soffset, 0,
 						    1, 1, true, true);
 		}
 	}
 
 	gs_next_vertex = lp_build_add(uint, gs_next_vertex,
-				      LLVMConstInt(ctx->i32, 1, 0));
+				      ctx->i32_1);
 
 	LLVMBuildStore(gallivm->builder, gs_next_vertex, ctx->gs_next_vertex[stream]);
 
 	/* Signal vertex emission */
 	ac_build_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_EMIT | AC_SENDMSG_GS | (stream << 8),
 			 LLVMGetParam(ctx->main_fn, SI_PARAM_GS_WAVE_ID));
 	if (!use_kill)
 		lp_build_endif(&if_state);
 }
 
-- 
2.7.4



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