[Mesa-dev] [PATCH 2/3] radeonsi: remove most uses of lp_build_const*
Marek Olšák
maraeo at gmail.com
Mon Apr 3 00:01:35 UTC 2017
From: Marek Olšák <marek.olsak at amd.com>
---
src/gallium/drivers/radeonsi/si_shader.c | 270 ++++++++++-----------
src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c | 2 +-
.../drivers/radeonsi/si_shader_tgsi_setup.c | 24 +-
3 files changed, 145 insertions(+), 151 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 2da00f9..e514d61 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -166,26 +166,26 @@ static LLVMValueRef unpack_param(struct si_shader_context *ctx,
struct gallivm_state *gallivm = &ctx->gallivm;
LLVMValueRef value = LLVMGetParam(ctx->main_fn,
param);
if (LLVMGetTypeKind(LLVMTypeOf(value)) == LLVMFloatTypeKind)
value = bitcast(&ctx->bld_base,
TGSI_TYPE_UNSIGNED, value);
if (rshift)
value = LLVMBuildLShr(gallivm->builder, value,
- lp_build_const_int32(gallivm, rshift), "");
+ LLVMConstInt(ctx->i32, rshift, 0), "");
if (rshift + bitwidth < 32) {
unsigned mask = (1 << bitwidth) - 1;
value = LLVMBuildAnd(gallivm->builder, value,
- lp_build_const_int32(gallivm, mask), "");
+ LLVMConstInt(ctx->i32, mask, 0), "");
}
return value;
}
static LLVMValueRef get_rel_patch_id(struct si_shader_context *ctx)
{
switch (ctx->type) {
case PIPE_SHADER_TESS_CTRL:
return unpack_param(ctx, SI_PARAM_REL_IDS, 0, 8);
@@ -304,21 +304,21 @@ static LLVMValueRef get_instance_index_for_fetch(
unsigned param_start_instance, unsigned divisor)
{
struct gallivm_state *gallivm = ctx->bld_base.base.gallivm;
LLVMValueRef result = LLVMGetParam(ctx->main_fn,
ctx->param_instance_id);
/* The division must be done before START_INSTANCE is added. */
if (divisor > 1)
result = LLVMBuildUDiv(gallivm->builder, result,
- lp_build_const_int32(gallivm, divisor), "");
+ LLVMConstInt(ctx->i32, divisor, 0), "");
return LLVMBuildAdd(gallivm->builder, result,
LLVMGetParam(ctx->main_fn, param_start_instance), "");
}
/* Bitcast <4 x float> to <2 x double>, extract the component, and convert
* to float. */
static LLVMValueRef extract_double_to_float(struct si_shader_context *ctx,
LLVMValueRef vec4,
unsigned double_index)
@@ -348,21 +348,21 @@ static void declare_input_vs(
LLVMValueRef t_list_ptr;
LLVMValueRef t_offset;
LLVMValueRef t_list;
LLVMValueRef vertex_index;
LLVMValueRef input[3];
/* Load the T list */
t_list_ptr = LLVMGetParam(ctx->main_fn, SI_PARAM_VERTEX_BUFFERS);
- t_offset = lp_build_const_int32(gallivm, input_index);
+ t_offset = LLVMConstInt(ctx->i32, input_index, 0);
t_list = ac_build_indexed_load_const(&ctx->ac, t_list_ptr, t_offset);
vertex_index = LLVMGetParam(ctx->main_fn,
ctx->param_vertex_index0 +
input_index);
fix_fetch = ctx->shader->key.mono.vs.fix_fetch[input_index];
/* Do multiple loads for special formats. */
@@ -393,21 +393,21 @@ static void declare_input_vs(
for (unsigned i = 0; i < num_fetches; i++) {
LLVMValueRef voffset = LLVMConstInt(ctx->i32, fetch_stride * i, 0);
input[i] = ac_build_buffer_load_format(&ctx->ac, t_list,
vertex_index, voffset,
true);
}
/* Break up the vec4 into individual components */
for (chan = 0; chan < 4; chan++) {
- LLVMValueRef llvm_chan = lp_build_const_int32(gallivm, chan);
+ LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, 0);
out[chan] = LLVMBuildExtractElement(gallivm->builder,
input[0], llvm_chan, "");
}
switch (fix_fetch) {
case SI_FIX_FETCH_A2_SNORM:
case SI_FIX_FETCH_A2_SSCALED:
case SI_FIX_FETCH_A2_SINT: {
/* The hardware returns an unsigned value; convert it to a
* signed one.
@@ -573,21 +573,21 @@ static LLVMValueRef get_primitive_id(struct lp_build_tgsi_context *bld_base,
static LLVMValueRef get_indirect_index(struct si_shader_context *ctx,
const struct tgsi_ind_register *ind,
int rel_index)
{
struct gallivm_state *gallivm = ctx->bld_base.base.gallivm;
LLVMValueRef result;
result = ctx->addrs[ind->Index][ind->Swizzle];
result = LLVMBuildLoad(gallivm->builder, result, "");
result = LLVMBuildAdd(gallivm->builder, result,
- lp_build_const_int32(gallivm, rel_index), "");
+ LLVMConstInt(ctx->i32, rel_index, 0), "");
return result;
}
/**
* Like get_indirect_index, but restricts the return value to a (possibly
* undefined) value inside [0..num).
*/
static LLVMValueRef get_bounded_indirect_index(struct si_shader_context *ctx,
const struct tgsi_ind_register *ind,
int rel_index, unsigned num)
@@ -635,21 +635,21 @@ static LLVMValueRef get_dw_address(struct si_shader_context *ctx,
/* If the register is 2-dimensional (e.g. an array of vertices
* in a primitive), calculate the base address of the vertex. */
if (reg.Register.Dimension) {
LLVMValueRef index;
if (reg.Dimension.Indirect)
index = get_indirect_index(ctx, ®.DimIndirect,
reg.Dimension.Index);
else
- index = lp_build_const_int32(gallivm, reg.Dimension.Index);
+ index = LLVMConstInt(ctx->i32, reg.Dimension.Index, 0);
base_addr = LLVMBuildAdd(gallivm->builder, base_addr,
LLVMBuildMul(gallivm->builder, index,
vertex_dw_stride, ""), "");
}
/* Get information about the register. */
if (reg.Register.File == TGSI_FILE_INPUT) {
name = info->input_semantic_name;
index = info->input_semantic_index;
@@ -670,31 +670,31 @@ static LLVMValueRef get_dw_address(struct si_shader_context *ctx,
if (reg.Indirect.ArrayID)
first = array_first[reg.Indirect.ArrayID];
else
first = reg.Register.Index;
ind_index = get_indirect_index(ctx, ®.Indirect,
reg.Register.Index - first);
base_addr = LLVMBuildAdd(gallivm->builder, base_addr,
LLVMBuildMul(gallivm->builder, ind_index,
- lp_build_const_int32(gallivm, 4), ""), "");
+ LLVMConstInt(ctx->i32, 4, 0), ""), "");
param = si_shader_io_get_unique_index(name[first], index[first]);
} else {
param = si_shader_io_get_unique_index(name[reg.Register.Index],
index[reg.Register.Index]);
}
/* Add the base address of the element. */
return LLVMBuildAdd(gallivm->builder, base_addr,
- lp_build_const_int32(gallivm, param * 4), "");
+ LLVMConstInt(ctx->i32, param * 4, 0), "");
}
/* The offchip buffer layout for TCS->TES is
*
* - attribute 0 of patch 0 vertex 0
* - attribute 0 of patch 0 vertex 1
* - attribute 0 of patch 0 vertex 2
* ...
* - attribute 0 of patch 1 vertex 0
* - attribute 0 of patch 1 vertex 1
@@ -715,21 +715,21 @@ static LLVMValueRef get_tcs_tes_buffer_address(struct si_shader_context *ctx,
{
struct gallivm_state *gallivm = ctx->bld_base.base.gallivm;
LLVMValueRef base_addr, vertices_per_patch, num_patches, total_vertices;
LLVMValueRef param_stride, constant16;
vertices_per_patch = unpack_param(ctx, SI_PARAM_TCS_OFFCHIP_LAYOUT, 9, 6);
num_patches = unpack_param(ctx, SI_PARAM_TCS_OFFCHIP_LAYOUT, 0, 9);
total_vertices = LLVMBuildMul(gallivm->builder, vertices_per_patch,
num_patches, "");
- constant16 = lp_build_const_int32(gallivm, 16);
+ constant16 = LLVMConstInt(ctx->i32, 16, 0);
if (vertex_index) {
base_addr = LLVMBuildMul(gallivm->builder, rel_patch_id,
vertices_per_patch, "");
base_addr = LLVMBuildAdd(gallivm->builder, base_addr,
vertex_index, "");
param_stride = total_vertices;
} else {
base_addr = rel_patch_id;
@@ -766,22 +766,21 @@ static LLVMValueRef get_tcs_tes_buffer_address_from_reg(
unsigned param_index_base, param_base;
reg = src ? *src : tgsi_full_src_register_from_dst(dst);
if (reg.Register.Dimension) {
if (reg.Dimension.Indirect)
vertex_index = get_indirect_index(ctx, ®.DimIndirect,
reg.Dimension.Index);
else
- vertex_index = lp_build_const_int32(gallivm,
- reg.Dimension.Index);
+ vertex_index = LLVMConstInt(ctx->i32, reg.Dimension.Index, 0);
}
/* Get information about the register. */
if (reg.Register.File == TGSI_FILE_INPUT) {
name = info->input_semantic_name;
index = info->input_semantic_index;
array_first = info->input_array_first;
} else if (reg.Register.File == TGSI_FILE_OUTPUT) {
name = info->output_semantic_name;
index = info->output_semantic_index;
@@ -795,28 +794,28 @@ static LLVMValueRef get_tcs_tes_buffer_address_from_reg(
if (reg.Indirect.ArrayID)
param_base = array_first[reg.Indirect.ArrayID];
else
param_base = reg.Register.Index;
param_index = get_indirect_index(ctx, ®.Indirect,
reg.Register.Index - param_base);
} else {
param_base = reg.Register.Index;
- param_index = lp_build_const_int32(gallivm, 0);
+ param_index = LLVMConstInt(ctx->i32, 0, 0);
}
param_index_base = si_shader_io_get_unique_index(name[param_base],
index[param_base]);
param_index = LLVMBuildAdd(gallivm->builder, param_index,
- lp_build_const_int32(gallivm, param_index_base),
+ LLVMConstInt(ctx->i32, param_index_base, 0),
"");
return get_tcs_tes_buffer_address(ctx, get_rel_patch_id(ctx),
vertex_index, param_index);
}
static LLVMValueRef buffer_load(struct lp_build_tgsi_context *bld_base,
enum tgsi_opcode_type type, unsigned swizzle,
LLVMValueRef buffer, LLVMValueRef offset,
LLVMValueRef base, bool readonly_memory)
@@ -833,21 +832,21 @@ static LLVMValueRef buffer_load(struct lp_build_tgsi_context *bld_base,
return LLVMBuildBitCast(gallivm->builder, value, vec_type, "");
}
if (!tgsi_type_is_64bit(type)) {
value = ac_build_buffer_load(&ctx->ac, buffer, 4, NULL, base, offset,
0, 1, 0, readonly_memory);
value = LLVMBuildBitCast(gallivm->builder, value, vec_type, "");
return LLVMBuildExtractElement(gallivm->builder, value,
- lp_build_const_int32(gallivm, swizzle), "");
+ LLVMConstInt(ctx->i32, swizzle, 0), "");
}
value = ac_build_buffer_load(&ctx->ac, buffer, 1, NULL, base, offset,
swizzle * 4, 1, 0, readonly_memory);
value2 = ac_build_buffer_load(&ctx->ac, buffer, 1, NULL, base, offset,
swizzle * 4 + 4, 1, 0, readonly_memory);
return si_llvm_emit_fetch_64bit(bld_base, type, value, value2);
}
@@ -871,27 +870,27 @@ static LLVMValueRef lds_load(struct lp_build_tgsi_context *bld_base,
LLVMValueRef values[TGSI_NUM_CHANNELS];
for (unsigned chan = 0; chan < TGSI_NUM_CHANNELS; chan++)
values[chan] = lds_load(bld_base, type, chan, dw_addr);
return lp_build_gather_values(bld_base->base.gallivm, values,
TGSI_NUM_CHANNELS);
}
dw_addr = lp_build_add(&bld_base->uint_bld, dw_addr,
- lp_build_const_int32(gallivm, swizzle));
+ LLVMConstInt(ctx->i32, swizzle, 0));
value = ac_build_indexed_load(&ctx->ac, ctx->lds, dw_addr, false);
if (tgsi_type_is_64bit(type)) {
LLVMValueRef value2;
dw_addr = lp_build_add(&bld_base->uint_bld, dw_addr,
- lp_build_const_int32(gallivm, 1));
+ LLVMConstInt(ctx->i32, 1, 0));
value2 = ac_build_indexed_load(&ctx->ac, ctx->lds, dw_addr, false);
return si_llvm_emit_fetch_64bit(bld_base, type, value, value2);
}
return LLVMBuildBitCast(gallivm->builder, value,
tgsi2llvmtype(bld_base, type), "");
}
/**
* Store to LDS.
@@ -901,21 +900,21 @@ static LLVMValueRef lds_load(struct lp_build_tgsi_context *bld_base,
* \param value value to store
*/
static void lds_store(struct lp_build_tgsi_context *bld_base,
unsigned swizzle, LLVMValueRef dw_addr,
LLVMValueRef value)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = bld_base->base.gallivm;
dw_addr = lp_build_add(&bld_base->uint_bld, dw_addr,
- lp_build_const_int32(gallivm, swizzle));
+ LLVMConstInt(ctx->i32, swizzle, 0));
value = LLVMBuildBitCast(gallivm->builder, value, ctx->i32, "");
ac_build_indexed_store(&ctx->ac, ctx->lds,
dw_addr, value);
}
static LLVMValueRef fetch_input_tcs(
struct lp_build_tgsi_context *bld_base,
const struct tgsi_full_src_register *reg,
enum tgsi_opcode_type type, unsigned swizzle)
@@ -949,27 +948,26 @@ static LLVMValueRef fetch_output_tcs(
return lds_load(bld_base, type, swizzle, dw_addr);
}
static LLVMValueRef fetch_input_tes(
struct lp_build_tgsi_context *bld_base,
const struct tgsi_full_src_register *reg,
enum tgsi_opcode_type type, unsigned swizzle)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
- struct gallivm_state *gallivm = bld_base->base.gallivm;
LLVMValueRef rw_buffers, buffer, base, addr;
rw_buffers = LLVMGetParam(ctx->main_fn,
SI_PARAM_RW_BUFFERS);
buffer = ac_build_indexed_load_const(&ctx->ac, rw_buffers,
- lp_build_const_int32(gallivm, SI_HS_RING_TESS_OFFCHIP));
+ LLVMConstInt(ctx->i32, SI_HS_RING_TESS_OFFCHIP, 0));
base = LLVMGetParam(ctx->main_fn, ctx->param_oc_lds);
addr = get_tcs_tes_buffer_address_from_reg(ctx, NULL, reg);
return buffer_load(bld_base, type, swizzle, buffer, base, addr, true);
}
static void store_output_tcs(struct lp_build_tgsi_context *bld_base,
const struct tgsi_full_instruction *inst,
const struct tgsi_opcode_info *info,
@@ -1013,21 +1011,21 @@ static void store_output_tcs(struct lp_build_tgsi_context *bld_base,
name == TGSI_SEMANTIC_TESSOUTER) {
skip_lds_store = false;
is_tess_factor = true;
}
}
}
rw_buffers = LLVMGetParam(ctx->main_fn,
SI_PARAM_RW_BUFFERS);
buffer = ac_build_indexed_load_const(&ctx->ac, rw_buffers,
- lp_build_const_int32(gallivm, SI_HS_RING_TESS_OFFCHIP));
+ LLVMConstInt(ctx->i32, SI_HS_RING_TESS_OFFCHIP, 0));
base = LLVMGetParam(ctx->main_fn, ctx->param_oc_lds);
buf_addr = get_tcs_tes_buffer_address_from_reg(ctx, reg, NULL);
TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) {
LLVMValueRef value = dst[chan_index];
if (inst->Instruction.Saturate)
value = ac_build_clamp(&ctx->ac, value);
@@ -1193,21 +1191,21 @@ static void interp_fs_input(struct si_shader_context *ctx,
* Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
* to do the right thing. The only reason we use fs.constant is that
* fs.interp cannot be used on integers, because they can be equal
* to NaN.
*
* When interp is false we will use fs.constant or for newer llvm,
* amdgcn.interp.mov.
*/
bool interp = interp_param != NULL;
- attr_number = lp_build_const_int32(gallivm, input_index);
+ attr_number = LLVMConstInt(ctx->i32, input_index, 0);
if (interp) {
interp_param = LLVMBuildBitCast(gallivm->builder, interp_param,
LLVMVectorType(ctx->f32, 2), "");
i = LLVMBuildExtractElement(gallivm->builder, interp_param,
uint->zero, "");
j = LLVMBuildExtractElement(gallivm->builder, interp_param,
uint->one, "");
}
@@ -1217,73 +1215,73 @@ static void interp_fs_input(struct si_shader_context *ctx,
LLVMValueRef is_face_positive;
LLVMValueRef back_attr_number;
/* If BCOLOR0 is used, BCOLOR1 is at offset "num_inputs + 1",
* otherwise it's at offset "num_inputs".
*/
unsigned back_attr_offset = num_interp_inputs;
if (semantic_index == 1 && colors_read_mask & 0xf)
back_attr_offset += 1;
- back_attr_number = lp_build_const_int32(gallivm, back_attr_offset);
+ back_attr_number = LLVMConstInt(ctx->i32, back_attr_offset, 0);
is_face_positive = LLVMBuildICmp(gallivm->builder, LLVMIntNE,
face, uint->zero, "");
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
- LLVMValueRef llvm_chan = lp_build_const_int32(gallivm, chan);
+ LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, 0);
LLVMValueRef front, back;
if (interp) {
front = ac_build_fs_interp(&ctx->ac, llvm_chan,
attr_number, prim_mask,
i, j);
back = ac_build_fs_interp(&ctx->ac, llvm_chan,
back_attr_number, prim_mask,
i, j);
} else {
front = ac_build_fs_interp_mov(&ctx->ac,
- lp_build_const_int32(gallivm, 2), /* P0 */
+ LLVMConstInt(ctx->i32, 2, 0), /* P0 */
llvm_chan, attr_number, prim_mask);
back = ac_build_fs_interp_mov(&ctx->ac,
- lp_build_const_int32(gallivm, 2), /* P0 */
+ LLVMConstInt(ctx->i32, 2, 0), /* P0 */
llvm_chan, back_attr_number, prim_mask);
}
result[chan] = LLVMBuildSelect(gallivm->builder,
is_face_positive,
front,
back,
"");
}
} else if (semantic_name == TGSI_SEMANTIC_FOG) {
if (interp) {
result[0] = ac_build_fs_interp(&ctx->ac, uint->zero,
attr_number, prim_mask, i, j);
} else {
result[0] = ac_build_fs_interp_mov(&ctx->ac, uint->zero,
- lp_build_const_int32(gallivm, 2), /* P0 */
+ LLVMConstInt(ctx->i32, 2, 0), /* P0 */
attr_number, prim_mask);
}
result[1] =
- result[2] = lp_build_const_float(gallivm, 0.0f);
- result[3] = lp_build_const_float(gallivm, 1.0f);
+ result[2] = LLVMConstReal(ctx->f32, 0.0f);
+ result[3] = LLVMConstReal(ctx->f32, 1.0f);
} else {
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
- LLVMValueRef llvm_chan = lp_build_const_int32(gallivm, chan);
+ LLVMValueRef llvm_chan = LLVMConstInt(ctx->i32, chan, 0);
if (interp) {
result[chan] = ac_build_fs_interp(&ctx->ac,
llvm_chan, attr_number, prim_mask, i, j);
} else {
result[chan] = ac_build_fs_interp_mov(&ctx->ac,
- lp_build_const_int32(gallivm, 2), /* P0 */
+ LLVMConstInt(ctx->i32, 2, 0), /* P0 */
llvm_chan, attr_number, prim_mask);
}
}
}
}
static void declare_input_fs(
struct si_shader_context *ctx,
unsigned input_index,
const struct tgsi_full_declaration *decl,
@@ -1351,32 +1349,32 @@ static LLVMValueRef buffer_load_const(struct si_shader_context *ctx,
LP_FUNC_ATTR_READNONE |
LP_FUNC_ATTR_LEGACY);
}
static LLVMValueRef load_sample_position(struct si_shader_context *ctx, LLVMValueRef sample_id)
{
struct lp_build_context *uint_bld = &ctx->bld_base.uint_bld;
struct gallivm_state *gallivm = &ctx->gallivm;
LLVMBuilderRef builder = gallivm->builder;
LLVMValueRef desc = LLVMGetParam(ctx->main_fn, SI_PARAM_RW_BUFFERS);
- LLVMValueRef buf_index = lp_build_const_int32(gallivm, SI_PS_CONST_SAMPLE_POSITIONS);
+ LLVMValueRef buf_index = LLVMConstInt(ctx->i32, SI_PS_CONST_SAMPLE_POSITIONS, 0);
LLVMValueRef resource = ac_build_indexed_load_const(&ctx->ac, desc, buf_index);
/* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */
LLVMValueRef offset0 = lp_build_mul_imm(uint_bld, sample_id, 8);
- LLVMValueRef offset1 = LLVMBuildAdd(builder, offset0, lp_build_const_int32(gallivm, 4), "");
+ LLVMValueRef offset1 = LLVMBuildAdd(builder, offset0, LLVMConstInt(ctx->i32, 4, 0), "");
LLVMValueRef pos[4] = {
buffer_load_const(ctx, resource, offset0),
buffer_load_const(ctx, resource, offset1),
- lp_build_const_float(gallivm, 0),
- lp_build_const_float(gallivm, 0)
+ LLVMConstReal(ctx->f32, 0),
+ LLVMConstReal(ctx->f32, 0)
};
return lp_build_gather_values(gallivm, pos, 4);
}
static void declare_system_value(struct si_shader_context *ctx,
unsigned index,
const struct tgsi_full_declaration *decl)
{
struct lp_build_context *bld = &ctx->bld_base.base;
@@ -1446,22 +1444,22 @@ static void declare_system_value(struct si_shader_context *ctx,
break;
case TGSI_SEMANTIC_SAMPLEID:
value = get_sample_id(ctx);
break;
case TGSI_SEMANTIC_SAMPLEPOS: {
LLVMValueRef pos[4] = {
LLVMGetParam(ctx->main_fn, SI_PARAM_POS_X_FLOAT),
LLVMGetParam(ctx->main_fn, SI_PARAM_POS_Y_FLOAT),
- lp_build_const_float(gallivm, 0),
- lp_build_const_float(gallivm, 0)
+ LLVMConstReal(ctx->f32, 0),
+ LLVMConstReal(ctx->f32, 0)
};
pos[0] = lp_build_emit_llvm_unary(&ctx->bld_base,
TGSI_OPCODE_FRC, pos[0]);
pos[1] = lp_build_emit_llvm_unary(&ctx->bld_base,
TGSI_OPCODE_FRC, pos[1]);
value = lp_build_gather_values(gallivm, pos, 4);
break;
}
case TGSI_SEMANTIC_SAMPLEMASK:
@@ -1501,46 +1499,46 @@ static void declare_system_value(struct si_shader_context *ctx,
case TGSI_SEMANTIC_TESSINNER:
case TGSI_SEMANTIC_TESSOUTER:
{
LLVMValueRef rw_buffers, buffer, base, addr;
int param = si_shader_io_get_unique_index(decl->Semantic.Name, 0);
rw_buffers = LLVMGetParam(ctx->main_fn,
SI_PARAM_RW_BUFFERS);
buffer = ac_build_indexed_load_const(&ctx->ac, rw_buffers,
- lp_build_const_int32(gallivm, SI_HS_RING_TESS_OFFCHIP));
+ LLVMConstInt(ctx->i32, SI_HS_RING_TESS_OFFCHIP, 0));
base = LLVMGetParam(ctx->main_fn, ctx->param_oc_lds);
addr = get_tcs_tes_buffer_address(ctx, get_rel_patch_id(ctx), NULL,
- lp_build_const_int32(gallivm, param));
+ LLVMConstInt(ctx->i32, param, 0));
value = buffer_load(&ctx->bld_base, TGSI_TYPE_FLOAT,
~0, buffer, base, addr, true);
break;
}
case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI:
case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI:
{
LLVMValueRef buf, slot, val[4];
int i, offset;
- slot = lp_build_const_int32(gallivm, SI_HS_CONST_DEFAULT_TESS_LEVELS);
+ slot = LLVMConstInt(ctx->i32, SI_HS_CONST_DEFAULT_TESS_LEVELS, 0);
buf = LLVMGetParam(ctx->main_fn, SI_PARAM_RW_BUFFERS);
buf = ac_build_indexed_load_const(&ctx->ac, buf, slot);
offset = decl->Semantic.Name == TGSI_SEMANTIC_DEFAULT_TESSINNER_SI ? 4 : 0;
for (i = 0; i < 4; i++)
val[i] = buffer_load_const(ctx, buf,
- lp_build_const_int32(gallivm, (offset + i) * 4));
+ LLVMConstInt(ctx->i32, (offset + i) * 4, 0));
value = lp_build_gather_values(gallivm, val, 4);
break;
}
case TGSI_SEMANTIC_PRIMID:
value = get_primitive_id(&ctx->bld_base, 0);
break;
case TGSI_SEMANTIC_GRID_SIZE:
value = LLVMGetParam(ctx->main_fn, SI_PARAM_GRID_SIZE);
@@ -1553,21 +1551,21 @@ static void declare_system_value(struct si_shader_context *ctx,
unsigned *properties = ctx->shader->selector->info.properties;
if (properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] != 0) {
unsigned sizes[3] = {
properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH],
properties[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT],
properties[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH]
};
for (i = 0; i < 3; ++i)
- values[i] = lp_build_const_int32(gallivm, sizes[i]);
+ values[i] = LLVMConstInt(ctx->i32, sizes[i], 0);
value = lp_build_gather_values(gallivm, values, 3);
} else {
value = LLVMGetParam(ctx->main_fn, SI_PARAM_BLOCK_SIZE);
}
break;
}
case TGSI_SEMANTIC_BLOCK_ID:
value = LLVMGetParam(ctx->main_fn, SI_PARAM_BLOCK_ID);
@@ -1664,21 +1662,21 @@ static LLVMValueRef fetch_constant(
SI_NUM_CONST_BUFFERS);
bufp = ac_build_indexed_load_const(&ctx->ac, ptr, index);
} else
bufp = load_const_buffer_desc(ctx, buf);
if (reg->Register.Indirect) {
addr = ctx->addrs[ireg->Index][ireg->Swizzle];
addr = LLVMBuildLoad(base->gallivm->builder, addr, "load addr reg");
addr = lp_build_mul_imm(&bld_base->uint_bld, addr, 16);
addr = lp_build_add(&bld_base->uint_bld, addr,
- lp_build_const_int32(base->gallivm, idx * 4));
+ LLVMConstInt(ctx->i32, idx * 4, 0));
} else {
addr = LLVMConstInt(ctx->i32, idx * 4, 0);
}
result = buffer_load_const(ctx, bufp, addr);
if (!tgsi_type_is_64bit(type))
result = bitcast(bld_base, type, result);
else {
LLVMValueRef addr2, result2;
@@ -1687,50 +1685,49 @@ static LLVMValueRef fetch_constant(
LLVMConstInt(ctx->i32, 4, 0));
result2 = buffer_load_const(ctx, bufp, addr2);
result = si_llvm_emit_fetch_64bit(bld_base, type,
result, result2);
}
return result;
}
/* Upper 16 bits must be zero. */
-static LLVMValueRef si_llvm_pack_two_int16(struct gallivm_state *gallivm,
+static LLVMValueRef si_llvm_pack_two_int16(struct si_shader_context *ctx,
LLVMValueRef val[2])
{
- return LLVMBuildOr(gallivm->builder, val[0],
- LLVMBuildShl(gallivm->builder, val[1],
- lp_build_const_int32(gallivm, 16),
+ return LLVMBuildOr(ctx->gallivm.builder, val[0],
+ LLVMBuildShl(ctx->gallivm.builder, val[1],
+ LLVMConstInt(ctx->i32, 16, 0),
""), "");
}
/* Upper 16 bits are ignored and will be dropped. */
-static LLVMValueRef si_llvm_pack_two_int32_as_int16(struct gallivm_state *gallivm,
+static LLVMValueRef si_llvm_pack_two_int32_as_int16(struct si_shader_context *ctx,
LLVMValueRef val[2])
{
LLVMValueRef v[2] = {
- LLVMBuildAnd(gallivm->builder, val[0],
- lp_build_const_int32(gallivm, 0xffff), ""),
+ LLVMBuildAnd(ctx->gallivm.builder, val[0],
+ LLVMConstInt(ctx->i32, 0xffff, 0), ""),
val[1],
};
- return si_llvm_pack_two_int16(gallivm, v);
+ return si_llvm_pack_two_int16(ctx, v);
}
/* Initialize arguments for the shader export intrinsic */
static void si_llvm_init_export_args(struct lp_build_tgsi_context *bld_base,
LLVMValueRef *values,
unsigned target,
struct ac_export_args *args)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct lp_build_context *base = &bld_base->base;
- struct gallivm_state *gallivm = base->gallivm;
LLVMBuilderRef builder = base->gallivm->builder;
LLVMValueRef val[4];
unsigned spi_shader_col_format = V_028714_SPI_SHADER_32_ABGR;
unsigned chan;
bool is_int8, is_int10;
/* Default is 0xf. Adjusted below depending on the format. */
args->enabled_channels = 0xf; /* writemask */
/* Specify whether the EXEC mask represents the valid mask */
@@ -1796,139 +1793,138 @@ static void si_llvm_init_export_args(struct lp_build_tgsi_context *bld_base,
args->out[chan] =
LLVMBuildBitCast(base->gallivm->builder,
packed, ctx->f32, "");
}
break;
case V_028714_SPI_SHADER_UNORM16_ABGR:
for (chan = 0; chan < 4; chan++) {
val[chan] = ac_build_clamp(&ctx->ac, values[chan]);
val[chan] = LLVMBuildFMul(builder, val[chan],
- lp_build_const_float(gallivm, 65535), "");
+ LLVMConstReal(ctx->f32, 65535), "");
val[chan] = LLVMBuildFAdd(builder, val[chan],
- lp_build_const_float(gallivm, 0.5), "");
+ LLVMConstReal(ctx->f32, 0.5), "");
val[chan] = LLVMBuildFPToUI(builder, val[chan],
ctx->i32, "");
}
args->compr = 1; /* COMPR flag */
args->out[0] = bitcast(bld_base, TGSI_TYPE_FLOAT,
- si_llvm_pack_two_int16(gallivm, val));
+ si_llvm_pack_two_int16(ctx, val));
args->out[1] = bitcast(bld_base, TGSI_TYPE_FLOAT,
- si_llvm_pack_two_int16(gallivm, val+2));
+ si_llvm_pack_two_int16(ctx, val+2));
break;
case V_028714_SPI_SHADER_SNORM16_ABGR:
for (chan = 0; chan < 4; chan++) {
/* Clamp between [-1, 1]. */
val[chan] = lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_MIN,
values[chan],
- lp_build_const_float(gallivm, 1));
+ LLVMConstReal(ctx->f32, 1));
val[chan] = lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_MAX,
val[chan],
- lp_build_const_float(gallivm, -1));
+ LLVMConstReal(ctx->f32, -1));
/* Convert to a signed integer in [-32767, 32767]. */
val[chan] = LLVMBuildFMul(builder, val[chan],
- lp_build_const_float(gallivm, 32767), "");
+ LLVMConstReal(ctx->f32, 32767), "");
/* If positive, add 0.5, else add -0.5. */
val[chan] = LLVMBuildFAdd(builder, val[chan],
LLVMBuildSelect(builder,
LLVMBuildFCmp(builder, LLVMRealOGE,
val[chan], base->zero, ""),
- lp_build_const_float(gallivm, 0.5),
- lp_build_const_float(gallivm, -0.5), ""), "");
+ LLVMConstReal(ctx->f32, 0.5),
+ LLVMConstReal(ctx->f32, -0.5), ""), "");
val[chan] = LLVMBuildFPToSI(builder, val[chan], ctx->i32, "");
}
args->compr = 1; /* COMPR flag */
args->out[0] = bitcast(bld_base, TGSI_TYPE_FLOAT,
- si_llvm_pack_two_int32_as_int16(gallivm, val));
+ si_llvm_pack_two_int32_as_int16(ctx, val));
args->out[1] = bitcast(bld_base, TGSI_TYPE_FLOAT,
- si_llvm_pack_two_int32_as_int16(gallivm, val+2));
+ si_llvm_pack_two_int32_as_int16(ctx, val+2));
break;
case V_028714_SPI_SHADER_UINT16_ABGR: {
- LLVMValueRef max_rgb = lp_build_const_int32(gallivm,
- is_int8 ? 255 : is_int10 ? 1023 : 65535);
+ LLVMValueRef max_rgb = LLVMConstInt(ctx->i32,
+ is_int8 ? 255 : is_int10 ? 1023 : 65535, 0);
LLVMValueRef max_alpha =
- !is_int10 ? max_rgb : lp_build_const_int32(gallivm, 3);
+ !is_int10 ? max_rgb : LLVMConstInt(ctx->i32, 3, 0);
/* Clamp. */
for (chan = 0; chan < 4; chan++) {
val[chan] = bitcast(bld_base, TGSI_TYPE_UNSIGNED, values[chan]);
val[chan] = lp_build_emit_llvm_binary(bld_base, TGSI_OPCODE_UMIN,
val[chan],
chan == 3 ? max_alpha : max_rgb);
}
args->compr = 1; /* COMPR flag */
args->out[0] = bitcast(bld_base, TGSI_TYPE_FLOAT,
- si_llvm_pack_two_int16(gallivm, val));
+ si_llvm_pack_two_int16(ctx, val));
args->out[1] = bitcast(bld_base, TGSI_TYPE_FLOAT,
- si_llvm_pack_two_int16(gallivm, val+2));
+ si_llvm_pack_two_int16(ctx, val+2));
break;
}
case V_028714_SPI_SHADER_SINT16_ABGR: {
- LLVMValueRef max_rgb = lp_build_const_int32(gallivm,
- is_int8 ? 127 : is_int10 ? 511 : 32767);
- LLVMValueRef min_rgb = lp_build_const_int32(gallivm,
- is_int8 ? -128 : is_int10 ? -512 : -32768);
+ LLVMValueRef max_rgb = LLVMConstInt(ctx->i32,
+ is_int8 ? 127 : is_int10 ? 511 : 32767, 0);
+ LLVMValueRef min_rgb = LLVMConstInt(ctx->i32,
+ is_int8 ? -128 : is_int10 ? -512 : -32768, 0);
LLVMValueRef max_alpha =
- !is_int10 ? max_rgb : lp_build_const_int32(gallivm, 1);
+ !is_int10 ? max_rgb : LLVMConstInt(ctx->i32, 1, 0);
LLVMValueRef min_alpha =
- !is_int10 ? min_rgb : lp_build_const_int32(gallivm, -2);
+ !is_int10 ? min_rgb : LLVMConstInt(ctx->i32, -2, 0);
/* Clamp. */
for (chan = 0; chan < 4; chan++) {
val[chan] = bitcast(bld_base, TGSI_TYPE_UNSIGNED, values[chan]);
val[chan] = lp_build_emit_llvm_binary(bld_base,
TGSI_OPCODE_IMIN,
val[chan], chan == 3 ? max_alpha : max_rgb);
val[chan] = lp_build_emit_llvm_binary(bld_base,
TGSI_OPCODE_IMAX,
val[chan], chan == 3 ? min_alpha : min_rgb);
}
args->compr = 1; /* COMPR flag */
args->out[0] = bitcast(bld_base, TGSI_TYPE_FLOAT,
- si_llvm_pack_two_int32_as_int16(gallivm, val));
+ si_llvm_pack_two_int32_as_int16(ctx, val));
args->out[1] = bitcast(bld_base, TGSI_TYPE_FLOAT,
- si_llvm_pack_two_int32_as_int16(gallivm, val+2));
+ si_llvm_pack_two_int32_as_int16(ctx, val+2));
break;
}
case V_028714_SPI_SHADER_32_ABGR:
memcpy(&args->out[0], values, sizeof(values[0]) * 4);
break;
}
}
static void si_alpha_test(struct lp_build_tgsi_context *bld_base,
LLVMValueRef alpha)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
- struct gallivm_state *gallivm = bld_base->base.gallivm;
if (ctx->shader->key.part.ps.epilog.alpha_func != PIPE_FUNC_NEVER) {
LLVMValueRef alpha_ref = LLVMGetParam(ctx->main_fn,
SI_PARAM_ALPHA_REF);
LLVMValueRef alpha_pass =
lp_build_cmp(&bld_base->base,
ctx->shader->key.part.ps.epilog.alpha_func,
alpha, alpha_ref);
LLVMValueRef arg =
lp_build_select(&bld_base->base,
alpha_pass,
- lp_build_const_float(gallivm, 1.0f),
- lp_build_const_float(gallivm, -1.0f));
+ LLVMConstReal(ctx->f32, 1.0f),
+ LLVMConstReal(ctx->f32, -1.0f));
ac_build_kill(&ctx->ac, arg);
} else {
ac_build_kill(&ctx->ac, NULL);
}
}
static LLVMValueRef si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context *bld_base,
LLVMValueRef alpha,
unsigned samplemask_param)
@@ -1943,47 +1939,47 @@ static LLVMValueRef si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context *
coverage = bitcast(bld_base, TGSI_TYPE_SIGNED, coverage);
coverage = lp_build_intrinsic(gallivm->builder, "llvm.ctpop.i32",
ctx->i32,
&coverage, 1, LP_FUNC_ATTR_READNONE);
coverage = LLVMBuildUIToFP(gallivm->builder, coverage,
ctx->f32, "");
coverage = LLVMBuildFMul(gallivm->builder, coverage,
- lp_build_const_float(gallivm,
+ LLVMConstReal(ctx->f32,
1.0 / SI_NUM_SMOOTH_AA_SAMPLES), "");
return LLVMBuildFMul(gallivm->builder, alpha, coverage, "");
}
static void si_llvm_emit_clipvertex(struct lp_build_tgsi_context *bld_base,
struct ac_export_args *pos, LLVMValueRef *out_elts)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct lp_build_context *base = &bld_base->base;
unsigned reg_index;
unsigned chan;
unsigned const_chan;
LLVMValueRef base_elt;
LLVMValueRef ptr = LLVMGetParam(ctx->main_fn, SI_PARAM_RW_BUFFERS);
- LLVMValueRef constbuf_index = lp_build_const_int32(base->gallivm,
- SI_VS_CONST_CLIP_PLANES);
+ LLVMValueRef constbuf_index = LLVMConstInt(ctx->i32,
+ SI_VS_CONST_CLIP_PLANES, 0);
LLVMValueRef const_resource = ac_build_indexed_load_const(&ctx->ac, ptr, constbuf_index);
for (reg_index = 0; reg_index < 2; reg_index ++) {
struct ac_export_args *args = &pos[2 + reg_index];
args->out[0] =
args->out[1] =
args->out[2] =
- args->out[3] = lp_build_const_float(base->gallivm, 0.0f);
+ args->out[3] = LLVMConstReal(ctx->f32, 0.0f);
/* Compute dot products of position and user clip plane vectors */
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
for (const_chan = 0; const_chan < TGSI_NUM_CHANNELS; const_chan++) {
LLVMValueRef addr =
LLVMConstInt(ctx->i32, ((reg_index * 4 + chan) * 4 +
const_chan) * 4, 0);
base_elt = buffer_load_const(ctx, const_resource,
addr);
args->out[chan] =
@@ -2120,22 +2116,22 @@ static void si_llvm_emit_streamout(struct si_shader_context *ctx,
* enabled buffer. */
LLVMValueRef so_write_offset[4] = {};
LLVMValueRef so_buffers[4];
LLVMValueRef buf_ptr = LLVMGetParam(ctx->main_fn,
SI_PARAM_RW_BUFFERS);
for (i = 0; i < 4; i++) {
if (!so->stride[i])
continue;
- LLVMValueRef offset = lp_build_const_int32(gallivm,
- SI_VS_STREAMOUT_BUF0 + i);
+ LLVMValueRef offset = LLVMConstInt(ctx->i32,
+ SI_VS_STREAMOUT_BUF0 + i, 0);
so_buffers[i] = ac_build_indexed_load_const(&ctx->ac, buf_ptr, offset);
LLVMValueRef so_offset = LLVMGetParam(ctx->main_fn,
ctx->param_streamout_offset[i]);
so_offset = LLVMBuildMul(builder, so_offset, LLVMConstInt(ctx->i32, 4, 0), "");
so_write_offset[i] = LLVMBuildMul(builder, so_write_index,
LLVMConstInt(ctx->i32, so->stride[i]*4, 0), "");
so_write_offset[i] = LLVMBuildAdd(builder, so_write_offset[i], so_offset, "");
@@ -2361,42 +2357,42 @@ static void si_copy_tcs_inputs(struct lp_build_tgsi_context *bld_base)
struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = bld_base->base.gallivm;
LLVMValueRef invocation_id, rw_buffers, buffer, buffer_offset;
LLVMValueRef lds_vertex_stride, lds_vertex_offset, lds_base;
uint64_t inputs;
invocation_id = unpack_param(ctx, SI_PARAM_REL_IDS, 8, 5);
rw_buffers = LLVMGetParam(ctx->main_fn, SI_PARAM_RW_BUFFERS);
buffer = ac_build_indexed_load_const(&ctx->ac, rw_buffers,
- lp_build_const_int32(gallivm, SI_HS_RING_TESS_OFFCHIP));
+ LLVMConstInt(ctx->i32, SI_HS_RING_TESS_OFFCHIP, 0));
buffer_offset = LLVMGetParam(ctx->main_fn, ctx->param_oc_lds);
lds_vertex_stride = unpack_param(ctx, SI_PARAM_TCS_IN_LAYOUT, 13, 8);
lds_vertex_offset = LLVMBuildMul(gallivm->builder, invocation_id,
lds_vertex_stride, "");
lds_base = get_tcs_in_current_patch_offset(ctx);
lds_base = LLVMBuildAdd(gallivm->builder, lds_base, lds_vertex_offset, "");
inputs = ctx->shader->key.mono.tcs.inputs_to_copy;
while (inputs) {
unsigned i = u_bit_scan64(&inputs);
LLVMValueRef lds_ptr = LLVMBuildAdd(gallivm->builder, lds_base,
- lp_build_const_int32(gallivm, 4 * i),
+ LLVMConstInt(ctx->i32, 4 * i, 0),
"");
LLVMValueRef buffer_addr = get_tcs_tes_buffer_address(ctx,
get_rel_patch_id(ctx),
invocation_id,
- lp_build_const_int32(gallivm, i));
+ LLVMConstInt(ctx->i32, i, 0));
LLVMValueRef value = lds_load(bld_base, TGSI_TYPE_SIGNED, ~0,
lds_ptr);
ac_build_buffer_store_dword(&ctx->ac, buffer, value, 4, buffer_addr,
buffer_offset, 0, 1, 0, true, false);
}
}
static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base,
@@ -2448,25 +2444,25 @@ static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base,
}
/* Load tess_inner and tess_outer from LDS.
* Any invocation can write them, so we can't get them from a temporary.
*/
tess_inner_index = si_shader_io_get_unique_index(TGSI_SEMANTIC_TESSINNER, 0);
tess_outer_index = si_shader_io_get_unique_index(TGSI_SEMANTIC_TESSOUTER, 0);
lds_base = tcs_out_current_patch_data_offset;
lds_inner = LLVMBuildAdd(gallivm->builder, lds_base,
- lp_build_const_int32(gallivm,
- tess_inner_index * 4), "");
+ LLVMConstInt(ctx->i32,
+ tess_inner_index * 4, 0), "");
lds_outer = LLVMBuildAdd(gallivm->builder, lds_base,
- lp_build_const_int32(gallivm,
- tess_outer_index * 4), "");
+ LLVMConstInt(ctx->i32,
+ tess_outer_index * 4, 0), "");
for (i = 0; i < 4; i++) {
inner[i] = LLVMGetUndef(ctx->i32);
outer[i] = LLVMGetUndef(ctx->i32);
}
if (shader->key.part.tcs.epilog.prim_mode == PIPE_PRIM_LINES) {
/* For isolines, the hardware expects tess factors in the
* reverse order from what GLSL / TGSI specify.
*/
@@ -2487,36 +2483,36 @@ static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base,
vec0 = lp_build_gather_values(gallivm, out, MIN2(stride, 4));
vec1 = NULL;
if (stride > 4)
vec1 = lp_build_gather_values(gallivm, out+4, stride - 4);
/* Get the buffer. */
rw_buffers = LLVMGetParam(ctx->main_fn,
SI_PARAM_RW_BUFFERS);
buffer = ac_build_indexed_load_const(&ctx->ac, rw_buffers,
- lp_build_const_int32(gallivm, SI_HS_RING_TESS_FACTOR));
+ LLVMConstInt(ctx->i32, SI_HS_RING_TESS_FACTOR, 0));
/* Get the offset. */
tf_base = LLVMGetParam(ctx->main_fn,
SI_PARAM_TESS_FACTOR_OFFSET);
byteoffset = LLVMBuildMul(gallivm->builder, rel_patch_id,
- lp_build_const_int32(gallivm, 4 * stride), "");
+ LLVMConstInt(ctx->i32, 4 * stride, 0), "");
lp_build_if(&inner_if_ctx, gallivm,
LLVMBuildICmp(gallivm->builder, LLVMIntEQ,
rel_patch_id, bld_base->uint_bld.zero, ""));
/* Store the dynamic HS control word. */
ac_build_buffer_store_dword(&ctx->ac, buffer,
- lp_build_const_int32(gallivm, 0x80000000),
- 1, lp_build_const_int32(gallivm, 0), tf_base,
+ LLVMConstInt(ctx->i32, 0x80000000, 0),
+ 1, LLVMConstInt(ctx->i32, 0, 0), tf_base,
0, 1, 0, true, false);
lp_build_endif(&inner_if_ctx);
/* Store the tessellation factors. */
ac_build_buffer_store_dword(&ctx->ac, buffer, vec0,
MIN2(stride, 4), byteoffset, tf_base,
4, 1, 0, true, false);
if (vec1)
ac_build_buffer_store_dword(&ctx->ac, buffer, vec1,
@@ -2632,21 +2628,21 @@ static void si_llvm_emit_ls_epilogue(struct lp_build_tgsi_context *bld_base)
vertex_dw_stride, "");
/* Write outputs to LDS. The next shader (TCS aka HS) will read
* its inputs from it. */
for (i = 0; i < info->num_outputs; i++) {
LLVMValueRef *out_ptr = ctx->outputs[i];
unsigned name = info->output_semantic_name[i];
unsigned index = info->output_semantic_index[i];
int param = si_shader_io_get_unique_index(name, index);
LLVMValueRef dw_addr = LLVMBuildAdd(gallivm->builder, base_dw_addr,
- lp_build_const_int32(gallivm, param * 4), "");
+ LLVMConstInt(ctx->i32, param * 4, 0), "");
for (chan = 0; chan < 4; chan++) {
lds_store(bld_base, chan, dw_addr,
LLVMBuildLoad(gallivm->builder, out_ptr[chan], ""));
}
}
}
static void si_llvm_emit_es_epilogue(struct lp_build_tgsi_context *bld_base)
{
@@ -3058,34 +3054,34 @@ static void si_llvm_return_fs_outputs(struct lp_build_tgsi_context *bld_base)
*/
static LLVMValueRef get_buffer_size(
struct lp_build_tgsi_context *bld_base,
LLVMValueRef descriptor)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = bld_base->base.gallivm;
LLVMBuilderRef builder = gallivm->builder;
LLVMValueRef size =
LLVMBuildExtractElement(builder, descriptor,
- lp_build_const_int32(gallivm, 2), "");
+ LLVMConstInt(ctx->i32, 2, 0), "");
if (ctx->screen->b.chip_class == VI) {
/* On VI, the descriptor contains the size in bytes,
* but TXQ must return the size in elements.
* The stride is always non-zero for resources using TXQ.
*/
LLVMValueRef stride =
LLVMBuildExtractElement(builder, descriptor,
- lp_build_const_int32(gallivm, 1), "");
+ LLVMConstInt(ctx->i32, 1, 0), "");
stride = LLVMBuildLShr(builder, stride,
- lp_build_const_int32(gallivm, 16), "");
+ LLVMConstInt(ctx->i32, 16, 0), "");
stride = LLVMBuildAnd(builder, stride,
- lp_build_const_int32(gallivm, 0x3FFF), "");
+ LLVMConstInt(ctx->i32, 0x3FFF, 0), "");
size = LLVMBuildUDiv(builder, size, stride, "");
}
return size;
}
static void build_tex_intrinsic(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data);
@@ -3107,21 +3103,21 @@ static void emit_optimization_barrier(struct si_shader_context *ctx)
/* Combine these with & instead of |. */
#define NOOP_WAITCNT 0xf7f
#define LGKM_CNT 0x07f
#define VM_CNT 0xf70
static void emit_waitcnt(struct si_shader_context *ctx, unsigned simm16)
{
struct gallivm_state *gallivm = &ctx->gallivm;
LLVMBuilderRef builder = gallivm->builder;
LLVMValueRef args[1] = {
- lp_build_const_int32(gallivm, simm16)
+ LLVMConstInt(ctx->i32, simm16, 0)
};
lp_build_intrinsic(builder, "llvm.amdgcn.s.waitcnt",
ctx->voidt, args, 1, 0);
}
static void membar_emit(
const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
@@ -3445,21 +3441,21 @@ static void load_fetch_args(
image_fetch_rsrc(bld_base, &inst->Src[0], false, target, &rsrc);
coords = image_fetch_coords(bld_base, inst, 1);
if (target == TGSI_TEXTURE_BUFFER) {
buffer_append_args(ctx, emit_data, rsrc, coords,
bld_base->uint_bld.zero, false, false);
} else {
emit_data->args[0] = coords;
emit_data->args[1] = rsrc;
- emit_data->args[2] = lp_build_const_int32(gallivm, 15); /* dmask */
+ emit_data->args[2] = LLVMConstInt(ctx->i32, 15, 0); /* dmask */
emit_data->arg_count = 3;
image_append_args(ctx, emit_data, target, false, false);
}
}
}
static unsigned get_load_intr_attribs(bool readonly_memory)
{
/* READNONE means writes can't affect it, while READONLY means that
@@ -3542,21 +3538,21 @@ static void load_emit_memory(
int chan;
ptr = get_memory_ptr(ctx, inst, base->elem_type, 1);
for (chan = 0; chan < 4; ++chan) {
if (!(writemask & (1 << chan))) {
channels[chan] = LLVMGetUndef(base->elem_type);
continue;
}
- index = lp_build_const_int32(gallivm, chan);
+ index = LLVMConstInt(ctx->i32, chan, 0);
derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
channels[chan] = LLVMBuildLoad(builder, derived_ptr, "");
}
emit_data->output[emit_data->chan] = lp_build_gather_values(gallivm, channels, 4);
}
/**
* Return true if the memory accessed by a LOAD or STORE instruction is
* read-only or write-only, respectively.
*
@@ -3723,21 +3719,21 @@ static void store_fetch_args(
coords = image_fetch_coords(bld_base, inst, 0);
if (target == TGSI_TEXTURE_BUFFER) {
image_fetch_rsrc(bld_base, &memory, true, target, &rsrc);
buffer_append_args(ctx, emit_data, rsrc, coords,
bld_base->uint_bld.zero, false, force_glc);
} else {
emit_data->args[1] = coords;
image_fetch_rsrc(bld_base, &memory, true, target,
&emit_data->args[2]);
- emit_data->args[3] = lp_build_const_int32(gallivm, 15); /* dmask */
+ emit_data->args[3] = LLVMConstInt(ctx->i32, 15, 0); /* dmask */
emit_data->arg_count = 4;
image_append_args(ctx, emit_data, target, false, force_glc);
}
}
}
static void store_emit_buffer(
struct si_shader_context *ctx,
struct lp_build_emit_data *emit_data,
@@ -3768,45 +3764,45 @@ static void store_emit_buffer(
}
if (count == 4) {
data = base_data;
intrinsic_name = "llvm.amdgcn.buffer.store.v4f32";
} else if (count == 2) {
LLVMTypeRef v2f32 = LLVMVectorType(ctx->f32, 2);
tmp = LLVMBuildExtractElement(
builder, base_data,
- lp_build_const_int32(gallivm, start), "");
+ LLVMConstInt(ctx->i32, start, 0), "");
data = LLVMBuildInsertElement(
builder, LLVMGetUndef(v2f32), tmp,
uint_bld->zero, "");
tmp = LLVMBuildExtractElement(
builder, base_data,
- lp_build_const_int32(gallivm, start + 1), "");
+ LLVMConstInt(ctx->i32, start + 1, 0), "");
data = LLVMBuildInsertElement(
builder, data, tmp, uint_bld->one, "");
intrinsic_name = "llvm.amdgcn.buffer.store.v2f32";
} else {
assert(count == 1);
data = LLVMBuildExtractElement(
builder, base_data,
- lp_build_const_int32(gallivm, start), "");
+ LLVMConstInt(ctx->i32, start, 0), "");
intrinsic_name = "llvm.amdgcn.buffer.store.f32";
}
offset = base_offset;
if (start != 0) {
offset = LLVMBuildAdd(
builder, offset,
- lp_build_const_int32(gallivm, start * 4), "");
+ LLVMConstInt(ctx->i32, start * 4, 0), "");
}
emit_data->args[0] = data;
emit_data->args[3] = offset;
lp_build_intrinsic(
builder, intrinsic_name, emit_data->dst_type,
emit_data->args, emit_data->arg_count,
get_store_intr_attribs(writeonly_memory));
}
@@ -3824,21 +3820,21 @@ static void store_emit_memory(
LLVMValueRef ptr, derived_ptr, data, index;
int chan;
ptr = get_memory_ptr(ctx, inst, base->elem_type, 0);
for (chan = 0; chan < 4; ++chan) {
if (!(writemask & (1 << chan))) {
continue;
}
data = lp_build_emit_fetch(&ctx->bld_base, inst, 1, chan);
- index = lp_build_const_int32(gallivm, chan);
+ index = LLVMConstInt(ctx->i32, chan, 0);
derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
LLVMBuildStore(builder, data, derived_ptr);
}
}
static void store_emit(
const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
@@ -4161,21 +4157,21 @@ static void resq_emit(
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = bld_base->base.gallivm;
LLVMBuilderRef builder = gallivm->builder;
const struct tgsi_full_instruction *inst = emit_data->inst;
LLVMValueRef out;
if (inst->Src[0].Register.File == TGSI_FILE_BUFFER) {
out = LLVMBuildExtractElement(builder, emit_data->args[0],
- lp_build_const_int32(gallivm, 2), "");
+ LLVMConstInt(ctx->i32, 2, 0), "");
} else if (inst->Memory.Texture == TGSI_TEXTURE_BUFFER) {
out = get_buffer_size(bld_base, emit_data->args[0]);
} else {
struct ac_image_args args;
memcpy(&args, emit_data->args, sizeof(args)); /* ugly */
args.opcode = ac_image_get_resinfo;
out = ac_build_image_opcode(&ctx->ac, &args);
out = fix_resinfo(ctx, inst->Memory.Texture, out);
@@ -4413,24 +4409,24 @@ static void tex_fetch_args(
* X=[5:0], Y=[13:8], and Z=[21:16].
*/
LLVMValueRef offset[3], pack;
assert(inst->Texture.NumOffsets == 1);
for (chan = 0; chan < 3; chan++) {
offset[chan] = lp_build_emit_fetch_texoffset(bld_base,
emit_data->inst, 0, chan);
offset[chan] = LLVMBuildAnd(gallivm->builder, offset[chan],
- lp_build_const_int32(gallivm, 0x3f), "");
+ LLVMConstInt(ctx->i32, 0x3f, 0), "");
if (chan)
offset[chan] = LLVMBuildShl(gallivm->builder, offset[chan],
- lp_build_const_int32(gallivm, chan*8), "");
+ LLVMConstInt(ctx->i32, chan*8, 0), "");
}
pack = LLVMBuildOr(gallivm->builder, offset[0], offset[1], "");
pack = LLVMBuildOr(gallivm->builder, pack, offset[2], "");
address[count++] = pack;
}
/* Pack LOD bias value */
if (opcode == TGSI_OPCODE_TXB)
address[count++] = coords[3];
@@ -4895,26 +4891,26 @@ static void si_llvm_emit_txqs(
LLVMValueRef res, samples;
LLVMValueRef res_ptr, samp_ptr, fmask_ptr = NULL;
tex_fetch_ptrs(bld_base, emit_data, &res_ptr, &samp_ptr, &fmask_ptr);
/* Read the samples from the descriptor directly. */
res = LLVMBuildBitCast(builder, res_ptr, ctx->v8i32, "");
samples = LLVMBuildExtractElement(
builder, res,
- lp_build_const_int32(gallivm, 3), "");
+ LLVMConstInt(ctx->i32, 3, 0), "");
samples = LLVMBuildLShr(builder, samples,
- lp_build_const_int32(gallivm, 16), "");
+ LLVMConstInt(ctx->i32, 16, 0), "");
samples = LLVMBuildAnd(builder, samples,
- lp_build_const_int32(gallivm, 0xf), "");
- samples = LLVMBuildShl(builder, lp_build_const_int32(gallivm, 1),
+ LLVMConstInt(ctx->i32, 0xf, 0), "");
+ samples = LLVMBuildShl(builder, LLVMConstInt(ctx->i32, 1, 0),
samples, "");
emit_data->output[emit_data->chan] = samples;
}
static void si_llvm_emit_ddxy(
const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
@@ -4978,39 +4974,39 @@ static void interp_fetch_args(
emit_data->args[0] = lp_build_emit_fetch(bld_base,
emit_data->inst, 1,
TGSI_CHAN_X);
emit_data->args[1] = lp_build_emit_fetch(bld_base,
emit_data->inst, 1,
TGSI_CHAN_Y);
emit_data->arg_count = 2;
} else if (inst->Instruction.Opcode == TGSI_OPCODE_INTERP_SAMPLE) {
LLVMValueRef sample_position;
LLVMValueRef sample_id;
- LLVMValueRef halfval = lp_build_const_float(gallivm, 0.5f);
+ LLVMValueRef halfval = LLVMConstReal(ctx->f32, 0.5f);
/* fetch sample ID, then fetch its sample position,
* and place into first two channels.
*/
sample_id = lp_build_emit_fetch(bld_base,
emit_data->inst, 1, TGSI_CHAN_X);
sample_id = LLVMBuildBitCast(gallivm->builder, sample_id,
ctx->i32, "");
sample_position = load_sample_position(ctx, sample_id);
emit_data->args[0] = LLVMBuildExtractElement(gallivm->builder,
sample_position,
- lp_build_const_int32(gallivm, 0), "");
+ LLVMConstInt(ctx->i32, 0, 0), "");
emit_data->args[0] = LLVMBuildFSub(gallivm->builder, emit_data->args[0], halfval, "");
emit_data->args[1] = LLVMBuildExtractElement(gallivm->builder,
sample_position,
- lp_build_const_int32(gallivm, 1), "");
+ LLVMConstInt(ctx->i32, 1, 0), "");
emit_data->args[1] = LLVMBuildFSub(gallivm->builder, emit_data->args[1], halfval, "");
emit_data->arg_count = 2;
}
}
static void build_interp_intrinsic(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
@@ -5037,38 +5033,38 @@ static void build_interp_intrinsic(const struct lp_build_tgsi_action *action,
location = TGSI_INTERPOLATE_LOC_CENTROID;
interp_param_idx = lookup_interp_param_index(interp, location);
if (interp_param_idx == -1)
return;
else if (interp_param_idx)
interp_param = LLVMGetParam(ctx->main_fn, interp_param_idx);
else
interp_param = NULL;
- attr_number = lp_build_const_int32(gallivm, input_index);
+ attr_number = LLVMConstInt(ctx->i32, input_index, 0);
if (inst->Instruction.Opcode == TGSI_OPCODE_INTERP_OFFSET ||
inst->Instruction.Opcode == TGSI_OPCODE_INTERP_SAMPLE) {
LLVMValueRef ij_out[2];
LLVMValueRef ddxy_out = si_llvm_emit_ddxy_interp(bld_base, interp_param);
/*
* take the I then J parameters, and the DDX/Y for it, and
* calculate the IJ inputs for the interpolator.
* temp1 = ddx * offset/sample.x + I;
* interp_param.I = ddy * offset/sample.y + temp1;
* temp1 = ddx * offset/sample.x + J;
* interp_param.J = ddy * offset/sample.y + temp1;
*/
for (i = 0; i < 2; i++) {
- LLVMValueRef ix_ll = lp_build_const_int32(gallivm, i);
- LLVMValueRef iy_ll = lp_build_const_int32(gallivm, i + 2);
+ LLVMValueRef ix_ll = LLVMConstInt(ctx->i32, i, 0);
+ LLVMValueRef iy_ll = LLVMConstInt(ctx->i32, i + 2, 0);
LLVMValueRef ddx_el = LLVMBuildExtractElement(gallivm->builder,
ddxy_out, ix_ll, "");
LLVMValueRef ddy_el = LLVMBuildExtractElement(gallivm->builder,
ddxy_out, iy_ll, "");
LLVMValueRef interp_el = LLVMBuildExtractElement(gallivm->builder,
interp_param, ix_ll, "");
LLVMValueRef temp1, temp2;
interp_el = LLVMBuildBitCast(gallivm->builder, interp_el,
ctx->f32, "");
@@ -5082,35 +5078,35 @@ static void build_interp_intrinsic(const struct lp_build_tgsi_action *action,
ij_out[i] = LLVMBuildFAdd(gallivm->builder, temp2, temp1, "");
}
interp_param = lp_build_gather_values(bld_base->base.gallivm, ij_out, 2);
}
for (chan = 0; chan < 4; chan++) {
LLVMValueRef llvm_chan;
unsigned schan;
schan = tgsi_util_get_full_src_register_swizzle(&inst->Src[0], chan);
- llvm_chan = lp_build_const_int32(gallivm, schan);
+ llvm_chan = LLVMConstInt(ctx->i32, schan, 0);
if (interp_param) {
interp_param = LLVMBuildBitCast(gallivm->builder,
interp_param, LLVMVectorType(ctx->f32, 2), "");
LLVMValueRef i = LLVMBuildExtractElement(
gallivm->builder, interp_param, uint->zero, "");
LLVMValueRef j = LLVMBuildExtractElement(
gallivm->builder, interp_param, uint->one, "");
emit_data->output[chan] = ac_build_fs_interp(&ctx->ac,
llvm_chan, attr_number, params,
i, j);
} else {
emit_data->output[chan] = ac_build_fs_interp_mov(&ctx->ac,
- lp_build_const_int32(gallivm, 2), /* P0 */
+ LLVMConstInt(ctx->i32, 2, 0), /* P0 */
llvm_chan, attr_number, params);
}
}
}
static LLVMValueRef si_emit_ballot(struct si_shader_context *ctx,
LLVMValueRef value)
{
struct gallivm_state *gallivm = &ctx->gallivm;
LLVMValueRef args[3] = {
@@ -5231,64 +5227,64 @@ static void si_llvm_emit_vertex(
/* If this thread has already emitted the declared maximum number of
* vertices, skip the write: excessive vertex emissions are not
* supposed to have any effect.
*
* If the shader has no writes to memory, kill it instead. This skips
* further memory loads and may allow LLVM to skip to the end
* altogether.
*/
can_emit = LLVMBuildICmp(gallivm->builder, LLVMIntULT, gs_next_vertex,
- lp_build_const_int32(gallivm,
- shader->selector->gs_max_out_vertices), "");
+ LLVMConstInt(ctx->i32,
+ shader->selector->gs_max_out_vertices, 0), "");
bool use_kill = !info->writes_memory;
if (use_kill) {
kill = lp_build_select(&bld_base->base, can_emit,
- lp_build_const_float(gallivm, 1.0f),
- lp_build_const_float(gallivm, -1.0f));
+ LLVMConstReal(ctx->f32, 1.0f),
+ LLVMConstReal(ctx->f32, -1.0f));
ac_build_kill(&ctx->ac, kill);
} else {
lp_build_if(&if_state, gallivm, can_emit);
}
offset = 0;
for (i = 0; i < info->num_outputs; i++) {
LLVMValueRef *out_ptr = ctx->outputs[i];
for (chan = 0; chan < 4; chan++) {
if (!(info->output_usagemask[i] & (1 << chan)) ||
((info->output_streams[i] >> (2 * chan)) & 3) != stream)
continue;
LLVMValueRef out_val = LLVMBuildLoad(gallivm->builder, out_ptr[chan], "");
LLVMValueRef voffset =
- lp_build_const_int32(gallivm, offset *
- shader->selector->gs_max_out_vertices);
+ LLVMConstInt(ctx->i32, offset *
+ shader->selector->gs_max_out_vertices, 0);
offset++;
voffset = lp_build_add(uint, voffset, gs_next_vertex);
voffset = lp_build_mul_imm(uint, voffset, 4);
out_val = LLVMBuildBitCast(gallivm->builder, out_val, ctx->i32, "");
ac_build_buffer_store_dword(&ctx->ac,
ctx->gsvs_ring[stream],
out_val, 1,
voffset, soffset, 0,
1, 1, true, true);
}
}
gs_next_vertex = lp_build_add(uint, gs_next_vertex,
- lp_build_const_int32(gallivm, 1));
+ LLVMConstInt(ctx->i32, 1, 0));
LLVMBuildStore(gallivm->builder, gs_next_vertex, ctx->gs_next_vertex[stream]);
/* Signal vertex emission */
ac_build_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_EMIT | AC_SENDMSG_GS | (stream << 8),
LLVMGetParam(ctx->main_fn, SI_PARAM_GS_WAVE_ID));
if (!use_kill)
lp_build_endif(&if_state);
}
@@ -5745,35 +5741,35 @@ static void preload_ring_buffers(struct si_shader_context *ctx)
SI_PARAM_RW_BUFFERS);
if ((ctx->type == PIPE_SHADER_VERTEX &&
ctx->shader->key.as_es) ||
(ctx->type == PIPE_SHADER_TESS_EVAL &&
ctx->shader->key.as_es) ||
ctx->type == PIPE_SHADER_GEOMETRY) {
unsigned ring =
ctx->type == PIPE_SHADER_GEOMETRY ? SI_GS_RING_ESGS
: SI_ES_RING_ESGS;
- LLVMValueRef offset = lp_build_const_int32(gallivm, ring);
+ LLVMValueRef offset = LLVMConstInt(ctx->i32, ring, 0);
ctx->esgs_ring =
ac_build_indexed_load_const(&ctx->ac, buf_ptr, offset);
}
if (ctx->shader->is_gs_copy_shader) {
- LLVMValueRef offset = lp_build_const_int32(gallivm, SI_RING_GSVS);
+ LLVMValueRef offset = LLVMConstInt(ctx->i32, SI_RING_GSVS, 0);
ctx->gsvs_ring[0] =
ac_build_indexed_load_const(&ctx->ac, buf_ptr, offset);
} else if (ctx->type == PIPE_SHADER_GEOMETRY) {
const struct si_shader_selector *sel = ctx->shader->selector;
struct lp_build_context *uint = &ctx->bld_base.uint_bld;
- LLVMValueRef offset = lp_build_const_int32(gallivm, SI_RING_GSVS);
+ LLVMValueRef offset = LLVMConstInt(ctx->i32, SI_RING_GSVS, 0);
LLVMValueRef base_ring;
base_ring = ac_build_indexed_load_const(&ctx->ac, buf_ptr, offset);
/* The conceptual layout of the GSVS ring is
* v0c0 .. vLv0 v0c1 .. vLc1 ..
* but the real memory layout is swizzled across
* threads:
* t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
* t16v0c0 ..
@@ -5847,21 +5843,21 @@ static void si_llvm_emit_polygon_stipple(struct si_shader_context *ctx,
LLVMValueRef slot, desc, offset, row, bit, address[2];
/* Use the fixed-point gl_FragCoord input.
* Since the stipple pattern is 32x32 and it repeats, just get 5 bits
* per coordinate to get the repeating effect.
*/
address[0] = unpack_param(ctx, param_pos_fixed_pt, 0, 5);
address[1] = unpack_param(ctx, param_pos_fixed_pt, 16, 5);
/* Load the buffer descriptor. */
- slot = lp_build_const_int32(gallivm, SI_PS_CONST_POLY_STIPPLE);
+ slot = LLVMConstInt(ctx->i32, SI_PS_CONST_POLY_STIPPLE, 0);
desc = ac_build_indexed_load_const(&ctx->ac, param_rw_buffers, slot);
/* The stipple pattern is 32x32, each row has 32 bits. */
offset = LLVMBuildMul(builder, address[1],
LLVMConstInt(ctx->i32, 4, 0), "");
row = buffer_load_const(ctx, desc, offset);
row = LLVMBuildBitCast(builder, row, ctx->i32, "");
bit = LLVMBuildLShr(builder, row, address[0], "");
bit = LLVMBuildTrunc(builder, bit, ctx->i1, "");
@@ -6405,21 +6401,21 @@ si_generate_gs_copy_shader(struct si_screen *sscreen,
LLVMBasicBlockRef bb;
unsigned offset;
if (!gsinfo->num_stream_output_components[stream])
continue;
if (stream > 0 && !gs_selector->so.num_outputs)
continue;
bb = LLVMInsertBasicBlockInContext(gallivm->context, end_bb, "out");
- LLVMAddCase(switch_inst, lp_build_const_int32(gallivm, stream), bb);
+ LLVMAddCase(switch_inst, LLVMConstInt(ctx.i32, stream, 0), bb);
LLVMPositionBuilderAtEnd(builder, bb);
/* Fetch vertex data from GSVS ring */
offset = 0;
for (i = 0; i < gsinfo->num_outputs; ++i) {
for (unsigned chan = 0; chan < 4; chan++) {
if (!(gsinfo->output_usagemask[i] & (1 << chan)) ||
outputs[i].vertex_stream[chan] != stream) {
outputs[i].values[chan] = ctx.bld_base.base.undef;
continue;
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
index 1e9a604..d7ec9ec 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
@@ -505,21 +505,21 @@ static void emit_bfe(const struct lp_build_tgsi_action *action,
LLVMBuilderRef builder = gallivm->builder;
LLVMValueRef bfe_sm5;
LLVMValueRef cond;
bfe_sm5 = ac_build_bfe(&ctx->ac, emit_data->args[0],
emit_data->args[1], emit_data->args[2],
emit_data->info->opcode == TGSI_OPCODE_IBFE);
/* Correct for GLSL semantics. */
cond = LLVMBuildICmp(builder, LLVMIntUGE, emit_data->args[2],
- lp_build_const_int32(gallivm, 32), "");
+ LLVMConstInt(ctx->i32, 32, 0), "");
emit_data->output[emit_data->chan] =
LLVMBuildSelect(builder, cond, emit_data->args[0], bfe_sm5, "");
}
/* this is ffs in C */
static void emit_lsb(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct gallivm_state *gallivm = bld_base->base.gallivm;
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
index efc9452..f576a5e 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
@@ -288,21 +288,21 @@ LLVMValueRef bitcast(struct lp_build_tgsi_context *bld_base,
/**
* Return a value that is equal to the given i32 \p index if it lies in [0,num)
* or an undefined value in the same interval otherwise.
*/
LLVMValueRef si_llvm_bound_index(struct si_shader_context *ctx,
LLVMValueRef index,
unsigned num)
{
struct gallivm_state *gallivm = &ctx->gallivm;
LLVMBuilderRef builder = gallivm->builder;
- LLVMValueRef c_max = lp_build_const_int32(gallivm, num - 1);
+ LLVMValueRef c_max = LLVMConstInt(ctx->i32, num - 1, 0);
LLVMValueRef cc;
if (util_is_power_of_two(num)) {
index = LLVMBuildAnd(builder, index, c_max, "");
} else {
/* In theory, this MAX pattern should result in code that is
* as good as the bit-wise AND above.
*
* In practice, LLVM generates worse code (at the time of
* writing), because its value tracking is not strong enough.
@@ -421,24 +421,24 @@ get_array_range(struct lp_build_tgsi_context *bld_base,
}
static LLVMValueRef
emit_array_index(struct si_shader_context *ctx,
const struct tgsi_ind_register *reg,
unsigned offset)
{
struct gallivm_state *gallivm = ctx->bld_base.base.gallivm;
if (!reg) {
- return lp_build_const_int32(gallivm, offset);
+ return LLVMConstInt(ctx->i32, offset, 0);
}
LLVMValueRef addr = LLVMBuildLoad(gallivm->builder, ctx->addrs[reg->Index][reg->Swizzle], "");
- return LLVMBuildAdd(gallivm->builder, addr, lp_build_const_int32(gallivm, offset), "");
+ return LLVMBuildAdd(gallivm->builder, addr, LLVMConstInt(ctx->i32, offset, 0), "");
}
/**
* For indirect registers, construct a pointer directly to the requested
* element using getelementptr if possible.
*
* Returns NULL if the insertelement/extractelement fallback for array access
* must be used.
*/
static LLVMValueRef
@@ -484,27 +484,26 @@ get_pointer_into_array(struct si_shader_context *ctx,
* 1. the scratch space descriptor isolates the current wave (this
* could even save the scratch offset SGPR at the cost of an
* additional SALU instruction)
* 2. the memory for allocas must be allocated at the _end_ of the
* scratch space (after spilled registers)
*/
index = si_llvm_bound_index(ctx, index, array->range.Last - array->range.First + 1);
index = LLVMBuildMul(
builder, index,
- lp_build_const_int32(gallivm, util_bitcount(array->writemask)),
+ LLVMConstInt(ctx->i32, util_bitcount(array->writemask), 0),
"");
index = LLVMBuildAdd(
builder, index,
- lp_build_const_int32(
- gallivm,
- util_bitcount(array->writemask & ((1 << swizzle) - 1))),
+ LLVMConstInt(ctx->i32,
+ util_bitcount(array->writemask & ((1 << swizzle) - 1)), 0),
"");
idxs[0] = ctx->bld_base.uint_bld.zero;
idxs[1] = index;
return LLVMBuildGEP(builder, alloca, idxs, 2, "");
}
LLVMValueRef
si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base,
enum tgsi_opcode_type type,
LLVMValueRef ptr,
@@ -526,36 +525,35 @@ si_llvm_emit_fetch_64bit(struct lp_build_tgsi_context *bld_base,
return bitcast(bld_base, type, result);
}
static LLVMValueRef
emit_array_fetch(struct lp_build_tgsi_context *bld_base,
unsigned File, enum tgsi_opcode_type type,
struct tgsi_declaration_range range,
unsigned swizzle)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
- struct gallivm_state *gallivm = ctx->bld_base.base.gallivm;
LLVMBuilderRef builder = bld_base->base.gallivm->builder;
unsigned i, size = range.Last - range.First + 1;
LLVMTypeRef vec = LLVMVectorType(tgsi2llvmtype(bld_base, type), size);
LLVMValueRef result = LLVMGetUndef(vec);
struct tgsi_full_src_register tmp_reg = {};
tmp_reg.Register.File = File;
for (i = 0; i < size; ++i) {
tmp_reg.Register.Index = i + range.First;
LLVMValueRef temp = si_llvm_emit_fetch(bld_base, &tmp_reg, type, swizzle);
result = LLVMBuildInsertElement(builder, result, temp,
- lp_build_const_int32(gallivm, i), "array_vector");
+ LLVMConstInt(ctx->i32, i, 0), "array_vector");
}
return result;
}
static LLVMValueRef
load_value_from_array(struct lp_build_tgsi_context *bld_base,
unsigned file,
enum tgsi_opcode_type type,
unsigned swizzle,
unsigned reg_index,
@@ -624,21 +622,21 @@ store_value_to_array(struct lp_build_tgsi_context *bld_base,
case TGSI_FILE_TEMPORARY:
if (range.First + i >= ctx->temps_count)
continue;
temp_ptr = ctx->temps[(i + range.First) * TGSI_NUM_CHANNELS + chan_index];
break;
default:
continue;
}
value = LLVMBuildExtractElement(builder, array,
- lp_build_const_int32(gallivm, i), "");
+ LLVMConstInt(ctx->i32, i, 0), "");
LLVMBuildStore(builder, value, temp_ptr);
}
}
}
/* If this is true, preload FS inputs at the beginning of shaders. Otherwise,
* reload them at each use. This must be true if the shader is using
* derivatives and KILL, because KILL can leave the WQM and then a lazy
* input load isn't in the WQM anymore.
*/
@@ -762,21 +760,21 @@ static LLVMValueRef fetch_system_value(struct lp_build_tgsi_context *bld_base,
const struct tgsi_full_src_register *reg,
enum tgsi_opcode_type type,
unsigned swizzle)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = bld_base->base.gallivm;
LLVMValueRef cval = ctx->system_values[reg->Register.Index];
if (LLVMGetTypeKind(LLVMTypeOf(cval)) == LLVMVectorTypeKind) {
cval = LLVMBuildExtractElement(gallivm->builder, cval,
- lp_build_const_int32(gallivm, swizzle), "");
+ LLVMConstInt(ctx->i32, swizzle, 0), "");
}
return bitcast(bld_base, type, cval);
}
static void emit_declaration(struct lp_build_tgsi_context *bld_base,
const struct tgsi_full_declaration *decl)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
LLVMBuilderRef builder = bld_base->base.gallivm->builder;
unsigned first, last, i;
@@ -878,21 +876,21 @@ static void emit_declaration(struct lp_build_tgsi_context *bld_base,
bld_base->base.vec_type, "undef");
}
for (i = 0; i < decl_size; ++i) {
LLVMValueRef ptr;
if (writemask & (1 << (i % 4))) {
#ifdef DEBUG
snprintf(name, sizeof(name), "TEMP%d.%c",
first + i / 4, "xyzw"[i % 4]);
#endif
- idxs[1] = lp_build_const_int32(bld_base->base.gallivm, j);
+ idxs[1] = LLVMConstInt(ctx->i32, j, 0);
ptr = LLVMBuildGEP(builder, array_alloca, idxs, 2, name);
j++;
} else {
ptr = ctx->undef_alloca;
}
ctx->temps[first * TGSI_NUM_CHANNELS + i] = ptr;
}
}
break;
}
@@ -971,21 +969,21 @@ void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(inst->Instruction.Opcode);
if (dst[0]) {
LLVMTypeKind k = LLVMGetTypeKind(LLVMTypeOf(dst[0]));
is_vec_store = (k == LLVMVectorTypeKind);
}
if (is_vec_store) {
LLVMValueRef values[4] = {};
TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan) {
- LLVMValueRef index = lp_build_const_int32(gallivm, chan);
+ LLVMValueRef index = LLVMConstInt(ctx->i32, chan, 0);
values[chan] = LLVMBuildExtractElement(gallivm->builder,
dst[0], index, "");
}
bld_base->emit_store(bld_base, inst, info, values);
return;
}
TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) {
LLVMValueRef value = dst[chan_index];
--
2.7.4
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