[Mesa-dev] [PATCH] anv/pipeline: do not disable depth writes if depth testing is disabled

[Jason Ekstrand]

Sorry.  I thought I had.

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

On Sun, Apr 2, 2017 at 11:02 PM, Iago Toral <itoral at igalia.com> wrote:

> Can anyone review this one?
>
> On Wed, 2017-03-29 at 08:58 +0200, Iago Toral Quiroga wrote:
> > Writing and testing are two different things and they can be set
> > separately
> > by the application. If an application wants to record depth data
> > without
> > caring for the depth test, it can enable depth test and set the depth
> > compare function to VK_COMPARE_OP_ALWAYS or it can simply disable
> > depth testing altogether. Some CTS tests do the latter.
> >
> > Fixes all multisample tests with depth-only formats in:
> > dEQP-VK.renderpass.multisample.*
> > ---
> >  src/intel/vulkan/genX_pipeline.c | 4 ----
> >  1 file changed, 4 deletions(-)
> >
> > diff --git a/src/intel/vulkan/genX_pipeline.c
> > b/src/intel/vulkan/genX_pipeline.c
> > index 85a9e4f..dc393cb 100644
> > --- a/src/intel/vulkan/genX_pipeline.c
> > +++ b/src/intel/vulkan/genX_pipeline.c
> > @@ -728,10 +728,6 @@
> > sanitize_ds_state(VkPipelineDepthStencilStateCreateInfo *state,
> >  {
> >     *stencilWriteEnable = state->stencilTestEnable;
> >
> > -   /* If the depth test is disabled, we won't be writing anything.
> > */
> > -   if (!state->depthTestEnable)
> > -      state->depthWriteEnable = false;
> > -
> >     /* The Vulkan spec requires that if either depth or stencil is
> > not present,
> >      * the pipeline is to act as if the test silently passes.
> >      */
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