[Mesa-dev] [PATCH 00/12] Add Cannonlake support

Anuj Phogat anuj.phogat at gmail.com
Sat Apr 15 00:35:15 UTC 2017


This series adds a preliminary support for Cannonlake. We
still end up using gen9 paths in many cases. My upcoming
patches will change it by creating new functions, headers
for gen10. You can also find this series at:
https://github.com/aphogat/mesa.git
branch: reviews 

Anuj Phogat (4):
  i965/cnl: Update the script generating genX_bits.h
  i965/cnl: URB {VS, GS, HS, DS} sizes cannot be a multiple of 3
  i965/cnl: Update memory barrier assert
  i965/cnl: Add CNL MOCS defines

Ben Widawsky (7):
  i965: Make feature macros gen8 based
  i965/cnl: Implement new pipe control workaround
  i965/cnl: Implement depth count workaround
  i965/cnl: Modify thread count shift for VS
  i965/cnl: Restore lossless compression for sRGB formats
  i965/cnl: Add a preliminary device for CNL
  i965/cnl: Properly handle l3 configuration

Jason Ekstrand (1):
  i965/cnl: Add gen10.xml

 include/pci_ids/i965_pci_ids.h                   |   12 +
 src/intel/Makefile.sources                       |    3 +-
 src/intel/common/gen_device_info.c               |   72 +-
 src/intel/common/gen_device_info.h               |    1 +
 src/intel/common/gen_l3_config.c                 |   42 +-
 src/intel/compiler/brw_compiler.h                |    2 +-
 src/intel/compiler/brw_eu.c                      |    2 +
 src/intel/compiler/brw_eu_compact.c              |    1 +
 src/intel/genxml/gen10.xml                       | 3557 ++++++++++++++++++++++
 src/intel/genxml/gen_bits_header.py              |    4 +-
 src/intel/isl/isl.c                              |    2 +
 src/intel/vulkan/anv_cmd_buffer.c                |    1 +
 src/intel/vulkan/anv_device.c                    |    1 +
 src/intel/vulkan/anv_entrypoints_gen.py          |    1 +
 src/mesa/drivers/dri/i965/brw_blorp.c            |    6 +
 src/mesa/drivers/dri/i965/brw_defines.h          |    9 +
 src/mesa/drivers/dri/i965/brw_draw_upload.c      |    1 +
 src/mesa/drivers/dri/i965/brw_formatquery.c      |    1 +
 src/mesa/drivers/dri/i965/brw_pipe_control.c     |   18 +
 src/mesa/drivers/dri/i965/brw_program.c          |    2 +-
 src/mesa/drivers/dri/i965/brw_queryobj.c         |    8 +
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c |    2 +
 src/mesa/drivers/dri/i965/gen7_urb.c             |   12 +
 src/mesa/drivers/dri/i965/gen8_vs_state.c        |    6 +-
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c    |    2 +-
 src/mesa/drivers/dri/i965/intel_screen.c         |    1 +
 26 files changed, 3749 insertions(+), 20 deletions(-)
 create mode 100644 src/intel/genxml/gen10.xml

-- 
2.9.3



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