[Mesa-dev] [PATCH 06/12] i965/cnl: Modify thread count shift for VS

[Anuj Phogat]

From: Ben Widawsky <benjamin.widawsky at intel.com>

Signed-off-by: Ben Widawsky <benjamin.widawsky at intel.com>
---
 src/mesa/drivers/dri/i965/brw_defines.h   | 1 +
 src/mesa/drivers/dri/i965/gen8_vs_state.c | 6 +++++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 08106c0..688ff61 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -607,6 +607,7 @@ enum brw_wrap_mode {
 /* DW5 */
 # define GEN6_VS_MAX_THREADS_SHIFT			25
 # define HSW_VS_MAX_THREADS_SHIFT			23
+# define GEN10_VS_MAX_THREADS_SHIFT                     22
 # define GEN6_VS_STATISTICS_ENABLE			(1 << 10)
 # define GEN6_VS_CACHE_DISABLE				(1 << 1)
 # define GEN6_VS_ENABLE					(1 << 0)
diff --git a/src/mesa/drivers/dri/i965/gen8_vs_state.c b/src/mesa/drivers/dri/i965/gen8_vs_state.c
index 7b66da4..c4ad9cd 100644
--- a/src/mesa/drivers/dri/i965/gen8_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_vs_state.c
@@ -75,7 +75,11 @@ upload_vs_state(struct brw_context *brw)
    uint32_t simd8_enable =
       vue_prog_data->dispatch_mode == DISPATCH_MODE_SIMD8 ?
       GEN8_VS_SIMD8_ENABLE : 0;
-   OUT_BATCH(((devinfo->max_vs_threads - 1) << HSW_VS_MAX_THREADS_SHIFT) |
+
+   uint32_t threads = (devinfo->max_vs_threads - 1);
+   threads <<= brw->gen >= 10 ? GEN10_VS_MAX_THREADS_SHIFT :
+                                HSW_VS_MAX_THREADS_SHIFT;
+   OUT_BATCH(threads |
              GEN6_VS_STATISTICS_ENABLE |
              simd8_enable |
              GEN6_VS_ENABLE);
-- 
2.9.3