[Mesa-dev] [PATCH 5/9] radv/ac: frag shader only needs ring offsets if sample positions enabled

[Dave Airlie]

From: Dave Airlie <airlied at redhat.com>

mostly documenting things, since with modern llvm we always have the
spill enabled.

Signed-off-by: Dave Airlie <airlied at redhat.com>
---
 src/amd/common/ac_nir_to_llvm.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index a24f203..8368a12 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -572,10 +572,13 @@ static void create_function(struct nir_to_llvm_context *ctx)
 	    ctx->stage == MESA_SHADER_VERTEX ||
 	    ctx->stage == MESA_SHADER_TESS_CTRL ||
 	    ctx->stage == MESA_SHADER_TESS_EVAL ||
-	    ctx->stage == MESA_SHADER_FRAGMENT ||
 	    ctx->is_gs_copy_shader)
 		need_ring_offsets = true;
 
+	if (ctx->stage == MESA_SHADER_FRAGMENT &&
+	    ctx->shader_info->info.ps.needs_sample_positions)
+		need_ring_offsets = true;
+
 	if (need_ring_offsets && !ctx->options->supports_spill) {
 		arg_types[arg_idx++] = const_array(ctx->v16i8, 16); /* address of rings */
 	}
-- 
2.9.3