[Mesa-dev] [PATCH v2 2/2] nvc0: Add support for AMD_vertex_shader{layer, viewport_index}
Lyude
lyude at redhat.com
Wed Apr 19 22:38:02 UTC 2017
From: Ilia Mirkin <imirkin at alum.mit.edu>
Enables support for the AMD_vertex_shader_layer and
AMD_vertex_shader_layer_viewport_index extensions for the GM200.
Signed-off-by: Lyude <lyude at redhat.com>
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Changes since v1:
- Add comments in release notes
- Enable PIPE_CAP_TGSI_TES_LAYER_VIEWPORT
Signed-off-by: Lyude <lyude at redhat.com>
---
docs/relnotes/17.1.0.html | 2 ++
src/gallium/drivers/nouveau/nvc0/nvc0_context.h | 1 +
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 4 ++--
.../drivers/nouveau/nvc0/nvc0_shader_state.c | 26 +++++++++++++++++-----
.../drivers/nouveau/nvc0/nvc0_state_validate.c | 3 +++
5 files changed, 29 insertions(+), 7 deletions(-)
diff --git a/docs/relnotes/17.1.0.html b/docs/relnotes/17.1.0.html
index e7cfe38..6cebc0e 100644
--- a/docs/relnotes/17.1.0.html
+++ b/docs/relnotes/17.1.0.html
@@ -56,6 +56,8 @@ Note: some of the new features are only available with certain drivers.
<li>GL_ARB_transform_feedback2 on i965/gen6</li>
<li>GL_ARB_transform_feedback_overflow_query on i965/gen6+</li>
<li>GL_ARB_vertex_attrib_64bit on i965/ivb</li>
+<li>GL_AMD_vertex_shader_layer on nvc0</li>
+<li>GL_AMD_vertex_shader_viewport_index on nvc0</li>
<li>GL_NV_fill_rectangle on nvc0</li>
<li>Geometry shaders enabled on swr</li>
</ul>
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
index 79a5333..bd6f752 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
@@ -312,6 +312,7 @@ void nvc0_fragprog_validate(struct nvc0_context *);
void nvc0_compprog_validate(struct nvc0_context *);
void nvc0_tfb_validate(struct nvc0_context *);
+void nvc0_layer_validate(struct nvc0_context *);
/* nvc0_state.c */
extern void nvc0_init_state_functions(struct nvc0_context *);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index e82f869..13acef5 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -258,6 +258,8 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_TGSI_FS_FBFETCH:
return class_3d >= NVE4_3D_CLASS; /* needs testing on fermi */
case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
+ case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
+ case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
return class_3d >= GM200_3D_CLASS;
case PIPE_CAP_TGSI_BALLOT:
return class_3d >= NVE4_3D_CLASS;
@@ -270,7 +272,6 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
- case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
case PIPE_CAP_FAKE_SW_MSAA:
case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
case PIPE_CAP_VERTEXID_NOBASE:
@@ -291,7 +292,6 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_INT64_DIVMOD:
case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
- case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
return 0;
case PIPE_CAP_VENDOR_ID:
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c b/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
index c644fe9..a8c814f 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
@@ -220,18 +220,13 @@ nvc0_gmtyprog_validate(struct nvc0_context *nvc0)
/* we allow GPs with no code for specifying stream output state only */
if (gp && nvc0_program_validate(nvc0, gp) && gp->code_size) {
- const bool gp_selects_layer = !!(gp->hdr[13] & (1 << 9));
-
BEGIN_NVC0(push, NVC0_3D(MACRO_GP_SELECT), 1);
PUSH_DATA (push, 0x41);
BEGIN_NVC0(push, NVC0_3D(SP_START_ID(4)), 1);
PUSH_DATA (push, gp->code_base);
BEGIN_NVC0(push, NVC0_3D(SP_GPR_ALLOC(4)), 1);
PUSH_DATA (push, gp->num_gprs);
- BEGIN_NVC0(push, NVC0_3D(LAYER), 1);
- PUSH_DATA (push, gp_selects_layer ? NVC0_3D_LAYER_USE_GP : 0);
} else {
- IMMED_NVC0(push, NVC0_3D(LAYER), 0);
BEGIN_NVC0(push, NVC0_3D(MACRO_GP_SELECT), 1);
PUSH_DATA (push, 0x40);
}
@@ -252,6 +247,27 @@ nvc0_compprog_validate(struct nvc0_context *nvc0)
}
void
+nvc0_layer_validate(struct nvc0_context *nvc0)
+{
+ struct nouveau_pushbuf *push = nvc0->base.pushbuf;
+ struct nvc0_program *last;
+ bool prog_selects_layer = false;
+
+ if (nvc0->gmtyprog)
+ last = nvc0->gmtyprog;
+ else if (nvc0->tevlprog)
+ last = nvc0->tevlprog;
+ else
+ last = nvc0->vertprog;
+
+ if (last)
+ prog_selects_layer = !!(last->hdr[13] & (1 << 9));
+
+ BEGIN_NVC0(push, NVC0_3D(LAYER), 1);
+ PUSH_DATA (push, prog_selects_layer ? NVC0_3D_LAYER_USE_GP : 0);
+}
+
+void
nvc0_tfb_validate(struct nvc0_context *nvc0)
{
struct nouveau_pushbuf *push = nvc0->base.pushbuf;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c b/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c
index 68fd730..6d3caa1 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c
@@ -878,6 +878,9 @@ validate_list_3d[] = {
{ nvc0_validate_buffers, NVC0_NEW_3D_BUFFERS },
{ nvc0_idxbuf_validate, NVC0_NEW_3D_IDXBUF },
{ nvc0_tfb_validate, NVC0_NEW_3D_TFB_TARGETS | NVC0_NEW_3D_GMTYPROG },
+ { nvc0_layer_validate, NVC0_NEW_3D_VERTPROG |
+ NVC0_NEW_3D_TEVLPROG |
+ NVC0_NEW_3D_GMTYPROG },
{ nvc0_validate_driverconst, NVC0_NEW_3D_DRIVERCONST },
};
--
2.9.3
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