[Mesa-dev] [PATCH 2/3] r600g/radeonsi: trivial cleanups
Constantine Kharlamov
Hi-Angel at yandex.ru
Sun Apr 23 21:36:04 UTC 2017
constified some variables, moved two variable declarations into the
cycle where they're used, and removed trailing whitespace.
Signed-off-by: Constantine Kharlamov <Hi-Angel at yandex.ru>
---
src/gallium/drivers/r600/evergreen_state.c | 4 +--
src/gallium/drivers/r600/r600_blit.c | 4 +--
src/gallium/drivers/r600/r600_shader.c | 50 +++++++++++++++---------------
src/gallium/drivers/radeonsi/si_blit.c | 4 +--
4 files changed, 29 insertions(+), 33 deletions(-)
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 7d84e92250..9a6bb4e4c9 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1568,7 +1568,7 @@ static void evergreen_set_min_samples(struct pipe_context *ctx, unsigned min_sam
}
/* 8xMSAA */
-static uint32_t sample_locs_8x[] = {
+static const uint32_t sample_locs_8x[] = {
FILL_SREG(-1, 1, 1, 5, 3, -5, 5, 3),
FILL_SREG(-7, -1, -3, -7, 7, -3, -5, 7),
FILL_SREG(-1, 1, 1, 5, 3, -5, 5, 3),
@@ -1578,7 +1578,7 @@ static uint32_t sample_locs_8x[] = {
FILL_SREG(-1, 1, 1, 5, 3, -5, 5, 3),
FILL_SREG(-7, -1, -3, -7, 7, -3, -5, 7),
};
-static unsigned max_dist_8x = 7;
+static const unsigned max_dist_8x = 7;
static void evergreen_get_sample_position(struct pipe_context *ctx,
unsigned sample_count,
diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c
index de87ed8650..62035a7bee 100644
--- a/src/gallium/drivers/r600/r600_blit.c
+++ b/src/gallium/drivers/r600/r600_blit.c
@@ -413,10 +413,8 @@ static void r600_clear(struct pipe_context *ctx, unsigned buffers,
}
if (buffers & PIPE_CLEAR_COLOR) {
- int i;
-
/* These buffers cannot use fast clear, make sure to disable expansion. */
- for (i = 0; i < fb->nr_cbufs; i++) {
+ for (unsigned i = 0; i < fb->nr_cbufs; i++) {
struct r600_texture *tex;
/* If not clearing this buffer, skip. */
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index bdaf28ced2..8928553c70 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -39,23 +39,23 @@
#include <stdio.h>
#include <errno.h>
-/* CAYMAN notes
+/* CAYMAN notes
Why CAYMAN got loops for lots of instructions is explained here.
-These 8xx t-slot only ops are implemented in all vector slots.
MUL_LIT, FLT_TO_UINT, INT_TO_FLT, UINT_TO_FLT
-These 8xx t-slot only opcodes become vector ops, with all four
-slots expecting the arguments on sources a and b. Result is
+These 8xx t-slot only opcodes become vector ops, with all four
+slots expecting the arguments on sources a and b. Result is
broadcast to all channels.
MULLO_INT, MULHI_INT, MULLO_UINT, MULHI_UINT, MUL_64
-These 8xx t-slot only opcodes become vector ops in the z, y, and
+These 8xx t-slot only opcodes become vector ops in the z, y, and
x slots.
EXP_IEEE, LOG_IEEE/CLAMPED, RECIP_IEEE/CLAMPED/FF/INT/UINT/_64/CLAMPED_64
RECIPSQRT_IEEE/CLAMPED/FF/_64/CLAMPED_64
SQRT_IEEE/_64
SIN/COS
-The w slot may have an independent co-issued operation, or if the
-result is required to be in the w slot, the opcode above may be
+The w slot may have an independent co-issued operation, or if the
+result is required to be in the w slot, the opcode above may be
issued in the w slot as well.
The compiler must issue the source argument to slots z, y, and x
*/
@@ -344,7 +344,7 @@ struct r600_shader_ctx {
int next_ring_offset;
int gs_out_ring_offset;
int gs_next_vertex;
- struct r600_shader *gs_for_vs;
+ struct r600_shader const *gs_for_vs;
int gs_export_gpr_tregs[4];
const struct pipe_stream_output_info *gs_stream_output_info;
unsigned enabled_stream_buffers_mask;
@@ -2473,8 +2473,8 @@ static int emit_gs_ring_writes(struct r600_shader_ctx *ctx, const struct pipe_st
/* FIXME precompute offsets */
ring_offset = -1;
for(k = 0; k < ctx->gs_for_vs->ninput; ++k) {
- struct r600_shader_io *in = &ctx->gs_for_vs->input[k];
- struct r600_shader_io *out = &ctx->shader->output[i];
+ const struct r600_shader_io *in = &ctx->gs_for_vs->input[k];
+ const struct r600_shader_io *out = &ctx->shader->output[i];
if (in->name == out->name && in->sid == out->sid)
ring_offset = in->ring_offset;
}
@@ -3158,7 +3158,7 @@ static int r600_shader_from_tgsi(struct r600_context *rctx,
goto out_err;
}
}
-
+
shader->ring_item_sizes[0] = ctx.next_ring_offset;
shader->ring_item_sizes[1] = 0;
shader->ring_item_sizes[2] = 0;
@@ -4270,7 +4270,7 @@ static int cayman_emit_float_instr(struct r600_shader_ctx *ctx)
int i, j, r;
struct r600_bytecode_alu alu;
int last_slot = (inst->Dst[0].Register.WriteMask & 0x8) ? 4 : 3;
-
+
for (i = 0 ; i < last_slot; i++) {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ctx->inst_info->op;
@@ -4797,7 +4797,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx)
alu.last = 1;
} else
alu.dst.write = 0;
-
+
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
@@ -5273,7 +5273,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op)
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP1_FLT_TO_UINT;
-
+
alu.dst.sel = tmp0;
alu.dst.chan = 0;
alu.dst.write = 1;
@@ -5344,7 +5344,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op)
} else {
r600_bytecode_src(&alu.src[1], &ctx->src[1], i);
}
-
+
alu.last = 1;
if ((r = r600_bytecode_add_alu(ctx->bc, &alu)))
return r;
@@ -5610,7 +5610,7 @@ static int tgsi_divmod(struct r600_shader_ctx *ctx, int mod, int signed_op)
} else {
r600_bytecode_src(&alu.src[0], &ctx->src[1], i);
}
-
+
alu.src[1].sel = tmp0;
alu.src[1].chan = 2;
@@ -7012,7 +7012,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
- /* write initial compare value into Z component
+ /* write initial compare value into Z component
- W src 0 for shadow cube
- X src 1 for shadow cube array */
if (inst->Texture.Texture == TGSI_TEXTURE_SHADOWCUBE ||
@@ -7090,7 +7090,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
-
+
r = r600_bytecode_add_tex(ctx->bc, &tex);
if (r)
return r;
@@ -7417,7 +7417,7 @@ static int tgsi_tex(struct r600_shader_ctx *ctx)
/* does this shader want a num layers from TXQ for a cube array? */
if (has_txq_cube_array_z) {
int id = tgsi_tex_get_src_gpr(ctx, sampler_src_reg);
-
+
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
alu.op = ALU_OP1_MOV;
@@ -8071,10 +8071,10 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
alu.op = ALU_OP1_LOG_IEEE;
r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
r600_bytecode_src_set_abs(&alu.src[0]);
-
+
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = i;
- if (i == 0)
+ if (i == 0)
alu.dst.write = 1;
if (i == 2)
alu.last = 1;
@@ -8089,7 +8089,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
alu.op = ALU_OP1_LOG_IEEE;
r600_bytecode_src(&alu.src[0], &ctx->src[0], 0);
r600_bytecode_src_set_abs(&alu.src[0]);
-
+
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = 0;
alu.dst.write = 1;
@@ -8130,10 +8130,10 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
alu.dst.write = 1;
if (i == 2)
alu.last = 1;
-
+
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
- return r;
+ return r;
}
} else {
memset(&alu, 0, sizeof(struct r600_bytecode_alu));
@@ -8214,7 +8214,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
alu.dst.write = 1;
if (i == 2)
alu.last = 1;
-
+
r = r600_bytecode_add_alu(ctx->bc, &alu);
if (r)
return r;
@@ -8954,7 +8954,7 @@ static int tgsi_umad(struct r600_shader_ctx *ctx)
alu.src[0].sel = ctx->temp_reg;
alu.src[0].chan = i;
-
+
r600_bytecode_src(&alu.src[1], &ctx->src[2], i);
if (i == lasti) {
alu.last = 1;
diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c
index 998288dba2..9f758d45a2 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -687,10 +687,8 @@ static void si_clear(struct pipe_context *ctx, unsigned buffers,
}
if (buffers & PIPE_CLEAR_COLOR) {
- int i;
-
/* These buffers cannot use fast clear, make sure to disable expansion. */
- for (i = 0; i < fb->nr_cbufs; i++) {
+ for (unsigned i = 0; i < fb->nr_cbufs; i++) {
struct r600_texture *tex;
/* If not clearing this buffer, skip. */
--
2.12.2
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