[Mesa-dev] [PATCH v2 28/31] glsl: lower bindless sampler/image packed varyings
Samuel Pitoiset
samuel.pitoiset at gmail.com
Mon Apr 24 10:35:59 UTC 2017
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
---
src/compiler/glsl/lower_packed_varyings.cpp | 24 ++++++++++++++++++++----
1 file changed, 20 insertions(+), 4 deletions(-)
diff --git a/src/compiler/glsl/lower_packed_varyings.cpp b/src/compiler/glsl/lower_packed_varyings.cpp
index b1a3b49b1d..c9e1c66d48 100644
--- a/src/compiler/glsl/lower_packed_varyings.cpp
+++ b/src/compiler/glsl/lower_packed_varyings.cpp
@@ -383,6 +383,12 @@ lower_packed_varyings_visitor::bitwise_assign_pack(ir_rvalue *lhs,
rhs = u2i(expr(ir_unop_unpack_uint_2x32, rhs));
}
break;
+ case GLSL_TYPE_SAMPLER:
+ rhs = u2i(expr(ir_unop_unpack_sampler_2x32, rhs));
+ break;
+ case GLSL_TYPE_IMAGE:
+ rhs = u2i(expr(ir_unop_unpack_image_2x32, rhs));
+ break;
default:
assert(!"Unexpected type conversion while lowering varyings");
break;
@@ -462,6 +468,14 @@ lower_packed_varyings_visitor::bitwise_assign_unpack(ir_rvalue *lhs,
rhs = expr(ir_unop_pack_uint_2x32, i2u(rhs));
}
break;
+ case GLSL_TYPE_SAMPLER:
+ rhs = new(mem_ctx)
+ ir_expression(ir_unop_pack_sampler_2x32, lhs->type, i2u(rhs));
+ break;
+ case GLSL_TYPE_IMAGE:
+ rhs = new(mem_ctx)
+ ir_expression(ir_unop_pack_image_2x32, lhs->type, i2u(rhs));
+ break;
default:
assert(!"Unexpected type conversion while lowering varyings");
break;
@@ -501,6 +515,9 @@ lower_packed_varyings_visitor::lower_rvalue(ir_rvalue *rvalue,
unsigned vertex_index)
{
unsigned dmul = rvalue->type->is_64bit() ? 2 : 1;
+ unsigned vector_elements =
+ rvalue->type->is_sampler() ? 1 : rvalue->type->vector_elements;
+
/* When gs_input_toplevel is set, we should be looking at a geometry shader
* input array.
*/
@@ -534,8 +551,7 @@ lower_packed_varyings_visitor::lower_rvalue(ir_rvalue *rvalue,
return this->lower_arraylike(rvalue, rvalue->type->matrix_columns,
fine_location, unpacked_var, name,
false, vertex_index);
- } else if (rvalue->type->vector_elements * dmul +
- fine_location % 4 > 4) {
+ } else if (vector_elements * dmul + fine_location % 4 > 4) {
/* This vector is going to be "double parked" across two varying slots,
* so handle it as two separate assignments. For doubles, a dvec3/dvec4
* can end up being spread over 3 slots. However the second splitting
@@ -552,7 +568,7 @@ lower_packed_varyings_visitor::lower_rvalue(ir_rvalue *rvalue,
/* We might actually end up with 0 left components! */
left_components /= 2;
}
- right_components = rvalue->type->vector_elements - left_components;
+ right_components = vector_elements - left_components;
for (unsigned i = 0; i < left_components; i++) {
left_swizzle_values[i] = i;
@@ -585,7 +601,7 @@ lower_packed_varyings_visitor::lower_rvalue(ir_rvalue *rvalue,
* varying.
*/
unsigned swizzle_values[4] = { 0, 0, 0, 0 };
- unsigned components = rvalue->type->vector_elements * dmul;
+ unsigned components = vector_elements * dmul;
unsigned location = fine_location / 4;
unsigned location_frac = fine_location % 4;
for (unsigned i = 0; i < components; ++i)
--
2.12.2
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