[Mesa-dev] [PATCH v02 36/37] i965: Port gen6+ 3DSTATE_CC_STATE_POINTERS state to genxml.
Rafael Antognolli
rafael.antognolli at intel.com
Mon Apr 24 22:19:31 UTC 2017
Signed-off-by: Rafael Antognolli <rafael.antognolli at intel.com>
---
src/mesa/drivers/dri/i965/Makefile.sources | 1 +-
src/mesa/drivers/dri/i965/brw_state.h | 1 +-
src/mesa/drivers/dri/i965/gen6_cc.c | 90 +--------------------
src/mesa/drivers/dri/i965/genX_state_upload.c | 53 +++++++++++-
4 files changed, 50 insertions(+), 95 deletions(-)
delete mode 100644 src/mesa/drivers/dri/i965/gen6_cc.c
diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources
index b52b08b..098ceba 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -76,7 +76,6 @@ i965_FILES = \
brw_wm.h \
brw_wm_state.c \
brw_wm_surface_state.c \
- gen6_cc.c \
gen6_clip_state.c \
gen6_constant_state.c \
gen6_depth_state.c \
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 2b5b1c4..29e83cb 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -107,7 +107,6 @@ extern const struct brw_tracked_state brw_index_buffer;
extern const struct brw_tracked_state brw_cs_state;
extern const struct brw_tracked_state gen7_cs_push_constants;
extern const struct brw_tracked_state gen6_binding_table_pointers;
-extern const struct brw_tracked_state gen6_color_calc_state;
extern const struct brw_tracked_state gen6_gs_binding_table;
extern const struct brw_tracked_state gen6_renderbuffer_surfaces;
extern const struct brw_tracked_state gen6_sampler_state;
diff --git a/src/mesa/drivers/dri/i965/gen6_cc.c b/src/mesa/drivers/dri/i965/gen6_cc.c
deleted file mode 100644
index 688362f..0000000
--- a/src/mesa/drivers/dri/i965/gen6_cc.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * Copyright © 2009 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- * Authors:
- * Eric Anholt <eric at anholt.net>
- *
- */
-
-#include "brw_context.h"
-#include "brw_state.h"
-#include "brw_defines.h"
-#include "brw_util.h"
-#include "intel_batchbuffer.h"
-#include "main/macros.h"
-#include "main/enums.h"
-#include "main/glformats.h"
-#include "main/stencil.h"
-
-static void
-gen6_upload_color_calc_state(struct brw_context *brw)
-{
- struct gl_context *ctx = &brw->ctx;
- struct gen6_color_calc_state *cc;
-
- cc = brw_state_batch(brw, sizeof(*cc), 64, &brw->cc.state_offset);
- memset(cc, 0, sizeof(*cc));
-
- /* _NEW_COLOR */
- cc->cc0.alpha_test_format = BRW_ALPHATEST_FORMAT_UNORM8;
- UNCLAMPED_FLOAT_TO_UBYTE(cc->cc1.alpha_ref_fi.ui, ctx->Color.AlphaRef);
-
- if (brw->gen < 9) {
- /* _NEW_STENCIL */
- cc->cc0.stencil_ref = _mesa_get_stencil_ref(ctx, 0);
- cc->cc0.bf_stencil_ref =
- _mesa_get_stencil_ref(ctx, ctx->Stencil._BackFace);
- }
-
- /* _NEW_COLOR */
- cc->constant_r = ctx->Color.BlendColorUnclamped[0];
- cc->constant_g = ctx->Color.BlendColorUnclamped[1];
- cc->constant_b = ctx->Color.BlendColorUnclamped[2];
- cc->constant_a = ctx->Color.BlendColorUnclamped[3];
-
- /* Point the GPU at the new indirect state. */
- if (brw->gen == 6) {
- BEGIN_BATCH(4);
- OUT_BATCH(_3DSTATE_CC_STATE_POINTERS << 16 | (4 - 2));
- OUT_BATCH(0);
- OUT_BATCH(0);
- OUT_BATCH(brw->cc.state_offset | 1);
- ADVANCE_BATCH();
- } else {
- BEGIN_BATCH(2);
- OUT_BATCH(_3DSTATE_CC_STATE_POINTERS << 16 | (2 - 2));
- OUT_BATCH(brw->cc.state_offset | 1);
- ADVANCE_BATCH();
- }
-}
-
-const struct brw_tracked_state gen6_color_calc_state = {
- .dirty = {
- .mesa = _NEW_COLOR |
- _NEW_STENCIL,
- .brw = BRW_NEW_BATCH |
- BRW_NEW_BLORP |
- BRW_NEW_CC_STATE |
- BRW_NEW_STATE_BASE_ADDRESS,
- },
- .emit = gen6_upload_color_calc_state,
-};
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c
index 77c9efc..273764a 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -3199,6 +3199,53 @@ static const struct brw_tracked_state genX(multisample_state) = {
.emit = genX(upload_multisample_state)
};
+/* ---------------------------------------------------------------------- */
+
+static void
+genX(upload_color_calc_state)(struct brw_context *brw)
+{
+ struct gl_context *ctx = &brw->ctx;
+
+ brw_state_emit(brw, GENX(COLOR_CALC_STATE), 64, &brw->cc.state_offset, cc) {
+ /* _NEW_COLOR */
+ cc.AlphaTestFormat = ALPHATEST_UNORM8;
+ UNCLAMPED_FLOAT_TO_UBYTE(cc.AlphaReferenceValueAsUNORM8,
+ ctx->Color.AlphaRef);
+
+#if GEN_GEN < 9
+ /* _NEW_STENCIL */
+ cc.StencilReferenceValue = _mesa_get_stencil_ref(ctx, 0);
+ cc.BackfaceStencilReferenceValue =
+ _mesa_get_stencil_ref(ctx, ctx->Stencil._BackFace);
+#endif
+
+ /* _NEW_COLOR */
+ cc.BlendConstantColorRed = ctx->Color.BlendColorUnclamped[0];
+ cc.BlendConstantColorGreen = ctx->Color.BlendColorUnclamped[1];
+ cc.BlendConstantColorBlue = ctx->Color.BlendColorUnclamped[2];
+ cc.BlendConstantColorAlpha = ctx->Color.BlendColorUnclamped[3];
+ }
+
+ brw_batch_emit(brw, GENX(3DSTATE_CC_STATE_POINTERS), ptr) {
+ ptr.ColorCalcStatePointer = brw->cc.state_offset;
+#if GEN_GEN != 7
+ ptr.ColorCalcStatePointerValid = true;
+#endif
+ }
+}
+
+static const struct brw_tracked_state genX(color_calc_state) = {
+ .dirty = {
+ .mesa = _NEW_COLOR |
+ _NEW_STENCIL,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
+ BRW_NEW_CC_STATE |
+ BRW_NEW_STATE_BASE_ADDRESS,
+ },
+ .emit = genX(upload_color_calc_state),
+};
+
#endif
/* ---------------------------------------------------------------------- */
@@ -4346,7 +4393,7 @@ genX(init_atoms)(struct brw_context *brw)
&gen6_urb,
&genX(blend_state), /* must do before cc unit */
- &gen6_color_calc_state, /* must do before cc unit */
+ &genX(color_calc_state), /* must do before cc unit */
&gen6_depth_stencil_state, /* must do before cc unit */
&genX(vs_push_constants), /* Before vs_state */
@@ -4411,7 +4458,7 @@ genX(init_atoms)(struct brw_context *brw)
&gen7_push_constant_space,
&gen7_urb,
&genX(blend_state), /* must do before cc unit */
- &gen6_color_calc_state, /* must do before cc unit */
+ &genX(color_calc_state), /* must do before cc unit */
&genX(depth_stencil_state), /* must do before cc unit */
&brw_vs_image_surfaces, /* Before vs push/pull constants and binding table */
@@ -4499,7 +4546,7 @@ genX(init_atoms)(struct brw_context *brw)
&gen7_push_constant_space,
&gen7_urb,
&genX(blend_state),
- &gen6_color_calc_state,
+ &genX(color_calc_state),
&brw_vs_image_surfaces, /* Before vs push/pull constants and binding table */
&brw_tcs_image_surfaces, /* Before tcs push/pull constants and binding table */
--
git-series 0.9.1
More information about the mesa-dev
mailing list