[Mesa-dev] [PATCH 4/4] nv50, nvc0: disable the TGSI merge registers pass
Samuel Pitoiset
samuel.pitoiset at gmail.com
Mon Apr 24 22:31:49 UTC 2017
shader-db results on GK106 (Thanks Karol):
total instructions in shared programs : 3931608 -> 3929463 (-0.05%)
total gprs used in shared programs : 481255 -> 479014 (-0.47%)
total local used in shared programs : 27481 -> 27381 (-0.36%)
total bytes used in shared programs : 36031256 -> 36011120 (-0.06%)
local gpr inst bytes
helped 14 1471 1309 1309
hurt 1 88 384 384
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
---
src/gallium/drivers/nouveau/nv50/nv50_screen.c | 3 ++-
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
index 3c35cf46d5..82e666a39e 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
@@ -341,6 +341,8 @@ nv50_screen_get_shader_param(struct pipe_screen *pscreen,
return 0; /* please inline, or provide function declarations */
case PIPE_SHADER_CAP_INTEGERS:
return 1;
+ case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
+ return 1;
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
/* The chip could handle more sampler views than samplers */
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
@@ -357,7 +359,6 @@ nv50_screen_get_shader_param(struct pipe_screen *pscreen,
case PIPE_SHADER_CAP_SUPPORTED_IRS:
case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
- case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
return 0;
default:
NOUVEAU_ERR("unknown PIPE_SHADER_CAP %d\n", param);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 01c260292f..ad99e17eaf 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -387,10 +387,11 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen,
return 1;
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
return 1;
+ case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
+ return 1;
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
- case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
return 0;
case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
return NVC0_MAX_BUFFERS;
--
2.12.2
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