[Mesa-dev] [RFC] intel: Common MOCS metadata straw-man
Jason Ekstrand
jason at jlekstrand.net
Tue Aug 1 22:38:34 UTC 2017
This is more of a straw-man patch than something I intend to land today.
The idea is to come up with some central way of representing MOCS that
we can use from either GL or Vulkan. I have no idea if this is how we
want to represent MOCS or not. There are many alternative approaches:
1) Having a selection function that takes a devinfo and a fiew pieces
of data and returns a mocs value based on some sort of weights.
2) Using a finitely enumerated set of values (the kernel already has
such an enum) and simply map them onto something "sensible" for
older hardware generations
3) ...
I have no idea whether or not this approach of having a table full of
metadata is useful or not. With the table, one could implement (1)
above by just walking the table. However, this is way more complex than
needed for mesa today. I'll be sending out some ISL patches shortly
which take a completely different approach. Thoughs?
Cc: Ben Widawsky <ben at bwidawsk.net>
Cc: Francisco Jerez <currojerez at riseup.net>
Cc: Kenneth Graunke <kenneth at whitecape.org>
---
src/intel/common/gen_mocs.c | 115 ++++++++++++++++++++++++++++++++++++++++++++
src/intel/common/gen_mocs.h | 71 +++++++++++++++++++++++++++
2 files changed, 186 insertions(+)
create mode 100644 src/intel/common/gen_mocs.c
create mode 100644 src/intel/common/gen_mocs.h
diff --git a/src/intel/common/gen_mocs.c b/src/intel/common/gen_mocs.c
new file mode 100644
index 0000000..544deec
--- /dev/null
+++ b/src/intel/common/gen_mocs.c
@@ -0,0 +1,115 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "gen_mocs.h"
+
+/* Get rid of some prefixes */
+#define CC_UC GEN_MOCS_CC_UC
+#define CC_WB GEN_MOCS_CC_WB
+#define CC_WT GEN_MOCS_CC_WT
+#define CC_PTE GEN_MOCS_CC_PTE
+
+static const struct gen_mocs_info snb_mocs[] = {
+ { .mocs = 0x0, .l3 = CC_PTE, .llc = CC_PTE, .ellc = CC_UC },
+ { .mocs = MOCS_INVALID }
+};
+
+static const struct gen_mocs_info ivb_mocs[] = {
+ { .mocs = 0x1, .l3 = CC_WB, .llc = CC_PTE, .ellc = CC_UC },
+ { .mocs = MOCS_INVALID }
+};
+
+static const struct gen_mocs_info byt_mocs[] = {
+ { .mocs = 0x1, .l3 = CC_WB, .llc = CC_UC, .ellc = CC_UC },
+ { .mocs = MOCS_INVALID }
+};
+
+static const struct gen_mocs_info hsw_mocs[] = {
+ { .mocs = 0x1, .l3 = CC_WB, .llc = CC_PTE, .ellc = CC_PTE },
+ { .mocs = MOCS_INVALID }
+};
+
+static const struct gen_mocs_info bdw_mocs[] = {
+ { .mocs = 0x78, .l3 = CC_WB, .llc = CC_WB, .ellc = CC_WB },
+ { .mocs = 0x58, .l3 = CC_WB, .llc = CC_WT, .ellc = CC_WT },
+ { .mocs = 0x18, .l3 = CC_WB, .llc = CC_PTE, .ellc = CC_PTE },
+ { .mocs = MOCS_INVALID }
+};
+
+static const struct gen_mocs_info chv_mocs[] = {
+ { .mocs = 0x78, .l3 = CC_WB, .llc = CC_UC, .ellc = CC_UC },
+ { .mocs = 0x18, .l3 = CC_UC, .llc = CC_UC, .ellc = CC_UC },
+ { .mocs = MOCS_INVALID }
+};
+
+static const struct gen_mocs_info skl_mocs[] = {
+ { .mocs = 0, .l3 = CC_UC, .llc = CC_UC, .ellc = CC_UC },
+ { .mocs = 1, .l3 = CC_PTE, .llc = CC_PTE, .ellc = CC_PTE },
+ { .mocs = 3, .l3 = CC_WB, .llc = CC_WB, .ellc = CC_WB },
+ { .mocs = MOCS_INVALID }
+};
+
+static const struct gen_mocs_info bxt_mocs[] = {
+ { .mocs = 0, .l3 = CC_UC, .llc = CC_UC, .ellc = CC_UC },
+ { .mocs = 1, .l3 = CC_PTE, .llc = CC_UC, .ellc = CC_UC },
+ { .mocs = 3, .l3 = CC_WB, .llc = CC_UC, .ellc = CC_UC },
+ { .mocs = MOCS_INVALID }
+};
+
+/* Sky Lake and Cannon Lake tables are the same today */
+static const struct gen_mocs_info *cnl_mocs = skl_mocs;
+
+const struct gen_mocs_info *
+gen_get_mocs_table(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 6:
+ return snb_mocs;
+
+ case 7:
+ if (devinfo->is_baytrail)
+ return byt_mocs;
+ else if (devinfo->is_haswell)
+ return hsw_mocs;
+ else
+ return ivb_mocs;
+
+ case 8:
+ if (devinfo->is_cherryview)
+ return chv_mocs;
+ else
+ return bdw_mocs;
+
+ case 9:
+ if (devinfo->is_broxton)
+ return bxt_mocs;
+ else
+ return skl_mocs;
+
+ case 10:
+ return cnl_mocs;
+
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
diff --git a/src/intel/common/gen_mocs.h b/src/intel/common/gen_mocs.h
new file mode 100644
index 0000000..be2b126
--- /dev/null
+++ b/src/intel/common/gen_mocs.h
@@ -0,0 +1,71 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#ifndef GEN_MOCS_H
+#define GEN_MOCS_H
+
+#include <stdint.h>
+
+enum gen_mocs_cacheability_control {
+ /** Uncached */
+ GEN_MOCS_CC_UC,
+
+ /** Write-back cached */
+ GEN_MOCS_CC_WB,
+
+ /** Write-through cached */
+ GEN_MOCS_CC_WT,
+
+ /** Use the cacheability control values from the page table entry */
+ GEN_MOCS_CC_PTE,
+}
+
+#define MOCS_INVALID UINT8_MAX
+
+struct gen_mocs_info {
+ /** MOCS value to program into the hardware
+ *
+ * On gen8 and earlier, this will contain the actual bits for the memory
+ * object control state. On gen9 and above, this will be an index into the
+ * kernel MOCS table.
+ */
+ uint8_t mocs;
+
+ /** Cacheability in the L3$ */
+ enum gen_mocs_cacheability_control l3:2;
+
+ /** Cacheability in the LLC */
+ enum gen_mocs_cacheability_control llc:2;
+
+ /** Cacheability in eLLC (or eDRAM) */
+ enum gen_mocs_cacheability_control ellc:2;
+};
+
+/** Returns an array of gen_mocs_info for the given device
+ *
+ * The array will be terminated with a dummy entry with mocs == MOCS_INVALID.
+ */
+const struct gen_mocs_info *
+gen_get_mocs_table(const struct gen_device_info *devinfo);
+
+#endif /* GEN_MOCS_H */
--
2.5.0.400.gff86faf
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