[Mesa-dev] [PATCH 1/5] intel/isl: Set MOCS based on usage for surface states

[Jason Ekstrand]

This makes ISL now ignore the MOCS data provided by the caller and just
set it based on surface usage.
---
 src/intel/isl/isl_emit_depth_stencil.c | 12 ++++----
 src/intel/isl/isl_genX_mocs.h          | 53 ++++++++++++++++++++++++++++++++++
 src/intel/isl/isl_surface_state.c      |  9 +++---
 3 files changed, 65 insertions(+), 9 deletions(-)
 create mode 100644 src/intel/isl/isl_genX_mocs.h

diff --git a/src/intel/isl/isl_emit_depth_stencil.c b/src/intel/isl/isl_emit_depth_stencil.c
index 0d541fd..212ed88 100644
--- a/src/intel/isl/isl_emit_depth_stencil.c
+++ b/src/intel/isl/isl_emit_depth_stencil.c
@@ -23,6 +23,9 @@
 
 #include <stdint.h>
 
+#include "isl_priv.h"
+#include "isl_genX_mocs.h"
+
 #define __gen_address_type uint64_t
 #define __gen_user_data void
 
@@ -35,8 +38,6 @@ __gen_combine_address(void *data, void *loc, uint64_t addr, uint32_t delta)
 #include "genxml/gen_macros.h"
 #include "genxml/genX_pack.h"
 
-#include "isl_priv.h"
-
 #define __PASTE2(x, y) x ## y
 #define __PASTE(x, y) __PASTE2(x, y)
 #define isl_genX(x) __PASTE(isl_, genX(x))
@@ -96,7 +97,7 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch,
 #endif
       db.SurfaceBaseAddress = info->depth_address;
 #if GEN_GEN >= 6
-      db.DepthBufferMOCS = info->mocs;
+      db.DepthBufferMOCS = get_mocs_for_usage(ISL_SURF_USAGE_DEPTH_BIT);
 #endif
 
 #if GEN_GEN <= 6
@@ -140,7 +141,7 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch,
 #endif
       sb.SurfaceBaseAddress = info->stencil_address;
 #if GEN_GEN >= 6
-      sb.StencilBufferMOCS = info->mocs;
+      sb.StencilBufferMOCS = get_mocs_for_usage(ISL_SURF_USAGE_STENCIL_BIT);
 #endif
       sb.SurfacePitch = info->stencil_surf->row_pitch - 1;
 #if GEN_GEN >= 8
@@ -163,7 +164,8 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch,
       db.HierarchicalDepthBufferEnable = true;
 
       hiz.SurfaceBaseAddress = info->hiz_address;
-      hiz.HierarchicalDepthBufferMOCS = info->mocs;
+      hiz.HierarchicalDepthBufferMOCS =
+         get_mocs_for_usage(ISL_SURF_USAGE_HIZ_BIT);
       hiz.SurfacePitch = info->hiz_surf->row_pitch - 1;
 #if GEN_GEN >= 8
       /* From the SKL PRM Vol2a:
diff --git a/src/intel/isl/isl_genX_mocs.h b/src/intel/isl/isl_genX_mocs.h
new file mode 100644
index 0000000..158ebec
--- /dev/null
+++ b/src/intel/isl/isl_genX_mocs.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright 2017 Intel Corporation
+ *
+ *  Permission is hereby granted, free of charge, to any person obtaining a
+ *  copy of this software and associated documentation files (the "Software"),
+ *  to deal in the Software without restriction, including without limitation
+ *  the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ *  and/or sell copies of the Software, and to permit persons to whom the
+ *  Software is furnished to do so, subject to the following conditions:
+ *
+ *  The above copyright notice and this permission notice (including the next
+ *  paragraph) shall be included in all copies or substantial portions of the
+ *  Software.
+ *
+ *  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ *  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ *  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ *  THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ *  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *  FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ *  IN THE SOFTWARE.
+ */
+
+#include <i915_drm.h>
+
+#include "isl_priv.h"
+
+#include "genxml/gen_macros.h"
+
+#if GEN_GEN >= 6
+static uint32_t
+get_mocs_for_usage(isl_surf_usage_flags_t usage)
+{
+#if GEN_GEN == 6
+   return 0; /* PTE */
+#elif GEN_GEN == 7
+   return 1; /* Cache in L3$, LLC and eLLC use PTE */
+#elif GEN_GEN == 8
+   if (usage & ISL_SURF_USAGE_RENDER_TARGET_BIT)
+      return 0x18; /* LLC and eLLC use PTE */
+   else
+      return 0x78; /* LLC and eLLC are forced to WB */
+#elif GEN_GEN >= 9
+   /* We have to shift by one because of a reserved bit in the MOCS field */
+   if (usage & ISL_SURF_USAGE_RENDER_TARGET_BIT)
+      return I915_MOCS_PTE << 1;
+   else
+      return I915_MOCS_CACHED << 1;
+#else
+#  error "Unknown hardware generation"
+#endif
+}
+#endif
diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c
index e8bdb65..66b5add 100644
--- a/src/intel/isl/isl_surface_state.c
+++ b/src/intel/isl/isl_surface_state.c
@@ -23,6 +23,9 @@
 
 #include <stdint.h>
 
+#include "isl_priv.h"
+#include "isl_genX_mocs.h"
+
 #define __gen_address_type uint64_t
 #define __gen_user_data void
 
@@ -35,8 +38,6 @@ __gen_combine_address(void *data, void *loc, uint64_t addr, uint32_t delta)
 #include "genxml/gen_macros.h"
 #include "genxml/genX_pack.h"
 
-#include "isl_priv.h"
-
 #define __PASTE2(x, y) x ## y
 #define __PASTE(x, y) __PASTE2(x, y)
 #define isl_genX(x) __PASTE(isl_, genX(x))
@@ -518,7 +519,7 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state,
    s.SurfaceBaseAddress = info->address;
 
 #if GEN_GEN >= 6
-   s.MOCS = info->mocs;
+   s.MOCS = get_mocs_for_usage(info->view->usage);
 #endif
 
 #if GEN_GEN > 4 || GEN_IS_G4X
@@ -745,7 +746,7 @@ isl_genX(buffer_fill_state_s)(void *state,
 
    s.SurfaceBaseAddress = info->address;
 #if GEN_GEN >= 6
-   s.MOCS = info->mocs;
+   s.MOCS = get_mocs_for_usage(0);
 #endif
 
 #if (GEN_GEN >= 8 || GEN_IS_HASWELL)
-- 
2.5.0.400.gff86faf