[Mesa-dev] [PATCH 11/12] i965: Use snooping for mapping the miptree

[Chris Wilson]

Avoid having to clflush after blitting the miptree to a linear buffer
for mapping by enabling snooping on !llc and treating the buffer as
coherent. Similarly, it avoids the clflush afterwards if used for
READ | WRITE.
---
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 858279fcba..3b5e5595d7 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2955,11 +2955,16 @@ intel_miptree_map_blit(struct brw_context *brw,
                                          map->w, map->h, 1,
                                          /* samples */ 1,
                                          MIPTREE_LAYOUT_TILING_NONE);
-
    if (!map->linear_mt) {
       fprintf(stderr, "Failed to allocate blit temporary\n");
       goto fail;
    }
+
+   /* Make the GPU do the work of invalidating the CPU cache (using snoop on
+    * !llc), it's much faster than clflush!
+    */
+   brw_bo_set_cache_coherent(map->linear_mt->bo);
+
    map->stride = map->linear_mt->surf.row_pitch;
 
    /* One of either READ_BIT or WRITE_BIT or both is set.  READ_BIT implies no
@@ -3422,11 +3427,11 @@ use_intel_mipree_map_blit(struct brw_context *brw,
                           unsigned int level,
                           unsigned int slice)
 {
-   if (brw->has_llc &&
-      /* It's probably not worth swapping to the blit ring because of
-       * all the overhead involved.
-       */
-       !(mode & GL_MAP_WRITE_BIT) &&
+   /* It's probably not worth swapping to the blit ring because of
+    * all the overhead involved.
+    */
+
+   if (!(mode & GL_MAP_WRITE_BIT) &&
        !mt->compressed &&
        (mt->surf.tiling == ISL_TILING_X ||
         /* Prior to Sandybridge, the blitter can't handle Y tiling */
-- 
2.13.3