[Mesa-dev] [PATCH 10/11] radeonsi: expose the number of decompress calls to the HUD
Marek Olšák
maraeo at gmail.com
Sun Aug 6 22:20:25 UTC 2017
From: Marek Olšák <marek.olsak at amd.com>
---
src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
src/gallium/drivers/radeon/r600_query.c | 7 +++++++
src/gallium/drivers/radeon/r600_query.h | 1 +
src/gallium/drivers/radeonsi/si_state_draw.c | 18 +++++++++++-------
4 files changed, 20 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index b02f9f0..a996b27 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -581,20 +581,21 @@ struct r600_common_context {
unsigned flags; /* flush flags */
/* Queries. */
/* Maintain the list of active queries for pausing between IBs. */
int num_occlusion_queries;
int num_perfect_occlusion_queries;
struct list_head active_queries;
unsigned num_cs_dw_queries_suspend;
/* Misc stats. */
unsigned num_draw_calls;
+ unsigned num_decompress_calls;
unsigned num_mrt_draw_calls;
unsigned num_prim_restart_calls;
unsigned num_spill_draw_calls;
unsigned num_compute_calls;
unsigned num_spill_compute_calls;
unsigned num_dma_calls;
unsigned num_cp_dma_calls;
unsigned num_vs_flushes;
unsigned num_ps_flushes;
unsigned num_cs_flushes;
diff --git a/src/gallium/drivers/radeon/r600_query.c b/src/gallium/drivers/radeon/r600_query.c
index 5f1f712..03ea04d 100644
--- a/src/gallium/drivers/radeon/r600_query.c
+++ b/src/gallium/drivers/radeon/r600_query.c
@@ -94,20 +94,23 @@ static bool r600_query_sw_begin(struct r600_common_context *rctx,
struct r600_query_sw *query = (struct r600_query_sw *)rquery;
enum radeon_value_id ws_id;
switch(query->b.type) {
case PIPE_QUERY_TIMESTAMP_DISJOINT:
case PIPE_QUERY_GPU_FINISHED:
break;
case R600_QUERY_DRAW_CALLS:
query->begin_result = rctx->num_draw_calls;
break;
+ case R600_QUERY_DECOMPRESS_CALLS:
+ query->begin_result = rctx->num_decompress_calls;
+ break;
case R600_QUERY_MRT_DRAW_CALLS:
query->begin_result = rctx->num_mrt_draw_calls;
break;
case R600_QUERY_PRIM_RESTART_CALLS:
query->begin_result = rctx->num_prim_restart_calls;
break;
case R600_QUERY_SPILL_DRAW_CALLS:
query->begin_result = rctx->num_spill_draw_calls;
break;
case R600_QUERY_COMPUTE_CALLS:
@@ -251,20 +254,23 @@ static bool r600_query_sw_end(struct r600_common_context *rctx,
switch(query->b.type) {
case PIPE_QUERY_TIMESTAMP_DISJOINT:
break;
case PIPE_QUERY_GPU_FINISHED:
rctx->b.flush(&rctx->b, &query->fence, PIPE_FLUSH_DEFERRED);
break;
case R600_QUERY_DRAW_CALLS:
query->end_result = rctx->num_draw_calls;
break;
+ case R600_QUERY_DECOMPRESS_CALLS:
+ query->end_result = rctx->num_decompress_calls;
+ break;
case R600_QUERY_MRT_DRAW_CALLS:
query->end_result = rctx->num_mrt_draw_calls;
break;
case R600_QUERY_PRIM_RESTART_CALLS:
query->end_result = rctx->num_prim_restart_calls;
break;
case R600_QUERY_SPILL_DRAW_CALLS:
query->end_result = rctx->num_spill_draw_calls;
break;
case R600_QUERY_COMPUTE_CALLS:
@@ -1985,20 +1991,21 @@ void r600_query_fix_enabled_rb_mask(struct r600_common_screen *rscreen)
XFULL(name_, query_type_, type_, result_type_, ~(unsigned)0)
#define XG(group_, name_, query_type_, type_, result_type_) \
XFULL(name_, query_type_, type_, result_type_, R600_QUERY_GROUP_##group_)
static struct pipe_driver_query_info r600_driver_query_list[] = {
X("num-compilations", NUM_COMPILATIONS, UINT64, CUMULATIVE),
X("num-shaders-created", NUM_SHADERS_CREATED, UINT64, CUMULATIVE),
X("num-shader-cache-hits", NUM_SHADER_CACHE_HITS, UINT64, CUMULATIVE),
X("draw-calls", DRAW_CALLS, UINT64, AVERAGE),
+ X("decompress-calls", DECOMPRESS_CALLS, UINT64, AVERAGE),
X("MRT-draw-calls", MRT_DRAW_CALLS, UINT64, AVERAGE),
X("prim-restart-calls", PRIM_RESTART_CALLS, UINT64, AVERAGE),
X("spill-draw-calls", SPILL_DRAW_CALLS, UINT64, AVERAGE),
X("compute-calls", COMPUTE_CALLS, UINT64, AVERAGE),
X("spill-compute-calls", SPILL_COMPUTE_CALLS, UINT64, AVERAGE),
X("dma-calls", DMA_CALLS, UINT64, AVERAGE),
X("cp-dma-calls", CP_DMA_CALLS, UINT64, AVERAGE),
X("num-vs-flushes", NUM_VS_FLUSHES, UINT64, AVERAGE),
X("num-ps-flushes", NUM_PS_FLUSHES, UINT64, AVERAGE),
X("num-cs-flushes", NUM_CS_FLUSHES, UINT64, AVERAGE),
diff --git a/src/gallium/drivers/radeon/r600_query.h b/src/gallium/drivers/radeon/r600_query.h
index ca27be5..815dc7f 100644
--- a/src/gallium/drivers/radeon/r600_query.h
+++ b/src/gallium/drivers/radeon/r600_query.h
@@ -35,20 +35,21 @@ struct pipe_query;
struct pipe_resource;
struct r600_common_context;
struct r600_common_screen;
struct r600_query;
struct r600_query_hw;
struct r600_resource;
enum {
R600_QUERY_DRAW_CALLS = PIPE_QUERY_DRIVER_SPECIFIC,
+ R600_QUERY_DECOMPRESS_CALLS,
R600_QUERY_MRT_DRAW_CALLS,
R600_QUERY_PRIM_RESTART_CALLS,
R600_QUERY_SPILL_DRAW_CALLS,
R600_QUERY_COMPUTE_CALLS,
R600_QUERY_SPILL_COMPUTE_CALLS,
R600_QUERY_DMA_CALLS,
R600_QUERY_CP_DMA_CALLS,
R600_QUERY_NUM_VS_FLUSHES,
R600_QUERY_NUM_PS_FLUSHES,
R600_QUERY_NUM_CS_FLUSHES,
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 605dfdb..9df5b7a 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -1387,27 +1387,31 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
/* Workaround for a VGT hang when streamout is enabled.
* It must be done after drawing. */
if ((sctx->b.family == CHIP_HAWAII ||
sctx->b.family == CHIP_TONGA ||
sctx->b.family == CHIP_FIJI) &&
r600_get_strmout_en(&sctx->b)) {
sctx->b.flags |= SI_CONTEXT_VGT_STREAMOUT_SYNC;
}
- sctx->b.num_draw_calls++;
- if (sctx->framebuffer.state.nr_cbufs > 1)
- sctx->b.num_mrt_draw_calls++;
- if (info->primitive_restart)
- sctx->b.num_prim_restart_calls++;
- if (G_0286E8_WAVESIZE(sctx->spi_tmpring_size))
- sctx->b.num_spill_draw_calls++;
+ if (unlikely(sctx->decompression_enabled)) {
+ sctx->b.num_decompress_calls++;
+ } else {
+ sctx->b.num_draw_calls++;
+ if (sctx->framebuffer.state.nr_cbufs > 1)
+ sctx->b.num_mrt_draw_calls++;
+ if (info->primitive_restart)
+ sctx->b.num_prim_restart_calls++;
+ if (G_0286E8_WAVESIZE(sctx->spi_tmpring_size))
+ sctx->b.num_spill_draw_calls++;
+ }
if (index_size && indexbuf != info->index.resource)
pipe_resource_reference(&indexbuf, NULL);
}
void si_trace_emit(struct si_context *sctx)
{
struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
sctx->trace_id++;
radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, sctx->trace_buf,
--
2.7.4
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