[Mesa-dev] [PATCH] [rfc] ac/surface: always increase dcc size alignment.

Dave Airlie airlied at gmail.com
Mon Aug 14 05:01:36 UTC 2017

From: Dave Airlie <airlied at redhat.com>

So with tile swizzle, and dcc enabled, the vrdashboard GL app
generates a bunch of VM faults, this fixes it, however
it now sometimes generates garbage, but I'm just sending this
out to have some place to start.

(it could be a tile swizzle import/export issue still).

Signed-off-by: Dave Airlie <airlied at redhat.com>
 src/amd/common/ac_surface.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c
index 823a65d..1203c2f 100644
--- a/src/amd/common/ac_surface.c
+++ b/src/amd/common/ac_surface.c
@@ -733,7 +733,7 @@ static int gfx6_compute_surface(ADDR_HANDLE addrlib,
 	 * This is what addrlib does, but calling addrlib would be a lot more
 	 * complicated.
-	if (surf->dcc_size && config->info.levels > 1) {
+	if (surf->dcc_size) {
 		/* The smallest miplevels that are never compressed by DCC
 		 * still read the DCC buffer via TC if the base level uses DCC,
 		 * and for some reason the DCC buffer needs to be larger if

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