[Mesa-dev] [PATCH 05/20] radeon/uvd: add mjpeg support
Leo Liu
leo.liu at amd.com
Tue Aug 15 20:08:23 UTC 2017
There is no need of dpb buffer for mjpeg codec
Signed-off-by: Leo Liu <leo.liu at amd.com>
---
src/gallium/drivers/radeon/radeon_uvd.c | 31 ++++++++++++++++++++-----------
1 file changed, 20 insertions(+), 11 deletions(-)
diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c
index d5352d9de6..5e15f94de3 100644
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -220,6 +220,9 @@ static uint32_t profile2stream_type(struct ruvd_decoder *dec, unsigned family)
case PIPE_VIDEO_FORMAT_HEVC:
return RUVD_CODEC_H265;
+ case PIPE_VIDEO_FORMAT_MJPEG:
+ return RUVD_CODEC_MJPEG;
+
default:
assert(0);
return 0;
@@ -1091,7 +1094,8 @@ static void ruvd_end_frame(struct pipe_video_codec *decoder,
dec->msg->body.decode.height_in_samples = align(dec->msg->body.decode.height_in_samples, 16) / 16;
}
- dec->msg->body.decode.dpb_size = dec->dpb.res->buf->size;
+ if (dec->dpb.res)
+ dec->msg->body.decode.dpb_size = dec->dpb.res->buf->size;
dec->msg->body.decode.bsd_size = bs_size;
dec->msg->body.decode.db_pitch = align(dec->base.width, get_db_pitch_alignment(dec));
@@ -1138,6 +1142,9 @@ static void ruvd_end_frame(struct pipe_video_codec *decoder,
dec->msg->body.decode.codec.mpeg4 = get_mpeg4_msg(dec, (struct pipe_mpeg4_picture_desc*)picture);
break;
+ case PIPE_VIDEO_FORMAT_MJPEG:
+ break;
+
default:
assert(0);
return;
@@ -1151,8 +1158,10 @@ static void ruvd_end_frame(struct pipe_video_codec *decoder,
send_msg_buf(dec);
- send_cmd(dec, RUVD_CMD_DPB_BUFFER, dec->dpb.res->buf, 0,
- RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
+ if (dec->dpb.res)
+ send_cmd(dec, RUVD_CMD_DPB_BUFFER, dec->dpb.res->buf, 0,
+ RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
+
if (dec->ctx.res)
send_cmd(dec, RUVD_CMD_CONTEXT_BUFFER, dec->ctx.res->buf, 0,
RADEON_USAGE_READWRITE, RADEON_DOMAIN_VRAM);
@@ -1187,7 +1196,7 @@ struct pipe_video_codec *ruvd_create_decoder(struct pipe_context *context,
{
struct radeon_winsys* ws = ((struct r600_common_context *)context)->ws;
struct r600_common_context *rctx = (struct r600_common_context*)context;
- unsigned dpb_size;
+ unsigned dpb_size = 0;
unsigned width = templ->width, height = templ->height;
unsigned bs_buf_size;
struct radeon_info info;
@@ -1271,15 +1280,15 @@ struct pipe_video_codec *ruvd_create_decoder(struct pipe_context *context,
rvid_clear_buffer(context, &dec->bs_buffers[i]);
}
- dpb_size = calc_dpb_size(dec);
-
- if (!rvid_create_buffer(dec->screen, &dec->dpb, dpb_size, PIPE_USAGE_DEFAULT)) {
- RVID_ERR("Can't allocated dpb.\n");
- goto error;
+ if (dec->stream_type != RUVD_CODEC_MJPEG) {
+ dpb_size = calc_dpb_size(dec);
+ if (!rvid_create_buffer(dec->screen, &dec->dpb, dpb_size, PIPE_USAGE_DEFAULT)) {
+ RVID_ERR("Can't allocated dpb.\n");
+ goto error;
+ }
+ rvid_clear_buffer(context, &dec->dpb);
}
- rvid_clear_buffer(context, &dec->dpb);
-
if (dec->stream_type == RUVD_CODEC_H264_PERF && info.family >= CHIP_POLARIS10) {
unsigned ctx_size = calc_ctx_size_h264_perf(dec);
if (!rvid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT)) {
--
2.11.0
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