[Mesa-dev] [PATCH 11/45] i965/vec4: Handle 16-bit types at type_size_xvec4
Jason Ekstrand
jason at jlekstrand.net
Thu Aug 17 19:23:13 UTC 2017
On Thu, Jul 13, 2017 at 7:35 AM, Alejandro PiƱeiro <apinheiro at igalia.com>
wrote:
> These types have similar vec4 sizes as their 32-bit counterparts.
> ---
> src/intel/compiler/brw_vec4_visitor.cpp | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/src/intel/compiler/brw_vec4_visitor.cpp
> b/src/intel/compiler/brw_vec4_visitor.cpp
> index 22ee4dd..f5ae0bc 100644
> --- a/src/intel/compiler/brw_vec4_visitor.cpp
> +++ b/src/intel/compiler/brw_vec4_visitor.cpp
> @@ -583,8 +583,11 @@ type_size_xvec4(const struct glsl_type *type, bool
> as_vec4)
> case GLSL_TYPE_UINT:
> case GLSL_TYPE_INT:
> case GLSL_TYPE_FLOAT:
> + case GLSL_TYPE_HALF_FLOAT:
> case GLSL_TYPE_BOOL:
> case GLSL_TYPE_DOUBLE:
> + case GLSL_TYPE_UINT16:
> + case GLSL_TYPE_INT16:
>
Maybe make these hit the unreachable() because we'll probably never support
fp16 in vec4.
--Jason
> case GLSL_TYPE_UINT64:
> case GLSL_TYPE_INT64:
> if (type->is_matrix()) {
> --
> 2.9.3
>
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