[Mesa-dev] [PATCH] radeonsi/gfx9: add shader binary overallocation back

[Nicolai Hähnle]

So... do we really need this? I thought the summary of the internal 
discussion was that gfx9 prefetch was not supposed to cross page boundaries?

Cheers,
Nicolai


On 17.08.2017 00:49, Marek Olšák wrote:
> From: Marek Olšák <marek.olsak at amd.com>
> 
> Cc: 17.2 <mesa-stable at lists.freedesktop.org>
> ---
>   src/gallium/drivers/radeonsi/si_shader.c | 10 ++++++++++
>   1 file changed, 10 insertions(+)
> 
> diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
> index 3f4d847..6976537 100644
> --- a/src/gallium/drivers/radeonsi/si_shader.c
> +++ b/src/gallium/drivers/radeonsi/si_shader.c
> @@ -4913,20 +4913,30 @@ int si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader)
>   			   (!epilog ? mainb->rodata_size : 0);
>   	unsigned char *ptr;
>   
>   	assert(!prolog || !prolog->rodata_size);
>   	assert(!previous_stage || !previous_stage->rodata_size);
>   	assert(!prolog2 || !prolog2->rodata_size);
>   	assert((!prolog && !previous_stage && !prolog2 && !epilog) ||
>   	       !mainb->rodata_size);
>   	assert(!epilog || !epilog->rodata_size);
>   
> +	/* GFX9 can fetch two cache lines after the end of the shader.
> +	 * Prevent VM faults by overallocating the shader binary.
> +	 */
> +	if (sscreen->b.chip_class >= GFX9) {
> +		const unsigned icache_line_size = 64;
> +
> +		bo_size = align(bo_size, icache_line_size) +
> +			  icache_line_size * 2;
> +	}
> +
>   	r600_resource_reference(&shader->bo, NULL);
>   	shader->bo = (struct r600_resource*)
>   		     pipe_buffer_create(&sscreen->b.b, 0,
>   					PIPE_USAGE_IMMUTABLE,
>   					align(bo_size, SI_CPDMA_ALIGNMENT));
>   	if (!shader->bo)
>   		return -ENOMEM;
>   
>   	/* Upload. */
>   	ptr = sscreen->b.ws->buffer_map(shader->bo->buf, NULL,
> 


-- 
Lerne, wie die Welt wirklich ist,
Aber vergiss niemals, wie sie sein sollte.