[Mesa-dev] [PATCH 11/45] i965/vec4: Handle 16-bit types at type_size_xvec4

[Jason Ekstrand]

On August 21, 2017 12:27:33 AM Eduardo Lima Mitev <elima at igalia.com> wrote:

> On 08/17/2017 09:23 PM, Jason Ekstrand wrote:
>>
>>
>> On Thu, Jul 13, 2017 at 7:35 AM, Alejandro Piñeiro <apinheiro at igalia.com
>> <mailto:apinheiro at igalia.com>> wrote:
>>
>>     These types have similar vec4 sizes as their 32-bit counterparts.
>>     ---
>>      src/intel/compiler/brw_vec4_visitor.cpp | 3 +++
>>      1 file changed, 3 insertions(+)
>>
>>     diff --git a/src/intel/compiler/brw_vec4_visitor.cpp
>>     b/src/intel/compiler/brw_vec4_visitor.cpp
>>     index 22ee4dd..f5ae0bc 100644
>>     --- a/src/intel/compiler/brw_vec4_visitor.cpp
>>     +++ b/src/intel/compiler/brw_vec4_visitor.cpp
>>     @@ -583,8 +583,11 @@ type_size_xvec4(const struct glsl_type *type,
>>     bool as_vec4)
>>         case GLSL_TYPE_UINT:
>>         case GLSL_TYPE_INT:
>>         case GLSL_TYPE_FLOAT:
>>     +   case GLSL_TYPE_HALF_FLOAT:
>>         case GLSL_TYPE_BOOL:
>>         case GLSL_TYPE_DOUBLE:
>>     +   case GLSL_TYPE_UINT16:
>>     +   case GLSL_TYPE_INT16:
>>
>>
>> Maybe make these hit the unreachable() because we'll probably never
>> support fp16 in vec4.
>>
>
> Yes, but currently the FS backend calls type_size_xvec4() from
> fs_visitor::nir_setup_outputs(). So we still need to provide valid vec4
> sizes for 16-bit types.
>
> We could move the function somewhere else or duplicate the logic in FS,
> but it is simpler to keep this patch I think. WDYT?

For now, just drop a note to that effect on the commit message.  One of 
these days we should do something more intelligent.

>> --Jason
>>
>>
>>         case GLSL_TYPE_UINT64:
>>         case GLSL_TYPE_INT64:
>>            if (type->is_matrix()) {
>>     --
>>     2.9.3
>>
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>>
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>