[Mesa-dev] [PATCH 1/3] radeon/vcn: correct target buffer pitch calculation
Leo Liu
leo.liu at amd.com
Mon Aug 21 18:18:54 UTC 2017
since the way should be as same as UVD
Signed-off-by: Leo Liu <leo.liu at amd.com>
---
src/gallium/drivers/radeon/radeon_vcn_dec.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c
index a60b969a27..51391627d5 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_dec.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_dec.c
@@ -631,7 +631,7 @@ static struct pb_buffer *rvcn_dec_message_decode(struct radeon_decoder *dec,
decode->db_pitch = align(dec->base.width, 32);
decode->db_surf_tile_config = 0;
- decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.bpe;;
+ decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.blk_w;
decode->dt_uv_pitch = decode->dt_pitch / 2;
decode->dt_tiling_mode = 0;
--
2.11.0
More information about the mesa-dev
mailing list