[Mesa-dev] [PATCH 01/15] radeonsi/gfx9: properly handle imported textures with unexpected swizzle mode

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

Cc: 17.2 <mesa-stable at lists.freedesktop.org>
---
 src/amd/common/ac_surface.c               | 5 +++++
 src/gallium/drivers/radeon/r600_texture.c | 9 +++------
 2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c
index 823a65d..610071a 100644
--- a/src/amd/common/ac_surface.c
+++ b/src/amd/common/ac_surface.c
@@ -1037,20 +1037,25 @@ static int gfx9_compute_surface(ADDR_HANDLE addrlib,
 
 	switch (mode) {
 	case RADEON_SURF_MODE_LINEAR_ALIGNED:
 		assert(config->info.samples <= 1);
 		assert(!(surf->flags & RADEON_SURF_Z_OR_SBUFFER));
 		AddrSurfInfoIn.swizzleMode = ADDR_SW_LINEAR;
 		break;
 
 	case RADEON_SURF_MODE_1D:
 	case RADEON_SURF_MODE_2D:
+		if (surf->flags & RADEON_SURF_IMPORTED) {
+			AddrSurfInfoIn.swizzleMode = surf->u.gfx9.surf.swizzle_mode;
+			break;
+		}
+
 		r = gfx9_get_preferred_swizzle_mode(addrlib, &AddrSurfInfoIn, false,
 						    &AddrSurfInfoIn.swizzleMode);
 		if (r)
 			return r;
 		break;
 
 	default:
 		assert(0);
 	}
 
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index deedfaf..8a7f2cc 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -348,21 +348,23 @@ static void r600_surface_import_metadata(struct r600_common_screen *rscreen,
 					 enum radeon_surf_mode *array_mode,
 					 bool *is_scanout)
 {
 	if (rscreen->chip_class >= GFX9) {
 		if (metadata->u.gfx9.swizzle_mode > 0)
 			*array_mode = RADEON_SURF_MODE_2D;
 		else
 			*array_mode = RADEON_SURF_MODE_LINEAR_ALIGNED;
 
 		*is_scanout = metadata->u.gfx9.swizzle_mode == 0 ||
-			metadata->u.gfx9.swizzle_mode % 4 == 2;
+			      metadata->u.gfx9.swizzle_mode % 4 == 2;
+
+		surf->u.gfx9.surf.swizzle_mode = metadata->u.gfx9.swizzle_mode;
 	} else {
 		surf->u.legacy.pipe_config = metadata->u.legacy.pipe_config;
 		surf->u.legacy.bankw = metadata->u.legacy.bankw;
 		surf->u.legacy.bankh = metadata->u.legacy.bankh;
 		surf->u.legacy.tile_split = metadata->u.legacy.tile_split;
 		surf->u.legacy.mtilea = metadata->u.legacy.mtilea;
 		surf->u.legacy.num_banks = metadata->u.legacy.num_banks;
 
 		if (metadata->u.legacy.macrotile == RADEON_LAYOUT_TILED)
 			*array_mode = RADEON_SURF_MODE_2D;
@@ -1509,25 +1511,20 @@ static struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen
 	rtex = r600_texture_create_object(screen, templ, buf, &surface);
 	if (!rtex)
 		return NULL;
 
 	rtex->resource.b.is_shared = true;
 	rtex->resource.external_usage = usage;
 
 	if (rscreen->apply_opaque_metadata)
 		rscreen->apply_opaque_metadata(rscreen, rtex, &metadata);
 
-	/* Validate that addrlib arrived at the same surface parameters. */
-	if (rscreen->chip_class >= GFX9) {
-		assert(metadata.u.gfx9.swizzle_mode == surface.u.gfx9.surf.swizzle_mode);
-	}
-
 	assert(rtex->surface.tile_swizzle == 0);
 	return &rtex->resource.b.b;
 }
 
 bool r600_init_flushed_depth_texture(struct pipe_context *ctx,
 				     struct pipe_resource *texture,
 				     struct r600_texture **staging)
 {
 	struct r600_texture *rtex = (struct r600_texture*)texture;
 	struct pipe_resource resource;
-- 
2.7.4