[Mesa-dev] [PATCH 2/7] mesa/st: create add_buffer_to_load_and_stores() helper
Timothy Arceri
tarceri at itsqueeze.com
Tue Aug 22 12:14:18 UTC 2017
Will be used to add LOAD support to UBOs.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 46 ++++++++++++++++++------------
1 file changed, 27 insertions(+), 19 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 9688400ed4..f77c85a944 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -1240,20 +1240,46 @@ attrib_type_size(const struct glsl_type *type, bool is_vs_input)
{
return type->count_attribute_slots(is_vs_input);
}
static int
type_size(const struct glsl_type *type)
{
return type->count_attribute_slots(false);
}
+static void
+add_buffer_to_load_and_stores(glsl_to_tgsi_instruction *inst, st_src_reg *buf,
+ exec_list *instructions, ir_constant *access)
+{
+ /**
+ * emit_asm() might have actually split the op into pieces, e.g. for
+ * double stores. We have to go back and fix up all the generated ops.
+ */
+ unsigned op = inst->op;
+ do {
+ inst->resource = *buf;
+ if (access)
+ inst->buffer_access = access->value.u[0];
+
+ if (inst == instructions->get_head_raw())
+ break;
+ inst = (glsl_to_tgsi_instruction *)inst->get_prev();
+
+ if (inst->op == TGSI_OPCODE_UADD) {
+ if (inst == instructions->get_head_raw())
+ break;
+ inst = (glsl_to_tgsi_instruction *)inst->get_prev();
+ }
+ } while (inst->op == op && inst->resource.file == PROGRAM_UNDEFINED);
+}
+
/**
* If the given GLSL type is an array or matrix or a structure containing
* an array/matrix member, return true. Else return false.
*
* This is used to determine which kind of temp storage (PROGRAM_TEMPORARY
* or PROGRAM_ARRAY) should be used for variables of this type. Anytime
* we have an array that might be indexed with a variable, we need to use
* the later storage type.
*/
static bool
@@ -3635,39 +3661,21 @@ glsl_to_tgsi_visitor::visit_ssbo_intrinsic(ir_call *ir)
inst = emit_asm(ir, opcode, dst, off, data, data2);
}
param = param->get_next();
ir_constant *access = NULL;
if (!param->is_tail_sentinel()) {
access = ((ir_instruction *)param)->as_constant();
assert(access);
}
- /* The emit_asm() might have actually split the op into pieces, e.g. for
- * double stores. We have to go back and fix up all the generated ops.
- */
- unsigned op = inst->op;
- do {
- inst->resource = buffer;
- if (access)
- inst->buffer_access = access->value.u[0];
-
- if (inst == this->instructions.get_head_raw())
- break;
- inst = (glsl_to_tgsi_instruction *)inst->get_prev();
-
- if (inst->op == TGSI_OPCODE_UADD) {
- if (inst == this->instructions.get_head_raw())
- break;
- inst = (glsl_to_tgsi_instruction *)inst->get_prev();
- }
- } while (inst->op == op && inst->resource.file == PROGRAM_UNDEFINED);
+ add_buffer_to_load_and_stores(inst, &buffer, &this->instructions, access);
}
void
glsl_to_tgsi_visitor::visit_membar_intrinsic(ir_call *ir)
{
switch (ir->callee->intrinsic_id) {
case ir_intrinsic_memory_barrier:
emit_asm(ir, TGSI_OPCODE_MEMBAR, undef_dst,
st_src_reg_for_int(TGSI_MEMBAR_SHADER_BUFFER |
TGSI_MEMBAR_ATOMIC_BUFFER |
--
2.13.4
More information about the mesa-dev
mailing list