[Mesa-dev] [PATCH 29/47] glsl: Add a lowering pass for 64-bit float d2i()
Elie Tournier
tournier.elie at gmail.com
Wed Aug 23 11:07:59 UTC 2017
Signed-off-by: Elie Tournier <elie.tournier at collabora.com>
---
src/compiler/glsl/ir_optimization.h | 1 +
src/compiler/glsl/lower_64bit.cpp | 7 +++++++
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 3 ++-
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/src/compiler/glsl/ir_optimization.h b/src/compiler/glsl/ir_optimization.h
index 5d1118d0cf..157c7e1a6f 100644
--- a/src/compiler/glsl/ir_optimization.h
+++ b/src/compiler/glsl/ir_optimization.h
@@ -70,6 +70,7 @@
#define ADD64 (1U << 9)
#define D2U (1U << 10)
#define U2D (1U << 11)
+#define D2I (1U << 12)
/**
* \see class lower_packing_builtins_visitor
diff --git a/src/compiler/glsl/lower_64bit.cpp b/src/compiler/glsl/lower_64bit.cpp
index 38b0420baa..41255094ec 100644
--- a/src/compiler/glsl/lower_64bit.cpp
+++ b/src/compiler/glsl/lower_64bit.cpp
@@ -436,6 +436,13 @@ lower_64bit_visitor::handle_rvalue(ir_rvalue **rvalue)
}
break;
+ case ir_unop_d2i:
+ if (lowering(D2I)) {
+ if (ir->type->base_type == GLSL_TYPE_INT)
+ *rvalue = handle_op(ir, "__builtin_fp64_to_int", generate_ir::fp64_to_int);
+ }
+ break;
+
case ir_unop_d2u:
if (lowering(D2U)) {
if (ir->type->base_type == GLSL_TYPE_UINT)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index df815a86d1..821461e439 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -7067,7 +7067,8 @@ st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
ADD64 |
MUL64 |
D2U |
- U2D;
+ U2D |
+ D2I;
lower_64bit_double_instructions(ir, lower_inst);
}
--
2.14.1
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