[Mesa-dev] [PATCH 32/47] glsl: Add a lowering pass for 64-bit float f2d()
Elie Tournier
tournier.elie at gmail.com
Wed Aug 23 11:08:02 UTC 2017
Signed-off-by: Elie Tournier <elie.tournier at collabora.com>
---
src/compiler/glsl/ir_optimization.h | 1 +
src/compiler/glsl/lower_64bit.cpp | 7 +++++++
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 3 ++-
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/src/compiler/glsl/ir_optimization.h b/src/compiler/glsl/ir_optimization.h
index 2d5a210dca..dce0bf4a9f 100644
--- a/src/compiler/glsl/ir_optimization.h
+++ b/src/compiler/glsl/ir_optimization.h
@@ -73,6 +73,7 @@
#define D2I (1U << 12)
#define I2D (1U << 13)
#define D2F (1U << 14)
+#define F2D (1U << 15)
/**
* \see class lower_packing_builtins_visitor
diff --git a/src/compiler/glsl/lower_64bit.cpp b/src/compiler/glsl/lower_64bit.cpp
index 48c053b02b..054cdcb50a 100644
--- a/src/compiler/glsl/lower_64bit.cpp
+++ b/src/compiler/glsl/lower_64bit.cpp
@@ -457,6 +457,13 @@ lower_64bit_visitor::handle_rvalue(ir_rvalue **rvalue)
}
break;
+ case ir_unop_f2d:
+ if (lowering(F2D)) {
+ if (ir->type->base_type == GLSL_TYPE_DOUBLE)
+ *rvalue = handle_op(ir, "__builtin_fp32_to_fp64", generate_ir::fp32_to_fp64, true);
+ }
+ break;
+
case ir_unop_i2d:
if (lowering(I2D)) {
if (ir->type->base_type == GLSL_TYPE_DOUBLE)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 53d85360b2..f26368812f 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -7070,7 +7070,8 @@ st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
U2D |
D2I |
I2D |
- D2F;
+ D2F |
+ F2D;
lower_64bit_double_instructions(ir, lower_inst);
}
--
2.14.1
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