[Mesa-dev] [PATCH 22/47] glsl: Add a lowering pass for 64-bit float equal()
Elie Tournier
tournier.elie at gmail.com
Wed Aug 23 11:07:52 UTC 2017
Signed-off-by: Elie Tournier <elie.tournier at collabora.com>
---
src/compiler/glsl/ir_optimization.h | 1 +
src/compiler/glsl/lower_64bit.cpp | 7 +++++++
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 3 ++-
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/src/compiler/glsl/ir_optimization.h b/src/compiler/glsl/ir_optimization.h
index ad76a7032e..86cfdf7619 100644
--- a/src/compiler/glsl/ir_optimization.h
+++ b/src/compiler/glsl/ir_optimization.h
@@ -64,6 +64,7 @@
#define MOD64 (1U << 3)
#define ABS64 (1U << 4)
#define NEG64 (1U << 5)
+#define EQ64 (1U << 6)
/**
* \see class lower_packing_builtins_visitor
diff --git a/src/compiler/glsl/lower_64bit.cpp b/src/compiler/glsl/lower_64bit.cpp
index 86ee13cb89..95d7c4c3d4 100644
--- a/src/compiler/glsl/lower_64bit.cpp
+++ b/src/compiler/glsl/lower_64bit.cpp
@@ -438,6 +438,13 @@ lower_64bit_visitor::handle_rvalue(ir_rvalue **rvalue)
}
break;
+ case ir_binop_equal:
+ if (lowering(EQ64)) {
+ if (ir->operands[0]->type->base_type == GLSL_TYPE_DOUBLE)
+ *rvalue = handle_op(ir, "__builtin_feq64", generate_ir::feq64);
+ }
+ break;
+
case ir_binop_mod:
if (lowering(MOD64)) {
if (ir->type->base_type == GLSL_TYPE_UINT64) {
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 1d5e74ab31..e7b848872b 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -7060,7 +7060,8 @@ st_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
ctx->Const.GLSLVersion >= 130) {
unsigned lower_inst = ABS64 |
NEG64 |
- SIGN64;
+ SIGN64 |
+ EQ64;
lower_64bit_double_instructions(ir, lower_inst);
}
--
2.14.1
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