[Mesa-dev] [PATCH] anv,i965: Move CS shared lowering into anv

[Jason Ekstrand]

Right now, OpenGL uses the GLSL lowering for shared variables and anv
uses NIR to lower them.  For a long time, we've done this weird thing
where we do the NIR lowering unconditionally and then add the SLM sizes
from the two together.  This works because one of them will always be 0
but it's a bit sketchy.  Let's just move the NIR-based lowering into
anv_pipeline and get rid of the sketch.

Cc: Jordan Justen <jordan.l.justen at intel.com>
---
 src/intel/compiler/brw_fs.cpp   | 2 --
 src/intel/vulkan/anv_pipeline.c | 5 +++++
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index f2596e3..eb9b4c3 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -6751,8 +6751,6 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data,
 {
    nir_shader *shader = nir_shader_clone(mem_ctx, src_shader);
    shader = brw_nir_apply_sampler_key(shader, compiler, &key->tex, true);
-   brw_nir_lower_cs_shared(shader);
-   prog_data->base.total_shared += shader->num_shared;
 
    /* Now that we cloned the nir_shader, we can update num_uniforms based on
     * the thread_local_id_index.
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 6ae682f..279d765 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -381,6 +381,11 @@ anv_pipeline_compile(struct anv_pipeline *pipeline,
    if (stage != MESA_SHADER_COMPUTE)
       NIR_PASS_V(nir, anv_nir_lower_multiview, pipeline->subpass->view_mask);
 
+   if (stage == MESA_SHADER_COMPUTE) {
+      NIR_PASS_V(nir, brw_nir_lower_cs_shared);
+      prog_data->total_shared = nir->num_shared;
+   }
+
    nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
 
    /* Figure out the number of parameters */
-- 
2.5.0.400.gff86faf