[Mesa-dev] [PATCH 07/47] glsl: Add "built-in" functions to do add(fp64, fp64)
Elie Tournier
tournier.elie at gmail.com
Wed Aug 23 11:07:37 UTC 2017
Signed-off-by: Elie Tournier <elie.tournier at collabora.com>
---
src/compiler/glsl/builtin_float64.h | 8785 +++++++++++++++++++++++++++++++
src/compiler/glsl/builtin_functions.cpp | 4 +
src/compiler/glsl/builtin_functions.h | 3 +
src/compiler/glsl/float64.glsl | 483 ++
src/compiler/glsl/glcpp/glcpp-parse.y | 1 +
5 files changed, 9276 insertions(+)
diff --git a/src/compiler/glsl/builtin_float64.h b/src/compiler/glsl/builtin_float64.h
index c52e50a6f9..9918ae3a08 100644
--- a/src/compiler/glsl/builtin_float64.h
+++ b/src/compiler/glsl/builtin_float64.h
@@ -594,3 +594,8788 @@ flt64(void *mem_ctx, builtin_available_predicate avail)
sig->replace_parameters(&sig_parameters);
return sig;
}
+ir_function_signature *
+add64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::void_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r00B3 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a0", ir_var_function_in);
+ sig_parameters.push_tail(r00B3);
+ ir_variable *const r00B4 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a1", ir_var_function_in);
+ sig_parameters.push_tail(r00B4);
+ ir_variable *const r00B5 = new(mem_ctx) ir_variable(glsl_type::uint_type, "b0", ir_var_function_in);
+ sig_parameters.push_tail(r00B5);
+ ir_variable *const r00B6 = new(mem_ctx) ir_variable(glsl_type::uint_type, "b1", ir_var_function_in);
+ sig_parameters.push_tail(r00B6);
+ ir_variable *const r00B7 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r00B7);
+ ir_variable *const r00B8 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r00B8);
+ ir_variable *const r00B9 = body.make_temp(glsl_type::uint_type, "assignment_tmp");
+ body.emit(assign(r00B9, add(r00B4, r00B6), 0x01));
+
+ body.emit(assign(r00B8, r00B9, 0x01));
+
+ ir_expression *const r00BA = add(r00B3, r00B5);
+ ir_expression *const r00BB = less(r00B9, r00B4);
+ ir_expression *const r00BC = expr(ir_unop_b2i, r00BB);
+ ir_expression *const r00BD = expr(ir_unop_i2u, r00BC);
+ body.emit(assign(r00B7, add(r00BA, r00BD), 0x01));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+sub64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::void_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r00BE = new(mem_ctx) ir_variable(glsl_type::uint_type, "a0", ir_var_function_in);
+ sig_parameters.push_tail(r00BE);
+ ir_variable *const r00BF = new(mem_ctx) ir_variable(glsl_type::uint_type, "a1", ir_var_function_in);
+ sig_parameters.push_tail(r00BF);
+ ir_variable *const r00C0 = new(mem_ctx) ir_variable(glsl_type::uint_type, "b0", ir_var_function_in);
+ sig_parameters.push_tail(r00C0);
+ ir_variable *const r00C1 = new(mem_ctx) ir_variable(glsl_type::uint_type, "b1", ir_var_function_in);
+ sig_parameters.push_tail(r00C1);
+ ir_variable *const r00C2 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r00C2);
+ ir_variable *const r00C3 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r00C3);
+ body.emit(assign(r00C3, sub(r00BF, r00C1), 0x01));
+
+ ir_expression *const r00C4 = sub(r00BE, r00C0);
+ ir_expression *const r00C5 = less(r00BF, r00C1);
+ ir_expression *const r00C6 = expr(ir_unop_b2i, r00C5);
+ ir_expression *const r00C7 = expr(ir_unop_i2u, r00C6);
+ body.emit(assign(r00C2, sub(r00C4, r00C7), 0x01));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+shift64RightJamming(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::void_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r00C8 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a0", ir_var_function_in);
+ sig_parameters.push_tail(r00C8);
+ ir_variable *const r00C9 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a1", ir_var_function_in);
+ sig_parameters.push_tail(r00C9);
+ ir_variable *const r00CA = new(mem_ctx) ir_variable(glsl_type::int_type, "count", ir_var_function_in);
+ sig_parameters.push_tail(r00CA);
+ ir_variable *const r00CB = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r00CB);
+ ir_variable *const r00CC = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r00CC);
+ ir_variable *const r00CD = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r00CD);
+ ir_variable *const r00CE = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r00CE);
+ ir_variable *const r00CF = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r00D0 = neg(r00CA);
+ body.emit(assign(r00CF, bit_and(r00D0, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r00D2 = equal(r00CA, body.constant(int(0)));
+ ir_if *f00D1 = new(mem_ctx) ir_if(operand(r00D2).val);
+ exec_list *const f00D1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f00D1->then_instructions;
+
+ body.emit(assign(r00CD, r00C9, 0x01));
+
+ body.emit(assign(r00CE, r00C8, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f00D1->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r00D4 = less(r00CA, body.constant(int(32)));
+ ir_if *f00D3 = new(mem_ctx) ir_if(operand(r00D4).val);
+ exec_list *const f00D3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f00D3->then_instructions;
+
+ ir_expression *const r00D5 = lshift(r00C8, r00CF);
+ ir_expression *const r00D6 = rshift(r00C9, r00CA);
+ ir_expression *const r00D7 = bit_or(r00D5, r00D6);
+ ir_expression *const r00D8 = lshift(r00C9, r00CF);
+ ir_expression *const r00D9 = nequal(r00D8, body.constant(0u));
+ ir_expression *const r00DA = expr(ir_unop_b2i, r00D9);
+ ir_expression *const r00DB = expr(ir_unop_i2u, r00DA);
+ body.emit(assign(r00CD, bit_or(r00D7, r00DB), 0x01));
+
+ body.emit(assign(r00CE, rshift(r00C8, r00CA), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f00D3->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r00DD = equal(r00CA, body.constant(int(32)));
+ ir_if *f00DC = new(mem_ctx) ir_if(operand(r00DD).val);
+ exec_list *const f00DC_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f00DC->then_instructions;
+
+ ir_expression *const r00DE = nequal(r00C9, body.constant(0u));
+ ir_expression *const r00DF = expr(ir_unop_b2i, r00DE);
+ ir_expression *const r00E0 = expr(ir_unop_i2u, r00DF);
+ body.emit(assign(r00CD, bit_or(r00C8, r00E0), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f00DC->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r00E2 = less(r00CA, body.constant(int(64)));
+ ir_if *f00E1 = new(mem_ctx) ir_if(operand(r00E2).val);
+ exec_list *const f00E1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f00E1->then_instructions;
+
+ ir_expression *const r00E3 = bit_and(r00CA, body.constant(int(31)));
+ ir_expression *const r00E4 = rshift(r00C8, r00E3);
+ ir_expression *const r00E5 = lshift(r00C8, r00CF);
+ ir_expression *const r00E6 = bit_or(r00E5, r00C9);
+ ir_expression *const r00E7 = nequal(r00E6, body.constant(0u));
+ ir_expression *const r00E8 = expr(ir_unop_b2i, r00E7);
+ ir_expression *const r00E9 = expr(ir_unop_i2u, r00E8);
+ body.emit(assign(r00CD, bit_or(r00E4, r00E9), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f00E1->else_instructions;
+
+ ir_expression *const r00EA = bit_or(r00C8, r00C9);
+ ir_expression *const r00EB = nequal(r00EA, body.constant(0u));
+ ir_expression *const r00EC = expr(ir_unop_b2i, r00EB);
+ body.emit(assign(r00CD, expr(ir_unop_i2u, r00EC), 0x01));
+
+
+ body.instructions = f00E1_parent_instructions;
+ body.emit(f00E1);
+
+ /* END IF */
+
+
+ body.instructions = f00DC_parent_instructions;
+ body.emit(f00DC);
+
+ /* END IF */
+
+ body.emit(assign(r00CE, body.constant(0u), 0x01));
+
+
+ body.instructions = f00D3_parent_instructions;
+ body.emit(f00D3);
+
+ /* END IF */
+
+
+ body.instructions = f00D1_parent_instructions;
+ body.emit(f00D1);
+
+ /* END IF */
+
+ body.emit(assign(r00CC, r00CD, 0x01));
+
+ body.emit(assign(r00CB, r00CE, 0x01));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+shift64ExtraRightJamming(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::void_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r00ED = new(mem_ctx) ir_variable(glsl_type::uint_type, "a0", ir_var_function_in);
+ sig_parameters.push_tail(r00ED);
+ ir_variable *const r00EE = new(mem_ctx) ir_variable(glsl_type::uint_type, "a1", ir_var_function_in);
+ sig_parameters.push_tail(r00EE);
+ ir_variable *const r00EF = new(mem_ctx) ir_variable(glsl_type::uint_type, "a2", ir_var_function_in);
+ sig_parameters.push_tail(r00EF);
+ ir_variable *const r00F0 = new(mem_ctx) ir_variable(glsl_type::int_type, "count", ir_var_function_in);
+ sig_parameters.push_tail(r00F0);
+ ir_variable *const r00F1 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r00F1);
+ ir_variable *const r00F2 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r00F2);
+ ir_variable *const r00F3 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r00F3);
+ ir_variable *const r00F4 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r00F4);
+ ir_variable *const r00F5 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r00F5);
+ ir_variable *const r00F6 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r00F6);
+ ir_variable *const r00F7 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r00F8 = neg(r00F0);
+ body.emit(assign(r00F7, bit_and(r00F8, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r00FA = equal(r00F0, body.constant(int(0)));
+ ir_if *f00F9 = new(mem_ctx) ir_if(operand(r00FA).val);
+ exec_list *const f00F9_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f00F9->then_instructions;
+
+ body.emit(assign(r00F4, r00EF, 0x01));
+
+ body.emit(assign(r00F5, r00EE, 0x01));
+
+ body.emit(assign(r00F6, r00ED, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f00F9->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r00FC = less(r00F0, body.constant(int(32)));
+ ir_if *f00FB = new(mem_ctx) ir_if(operand(r00FC).val);
+ exec_list *const f00FB_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f00FB->then_instructions;
+
+ body.emit(assign(r00F4, lshift(r00EE, r00F7), 0x01));
+
+ ir_expression *const r00FD = lshift(r00ED, r00F7);
+ ir_expression *const r00FE = rshift(r00EE, r00F0);
+ body.emit(assign(r00F5, bit_or(r00FD, r00FE), 0x01));
+
+ body.emit(assign(r00F6, rshift(r00ED, r00F0), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f00FB->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0100 = equal(r00F0, body.constant(int(32)));
+ ir_if *f00FF = new(mem_ctx) ir_if(operand(r0100).val);
+ exec_list *const f00FF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f00FF->then_instructions;
+
+ body.emit(assign(r00F4, r00EE, 0x01));
+
+ body.emit(assign(r00F5, r00ED, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f00FF->else_instructions;
+
+ body.emit(assign(r00EF, bit_or(r00EF, r00EE), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0102 = less(r00F0, body.constant(int(64)));
+ ir_if *f0101 = new(mem_ctx) ir_if(operand(r0102).val);
+ exec_list *const f0101_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0101->then_instructions;
+
+ body.emit(assign(r00F4, lshift(r00ED, r00F7), 0x01));
+
+ ir_expression *const r0103 = bit_and(r00F0, body.constant(int(31)));
+ body.emit(assign(r00F5, rshift(r00ED, r0103), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0101->else_instructions;
+
+ ir_variable *const r0104 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0106 = equal(r00F0, body.constant(int(64)));
+ ir_if *f0105 = new(mem_ctx) ir_if(operand(r0106).val);
+ exec_list *const f0105_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0105->then_instructions;
+
+ body.emit(assign(r0104, r00ED, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0105->else_instructions;
+
+ ir_expression *const r0107 = nequal(r00ED, body.constant(0u));
+ ir_expression *const r0108 = expr(ir_unop_b2i, r0107);
+ body.emit(assign(r0104, expr(ir_unop_i2u, r0108), 0x01));
+
+
+ body.instructions = f0105_parent_instructions;
+ body.emit(f0105);
+
+ /* END IF */
+
+ body.emit(assign(r00F4, r0104, 0x01));
+
+ body.emit(assign(r00F5, body.constant(0u), 0x01));
+
+
+ body.instructions = f0101_parent_instructions;
+ body.emit(f0101);
+
+ /* END IF */
+
+
+ body.instructions = f00FF_parent_instructions;
+ body.emit(f00FF);
+
+ /* END IF */
+
+ body.emit(assign(r00F6, body.constant(0u), 0x01));
+
+
+ body.instructions = f00FB_parent_instructions;
+ body.emit(f00FB);
+
+ /* END IF */
+
+ ir_expression *const r0109 = nequal(r00EF, body.constant(0u));
+ ir_expression *const r010A = expr(ir_unop_b2i, r0109);
+ ir_expression *const r010B = expr(ir_unop_i2u, r010A);
+ body.emit(assign(r00F4, bit_or(r00F4, r010B), 0x01));
+
+
+ body.instructions = f00F9_parent_instructions;
+ body.emit(f00F9);
+
+ /* END IF */
+
+ body.emit(assign(r00F3, r00F4, 0x01));
+
+ body.emit(assign(r00F2, r00F5, 0x01));
+
+ body.emit(assign(r00F1, r00F6, 0x01));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+shortShift64Left(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::void_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r010C = new(mem_ctx) ir_variable(glsl_type::uint_type, "a0", ir_var_function_in);
+ sig_parameters.push_tail(r010C);
+ ir_variable *const r010D = new(mem_ctx) ir_variable(glsl_type::uint_type, "a1", ir_var_function_in);
+ sig_parameters.push_tail(r010D);
+ ir_variable *const r010E = new(mem_ctx) ir_variable(glsl_type::int_type, "count", ir_var_function_in);
+ sig_parameters.push_tail(r010E);
+ ir_variable *const r010F = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r010F);
+ ir_variable *const r0110 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1Ptr", ir_var_function_inout);
+ sig_parameters.push_tail(r0110);
+ body.emit(assign(r0110, lshift(r010D, r010E), 0x01));
+
+ ir_variable *const r0111 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0113 = equal(r010E, body.constant(int(0)));
+ ir_if *f0112 = new(mem_ctx) ir_if(operand(r0113).val);
+ exec_list *const f0112_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0112->then_instructions;
+
+ body.emit(assign(r0111, r010C, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0112->else_instructions;
+
+ ir_expression *const r0114 = lshift(r010C, r010E);
+ ir_expression *const r0115 = neg(r010E);
+ ir_expression *const r0116 = bit_and(r0115, body.constant(int(31)));
+ ir_expression *const r0117 = rshift(r010D, r0116);
+ body.emit(assign(r0111, bit_or(r0114, r0117), 0x01));
+
+
+ body.instructions = f0112_parent_instructions;
+ body.emit(f0112);
+
+ /* END IF */
+
+ body.emit(assign(r010F, r0111, 0x01));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+packFloat64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r0118 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zSign", ir_var_function_in);
+ sig_parameters.push_tail(r0118);
+ ir_variable *const r0119 = new(mem_ctx) ir_variable(glsl_type::int_type, "zExp", ir_var_function_in);
+ sig_parameters.push_tail(r0119);
+ ir_variable *const r011A = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac0", ir_var_function_in);
+ sig_parameters.push_tail(r011A);
+ ir_variable *const r011B = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac1", ir_var_function_in);
+ sig_parameters.push_tail(r011B);
+ ir_variable *const r011C = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r011C);
+ ir_expression *const r011D = lshift(r0118, body.constant(int(31)));
+ ir_expression *const r011E = expr(ir_unop_i2u, r0119);
+ ir_expression *const r011F = lshift(r011E, body.constant(int(20)));
+ ir_expression *const r0120 = add(r011D, r011F);
+ body.emit(assign(r011C, add(r0120, r011A), 0x02));
+
+ body.emit(assign(r011C, r011B, 0x01));
+
+ body.emit(ret(r011C));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+roundAndPackFloat64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r0121 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zSign", ir_var_function_in);
+ sig_parameters.push_tail(r0121);
+ ir_variable *const r0122 = new(mem_ctx) ir_variable(glsl_type::int_type, "zExp", ir_var_function_in);
+ sig_parameters.push_tail(r0122);
+ ir_variable *const r0123 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac0", ir_var_function_in);
+ sig_parameters.push_tail(r0123);
+ ir_variable *const r0124 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac1", ir_var_function_in);
+ sig_parameters.push_tail(r0124);
+ ir_variable *const r0125 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_function_in);
+ sig_parameters.push_tail(r0125);
+ ir_variable *const r0126 = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r0126, body.constant(true), 0x01));
+
+ ir_variable *const r0127 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0128 = new(mem_ctx) ir_variable(glsl_type::bool_type, "increment", ir_var_auto);
+ body.emit(r0128);
+ ir_expression *const r0129 = expr(ir_unop_u2i, r0125);
+ body.emit(assign(r0128, less(r0129, body.constant(int(0))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r012B = lequal(body.constant(int(2045)), r0122);
+ ir_if *f012A = new(mem_ctx) ir_if(operand(r012B).val);
+ exec_list *const f012A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f012A->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r012D = less(body.constant(int(2045)), r0122);
+ ir_expression *const r012E = equal(r0122, body.constant(int(2045)));
+ ir_expression *const r012F = equal(body.constant(2097151u), r0123);
+ ir_expression *const r0130 = equal(body.constant(4294967295u), r0124);
+ ir_expression *const r0131 = logic_and(r012F, r0130);
+ ir_expression *const r0132 = logic_and(r012E, r0131);
+ ir_expression *const r0133 = logic_and(r0132, r0128);
+ ir_expression *const r0134 = logic_or(r012D, r0133);
+ ir_if *f012C = new(mem_ctx) ir_if(operand(r0134).val);
+ exec_list *const f012C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f012C->then_instructions;
+
+ ir_variable *const r0135 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0135);
+ ir_expression *const r0136 = lshift(r0121, body.constant(int(31)));
+ body.emit(assign(r0135, add(r0136, body.constant(2146435072u)), 0x02));
+
+ body.emit(assign(r0135, body.constant(0u), 0x01));
+
+ body.emit(assign(r0127, r0135, 0x03));
+
+ body.emit(assign(r0126, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f012C->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0138 = less(r0122, body.constant(int(0)));
+ ir_if *f0137 = new(mem_ctx) ir_if(operand(r0138).val);
+ exec_list *const f0137_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0137->then_instructions;
+
+ ir_variable *const r0139 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0139, r0125, 0x01));
+
+ ir_variable *const r013A = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r013A, neg(r0122), 0x01));
+
+ ir_variable *const r013B = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r013B);
+ ir_variable *const r013C = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r013C);
+ ir_variable *const r013D = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r013D);
+ ir_variable *const r013E = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r013F = neg(r013A);
+ body.emit(assign(r013E, bit_and(r013F, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0141 = equal(r013A, body.constant(int(0)));
+ ir_if *f0140 = new(mem_ctx) ir_if(operand(r0141).val);
+ exec_list *const f0140_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0140->then_instructions;
+
+ body.emit(assign(r013B, r0125, 0x01));
+
+ body.emit(assign(r013C, r0124, 0x01));
+
+ body.emit(assign(r013D, r0123, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0140->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0143 = less(r013A, body.constant(int(32)));
+ ir_if *f0142 = new(mem_ctx) ir_if(operand(r0143).val);
+ exec_list *const f0142_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0142->then_instructions;
+
+ body.emit(assign(r013B, lshift(r0124, r013E), 0x01));
+
+ ir_expression *const r0144 = lshift(r0123, r013E);
+ ir_expression *const r0145 = rshift(r0124, r013A);
+ body.emit(assign(r013C, bit_or(r0144, r0145), 0x01));
+
+ body.emit(assign(r013D, rshift(r0123, r013A), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0142->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0147 = equal(r013A, body.constant(int(32)));
+ ir_if *f0146 = new(mem_ctx) ir_if(operand(r0147).val);
+ exec_list *const f0146_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0146->then_instructions;
+
+ body.emit(assign(r013B, r0124, 0x01));
+
+ body.emit(assign(r013C, r0123, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0146->else_instructions;
+
+ body.emit(assign(r0139, bit_or(r0125, r0124), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0149 = less(r013A, body.constant(int(64)));
+ ir_if *f0148 = new(mem_ctx) ir_if(operand(r0149).val);
+ exec_list *const f0148_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0148->then_instructions;
+
+ body.emit(assign(r013B, lshift(r0123, r013E), 0x01));
+
+ ir_expression *const r014A = bit_and(r013A, body.constant(int(31)));
+ body.emit(assign(r013C, rshift(r0123, r014A), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0148->else_instructions;
+
+ ir_variable *const r014B = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r014D = equal(r013A, body.constant(int(64)));
+ ir_if *f014C = new(mem_ctx) ir_if(operand(r014D).val);
+ exec_list *const f014C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f014C->then_instructions;
+
+ body.emit(assign(r014B, r0123, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f014C->else_instructions;
+
+ ir_expression *const r014E = nequal(r0123, body.constant(0u));
+ ir_expression *const r014F = expr(ir_unop_b2i, r014E);
+ body.emit(assign(r014B, expr(ir_unop_i2u, r014F), 0x01));
+
+
+ body.instructions = f014C_parent_instructions;
+ body.emit(f014C);
+
+ /* END IF */
+
+ body.emit(assign(r013B, r014B, 0x01));
+
+ body.emit(assign(r013C, body.constant(0u), 0x01));
+
+
+ body.instructions = f0148_parent_instructions;
+ body.emit(f0148);
+
+ /* END IF */
+
+
+ body.instructions = f0146_parent_instructions;
+ body.emit(f0146);
+
+ /* END IF */
+
+ body.emit(assign(r013D, body.constant(0u), 0x01));
+
+
+ body.instructions = f0142_parent_instructions;
+ body.emit(f0142);
+
+ /* END IF */
+
+ ir_expression *const r0150 = nequal(r0139, body.constant(0u));
+ ir_expression *const r0151 = expr(ir_unop_b2i, r0150);
+ ir_expression *const r0152 = expr(ir_unop_i2u, r0151);
+ body.emit(assign(r013B, bit_or(r013B, r0152), 0x01));
+
+
+ body.instructions = f0140_parent_instructions;
+ body.emit(f0140);
+
+ /* END IF */
+
+ body.emit(assign(r0123, r013D, 0x01));
+
+ body.emit(assign(r0124, r013C, 0x01));
+
+ body.emit(assign(r0125, r013B, 0x01));
+
+ body.emit(assign(r0122, body.constant(int(0)), 0x01));
+
+ body.emit(assign(r0128, less(r013B, body.constant(0u)), 0x01));
+
+
+ body.instructions = f0137_parent_instructions;
+ body.emit(f0137);
+
+ /* END IF */
+
+
+ body.instructions = f012C_parent_instructions;
+ body.emit(f012C);
+
+ /* END IF */
+
+
+ body.instructions = f012A_parent_instructions;
+ body.emit(f012A);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0153 = new(mem_ctx) ir_if(operand(r0126).val);
+ exec_list *const f0153_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0153->then_instructions;
+
+ /* IF CONDITION */
+ ir_if *f0154 = new(mem_ctx) ir_if(operand(r0128).val);
+ exec_list *const f0154_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0154->then_instructions;
+
+ ir_variable *const r0155 = body.make_temp(glsl_type::uint_type, "assignment_tmp");
+ body.emit(assign(r0155, add(r0124, body.constant(1u)), 0x01));
+
+ ir_expression *const r0156 = less(r0155, r0124);
+ ir_expression *const r0157 = expr(ir_unop_b2i, r0156);
+ ir_expression *const r0158 = expr(ir_unop_i2u, r0157);
+ body.emit(assign(r0123, add(r0123, r0158), 0x01));
+
+ ir_expression *const r0159 = equal(r0125, body.constant(0u));
+ ir_expression *const r015A = expr(ir_unop_b2i, r0159);
+ ir_expression *const r015B = expr(ir_unop_i2u, r015A);
+ ir_expression *const r015C = add(r0125, r015B);
+ ir_expression *const r015D = bit_and(r015C, body.constant(1u));
+ ir_expression *const r015E = expr(ir_unop_bit_not, r015D);
+ body.emit(assign(r0124, bit_and(r0155, r015E), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0154->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0160 = bit_or(r0123, r0124);
+ ir_expression *const r0161 = equal(r0160, body.constant(0u));
+ ir_if *f015F = new(mem_ctx) ir_if(operand(r0161).val);
+ exec_list *const f015F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f015F->then_instructions;
+
+ body.emit(assign(r0122, body.constant(int(0)), 0x01));
+
+
+ body.instructions = f015F_parent_instructions;
+ body.emit(f015F);
+
+ /* END IF */
+
+
+ body.instructions = f0154_parent_instructions;
+ body.emit(f0154);
+
+ /* END IF */
+
+ ir_variable *const r0162 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0162);
+ ir_expression *const r0163 = lshift(r0121, body.constant(int(31)));
+ ir_expression *const r0164 = expr(ir_unop_i2u, r0122);
+ ir_expression *const r0165 = lshift(r0164, body.constant(int(20)));
+ ir_expression *const r0166 = add(r0163, r0165);
+ body.emit(assign(r0162, add(r0166, r0123), 0x02));
+
+ body.emit(assign(r0162, r0124, 0x01));
+
+ body.emit(assign(r0127, r0162, 0x03));
+
+ body.emit(assign(r0126, body.constant(false), 0x01));
+
+
+ body.instructions = f0153_parent_instructions;
+ body.emit(f0153);
+
+ /* END IF */
+
+ body.emit(ret(r0127));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+countLeadingZeros32(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::int_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r0167 = new(mem_ctx) ir_variable(glsl_type::uint_type, "a", ir_var_function_in);
+ sig_parameters.push_tail(r0167);
+ ir_variable *const r0168 = body.make_temp(glsl_type::int_type, "return_value");
+ ir_variable *const r0169 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r0169);
+ /* IF CONDITION */
+ ir_expression *const r016B = equal(r0167, body.constant(0u));
+ ir_if *f016A = new(mem_ctx) ir_if(operand(r016B).val);
+ exec_list *const f016A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f016A->then_instructions;
+
+ body.emit(assign(r0168, body.constant(int(32)), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f016A->else_instructions;
+
+ body.emit(assign(r0169, body.constant(int(0)), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r016D = bit_and(r0167, body.constant(4294901760u));
+ ir_expression *const r016E = equal(r016D, body.constant(0u));
+ ir_if *f016C = new(mem_ctx) ir_if(operand(r016E).val);
+ exec_list *const f016C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f016C->then_instructions;
+
+ body.emit(assign(r0169, body.constant(int(16)), 0x01));
+
+ body.emit(assign(r0167, lshift(r0167, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f016C_parent_instructions;
+ body.emit(f016C);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0170 = bit_and(r0167, body.constant(4278190080u));
+ ir_expression *const r0171 = equal(r0170, body.constant(0u));
+ ir_if *f016F = new(mem_ctx) ir_if(operand(r0171).val);
+ exec_list *const f016F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f016F->then_instructions;
+
+ body.emit(assign(r0169, add(r0169, body.constant(int(8))), 0x01));
+
+ body.emit(assign(r0167, lshift(r0167, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f016F_parent_instructions;
+ body.emit(f016F);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0173 = bit_and(r0167, body.constant(4026531840u));
+ ir_expression *const r0174 = equal(r0173, body.constant(0u));
+ ir_if *f0172 = new(mem_ctx) ir_if(operand(r0174).val);
+ exec_list *const f0172_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0172->then_instructions;
+
+ body.emit(assign(r0169, add(r0169, body.constant(int(4))), 0x01));
+
+ body.emit(assign(r0167, lshift(r0167, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f0172_parent_instructions;
+ body.emit(f0172);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0176 = bit_and(r0167, body.constant(3221225472u));
+ ir_expression *const r0177 = equal(r0176, body.constant(0u));
+ ir_if *f0175 = new(mem_ctx) ir_if(operand(r0177).val);
+ exec_list *const f0175_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0175->then_instructions;
+
+ body.emit(assign(r0169, add(r0169, body.constant(int(2))), 0x01));
+
+ body.emit(assign(r0167, lshift(r0167, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f0175_parent_instructions;
+ body.emit(f0175);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0179 = bit_and(r0167, body.constant(2147483648u));
+ ir_expression *const r017A = equal(r0179, body.constant(0u));
+ ir_if *f0178 = new(mem_ctx) ir_if(operand(r017A).val);
+ exec_list *const f0178_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0178->then_instructions;
+
+ body.emit(assign(r0169, add(r0169, body.constant(int(1))), 0x01));
+
+
+ body.instructions = f0178_parent_instructions;
+ body.emit(f0178);
+
+ /* END IF */
+
+ body.emit(assign(r0168, r0169, 0x01));
+
+
+ body.instructions = f016A_parent_instructions;
+ body.emit(f016A);
+
+ /* END IF */
+
+ body.emit(ret(r0168));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+normalizeRoundAndPackFloat64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r017B = new(mem_ctx) ir_variable(glsl_type::uint_type, "zSign", ir_var_function_in);
+ sig_parameters.push_tail(r017B);
+ ir_variable *const r017C = new(mem_ctx) ir_variable(glsl_type::int_type, "zExp", ir_var_function_in);
+ sig_parameters.push_tail(r017C);
+ ir_variable *const r017D = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac0", ir_var_function_in);
+ sig_parameters.push_tail(r017D);
+ ir_variable *const r017E = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac1", ir_var_function_in);
+ sig_parameters.push_tail(r017E);
+ ir_variable *const r017F = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r017F);
+ ir_variable *const r0180 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r0180);
+ /* IF CONDITION */
+ ir_expression *const r0182 = equal(r017D, body.constant(0u));
+ ir_if *f0181 = new(mem_ctx) ir_if(operand(r0182).val);
+ exec_list *const f0181_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0181->then_instructions;
+
+ body.emit(assign(r017D, r017E, 0x01));
+
+ body.emit(assign(r017E, body.constant(0u), 0x01));
+
+ body.emit(assign(r017C, add(r017C, body.constant(int(-32))), 0x01));
+
+
+ body.instructions = f0181_parent_instructions;
+ body.emit(f0181);
+
+ /* END IF */
+
+ ir_variable *const r0183 = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r0183, r017D, 0x01));
+
+ ir_variable *const r0184 = body.make_temp(glsl_type::int_type, "return_value");
+ ir_variable *const r0185 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r0185);
+ /* IF CONDITION */
+ ir_expression *const r0187 = equal(r017D, body.constant(0u));
+ ir_if *f0186 = new(mem_ctx) ir_if(operand(r0187).val);
+ exec_list *const f0186_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0186->then_instructions;
+
+ body.emit(assign(r0184, body.constant(int(32)), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0186->else_instructions;
+
+ body.emit(assign(r0185, body.constant(int(0)), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0189 = bit_and(r017D, body.constant(4294901760u));
+ ir_expression *const r018A = equal(r0189, body.constant(0u));
+ ir_if *f0188 = new(mem_ctx) ir_if(operand(r018A).val);
+ exec_list *const f0188_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0188->then_instructions;
+
+ body.emit(assign(r0185, body.constant(int(16)), 0x01));
+
+ body.emit(assign(r0183, lshift(r017D, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f0188_parent_instructions;
+ body.emit(f0188);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r018C = bit_and(r0183, body.constant(4278190080u));
+ ir_expression *const r018D = equal(r018C, body.constant(0u));
+ ir_if *f018B = new(mem_ctx) ir_if(operand(r018D).val);
+ exec_list *const f018B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f018B->then_instructions;
+
+ body.emit(assign(r0185, add(r0185, body.constant(int(8))), 0x01));
+
+ body.emit(assign(r0183, lshift(r0183, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f018B_parent_instructions;
+ body.emit(f018B);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r018F = bit_and(r0183, body.constant(4026531840u));
+ ir_expression *const r0190 = equal(r018F, body.constant(0u));
+ ir_if *f018E = new(mem_ctx) ir_if(operand(r0190).val);
+ exec_list *const f018E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f018E->then_instructions;
+
+ body.emit(assign(r0185, add(r0185, body.constant(int(4))), 0x01));
+
+ body.emit(assign(r0183, lshift(r0183, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f018E_parent_instructions;
+ body.emit(f018E);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0192 = bit_and(r0183, body.constant(3221225472u));
+ ir_expression *const r0193 = equal(r0192, body.constant(0u));
+ ir_if *f0191 = new(mem_ctx) ir_if(operand(r0193).val);
+ exec_list *const f0191_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0191->then_instructions;
+
+ body.emit(assign(r0185, add(r0185, body.constant(int(2))), 0x01));
+
+ body.emit(assign(r0183, lshift(r0183, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f0191_parent_instructions;
+ body.emit(f0191);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0195 = bit_and(r0183, body.constant(2147483648u));
+ ir_expression *const r0196 = equal(r0195, body.constant(0u));
+ ir_if *f0194 = new(mem_ctx) ir_if(operand(r0196).val);
+ exec_list *const f0194_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0194->then_instructions;
+
+ body.emit(assign(r0185, add(r0185, body.constant(int(1))), 0x01));
+
+
+ body.instructions = f0194_parent_instructions;
+ body.emit(f0194);
+
+ /* END IF */
+
+ body.emit(assign(r0184, r0185, 0x01));
+
+
+ body.instructions = f0186_parent_instructions;
+ body.emit(f0186);
+
+ /* END IF */
+
+ body.emit(assign(r0180, add(r0184, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0198 = lequal(body.constant(int(0)), r0180);
+ ir_if *f0197 = new(mem_ctx) ir_if(operand(r0198).val);
+ exec_list *const f0197_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0197->then_instructions;
+
+ body.emit(assign(r017F, body.constant(0u), 0x01));
+
+ ir_variable *const r0199 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0199, lshift(r017E, r0180), 0x01));
+
+ ir_variable *const r019A = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r019C = equal(r0180, body.constant(int(0)));
+ ir_if *f019B = new(mem_ctx) ir_if(operand(r019C).val);
+ exec_list *const f019B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f019B->then_instructions;
+
+ body.emit(assign(r019A, r017D, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f019B->else_instructions;
+
+ ir_expression *const r019D = lshift(r017D, r0180);
+ ir_expression *const r019E = neg(r0180);
+ ir_expression *const r019F = bit_and(r019E, body.constant(int(31)));
+ ir_expression *const r01A0 = rshift(r017E, r019F);
+ body.emit(assign(r019A, bit_or(r019D, r01A0), 0x01));
+
+
+ body.instructions = f019B_parent_instructions;
+ body.emit(f019B);
+
+ /* END IF */
+
+ body.emit(assign(r017D, r019A, 0x01));
+
+ body.emit(assign(r017E, r0199, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0197->else_instructions;
+
+ ir_variable *const r01A1 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r01A1, body.constant(0u), 0x01));
+
+ ir_variable *const r01A2 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r01A2, neg(r0180), 0x01));
+
+ ir_variable *const r01A3 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r01A3);
+ ir_variable *const r01A4 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r01A4);
+ ir_variable *const r01A5 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r01A5);
+ ir_variable *const r01A6 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r01A7 = neg(r01A2);
+ body.emit(assign(r01A6, bit_and(r01A7, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r01A9 = equal(r01A2, body.constant(int(0)));
+ ir_if *f01A8 = new(mem_ctx) ir_if(operand(r01A9).val);
+ exec_list *const f01A8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01A8->then_instructions;
+
+ body.emit(assign(r01A3, r01A1, 0x01));
+
+ body.emit(assign(r01A4, r017E, 0x01));
+
+ body.emit(assign(r01A5, r017D, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01A8->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r01AB = less(r01A2, body.constant(int(32)));
+ ir_if *f01AA = new(mem_ctx) ir_if(operand(r01AB).val);
+ exec_list *const f01AA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01AA->then_instructions;
+
+ body.emit(assign(r01A3, lshift(r017E, r01A6), 0x01));
+
+ ir_expression *const r01AC = lshift(r017D, r01A6);
+ ir_expression *const r01AD = rshift(r017E, r01A2);
+ body.emit(assign(r01A4, bit_or(r01AC, r01AD), 0x01));
+
+ body.emit(assign(r01A5, rshift(r017D, r01A2), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01AA->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r01AF = equal(r01A2, body.constant(int(32)));
+ ir_if *f01AE = new(mem_ctx) ir_if(operand(r01AF).val);
+ exec_list *const f01AE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01AE->then_instructions;
+
+ body.emit(assign(r01A3, r017E, 0x01));
+
+ body.emit(assign(r01A4, r017D, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01AE->else_instructions;
+
+ body.emit(assign(r01A1, bit_or(body.constant(0u), r017E), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r01B1 = less(r01A2, body.constant(int(64)));
+ ir_if *f01B0 = new(mem_ctx) ir_if(operand(r01B1).val);
+ exec_list *const f01B0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01B0->then_instructions;
+
+ body.emit(assign(r01A3, lshift(r017D, r01A6), 0x01));
+
+ ir_expression *const r01B2 = bit_and(r01A2, body.constant(int(31)));
+ body.emit(assign(r01A4, rshift(r017D, r01B2), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01B0->else_instructions;
+
+ ir_variable *const r01B3 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r01B5 = equal(r01A2, body.constant(int(64)));
+ ir_if *f01B4 = new(mem_ctx) ir_if(operand(r01B5).val);
+ exec_list *const f01B4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01B4->then_instructions;
+
+ body.emit(assign(r01B3, r017D, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01B4->else_instructions;
+
+ ir_expression *const r01B6 = nequal(r017D, body.constant(0u));
+ ir_expression *const r01B7 = expr(ir_unop_b2i, r01B6);
+ body.emit(assign(r01B3, expr(ir_unop_i2u, r01B7), 0x01));
+
+
+ body.instructions = f01B4_parent_instructions;
+ body.emit(f01B4);
+
+ /* END IF */
+
+ body.emit(assign(r01A3, r01B3, 0x01));
+
+ body.emit(assign(r01A4, body.constant(0u), 0x01));
+
+
+ body.instructions = f01B0_parent_instructions;
+ body.emit(f01B0);
+
+ /* END IF */
+
+
+ body.instructions = f01AE_parent_instructions;
+ body.emit(f01AE);
+
+ /* END IF */
+
+ body.emit(assign(r01A5, body.constant(0u), 0x01));
+
+
+ body.instructions = f01AA_parent_instructions;
+ body.emit(f01AA);
+
+ /* END IF */
+
+ ir_expression *const r01B8 = nequal(r01A1, body.constant(0u));
+ ir_expression *const r01B9 = expr(ir_unop_b2i, r01B8);
+ ir_expression *const r01BA = expr(ir_unop_i2u, r01B9);
+ body.emit(assign(r01A3, bit_or(r01A3, r01BA), 0x01));
+
+
+ body.instructions = f01A8_parent_instructions;
+ body.emit(f01A8);
+
+ /* END IF */
+
+ body.emit(assign(r017D, r01A5, 0x01));
+
+ body.emit(assign(r017E, r01A4, 0x01));
+
+ body.emit(assign(r017F, r01A3, 0x01));
+
+
+ body.instructions = f0197_parent_instructions;
+ body.emit(f0197);
+
+ /* END IF */
+
+ body.emit(assign(r017C, sub(r017C, r0180), 0x01));
+
+ ir_variable *const r01BB = body.make_temp(glsl_type::int_type, "zExp");
+ body.emit(assign(r01BB, r017C, 0x01));
+
+ ir_variable *const r01BC = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r01BC, r017D, 0x01));
+
+ ir_variable *const r01BD = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r01BD, r017E, 0x01));
+
+ ir_variable *const r01BE = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r01BE, r017F, 0x01));
+
+ ir_variable *const r01BF = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r01BF, body.constant(true), 0x01));
+
+ ir_variable *const r01C0 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r01C1 = new(mem_ctx) ir_variable(glsl_type::bool_type, "increment", ir_var_auto);
+ body.emit(r01C1);
+ ir_expression *const r01C2 = expr(ir_unop_u2i, r017F);
+ body.emit(assign(r01C1, less(r01C2, body.constant(int(0))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r01C4 = lequal(body.constant(int(2045)), r017C);
+ ir_if *f01C3 = new(mem_ctx) ir_if(operand(r01C4).val);
+ exec_list *const f01C3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01C3->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r01C6 = less(body.constant(int(2045)), r017C);
+ ir_expression *const r01C7 = equal(r017C, body.constant(int(2045)));
+ ir_expression *const r01C8 = equal(body.constant(2097151u), r017D);
+ ir_expression *const r01C9 = equal(body.constant(4294967295u), r017E);
+ ir_expression *const r01CA = logic_and(r01C8, r01C9);
+ ir_expression *const r01CB = logic_and(r01C7, r01CA);
+ ir_expression *const r01CC = logic_and(r01CB, r01C1);
+ ir_expression *const r01CD = logic_or(r01C6, r01CC);
+ ir_if *f01C5 = new(mem_ctx) ir_if(operand(r01CD).val);
+ exec_list *const f01C5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01C5->then_instructions;
+
+ ir_variable *const r01CE = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r01CE);
+ ir_expression *const r01CF = lshift(r017B, body.constant(int(31)));
+ body.emit(assign(r01CE, add(r01CF, body.constant(2146435072u)), 0x02));
+
+ body.emit(assign(r01CE, body.constant(0u), 0x01));
+
+ body.emit(assign(r01C0, r01CE, 0x03));
+
+ body.emit(assign(r01BF, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01C5->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r01D1 = less(r017C, body.constant(int(0)));
+ ir_if *f01D0 = new(mem_ctx) ir_if(operand(r01D1).val);
+ exec_list *const f01D0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01D0->then_instructions;
+
+ ir_variable *const r01D2 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r01D2, r017F, 0x01));
+
+ ir_variable *const r01D3 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r01D3, neg(r017C), 0x01));
+
+ ir_variable *const r01D4 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r01D4);
+ ir_variable *const r01D5 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r01D5);
+ ir_variable *const r01D6 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r01D6);
+ ir_variable *const r01D7 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r01D8 = neg(r01D3);
+ body.emit(assign(r01D7, bit_and(r01D8, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r01DA = equal(r01D3, body.constant(int(0)));
+ ir_if *f01D9 = new(mem_ctx) ir_if(operand(r01DA).val);
+ exec_list *const f01D9_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01D9->then_instructions;
+
+ body.emit(assign(r01D4, r017F, 0x01));
+
+ body.emit(assign(r01D5, r017E, 0x01));
+
+ body.emit(assign(r01D6, r017D, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01D9->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r01DC = less(r01D3, body.constant(int(32)));
+ ir_if *f01DB = new(mem_ctx) ir_if(operand(r01DC).val);
+ exec_list *const f01DB_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01DB->then_instructions;
+
+ body.emit(assign(r01D4, lshift(r017E, r01D7), 0x01));
+
+ ir_expression *const r01DD = lshift(r017D, r01D7);
+ ir_expression *const r01DE = rshift(r017E, r01D3);
+ body.emit(assign(r01D5, bit_or(r01DD, r01DE), 0x01));
+
+ body.emit(assign(r01D6, rshift(r017D, r01D3), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01DB->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r01E0 = equal(r01D3, body.constant(int(32)));
+ ir_if *f01DF = new(mem_ctx) ir_if(operand(r01E0).val);
+ exec_list *const f01DF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01DF->then_instructions;
+
+ body.emit(assign(r01D4, r017E, 0x01));
+
+ body.emit(assign(r01D5, r017D, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01DF->else_instructions;
+
+ body.emit(assign(r01D2, bit_or(r017F, r017E), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r01E2 = less(r01D3, body.constant(int(64)));
+ ir_if *f01E1 = new(mem_ctx) ir_if(operand(r01E2).val);
+ exec_list *const f01E1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01E1->then_instructions;
+
+ body.emit(assign(r01D4, lshift(r017D, r01D7), 0x01));
+
+ ir_expression *const r01E3 = bit_and(r01D3, body.constant(int(31)));
+ body.emit(assign(r01D5, rshift(r017D, r01E3), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01E1->else_instructions;
+
+ ir_variable *const r01E4 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r01E6 = equal(r01D3, body.constant(int(64)));
+ ir_if *f01E5 = new(mem_ctx) ir_if(operand(r01E6).val);
+ exec_list *const f01E5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01E5->then_instructions;
+
+ body.emit(assign(r01E4, r017D, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01E5->else_instructions;
+
+ ir_expression *const r01E7 = nequal(r017D, body.constant(0u));
+ ir_expression *const r01E8 = expr(ir_unop_b2i, r01E7);
+ body.emit(assign(r01E4, expr(ir_unop_i2u, r01E8), 0x01));
+
+
+ body.instructions = f01E5_parent_instructions;
+ body.emit(f01E5);
+
+ /* END IF */
+
+ body.emit(assign(r01D4, r01E4, 0x01));
+
+ body.emit(assign(r01D5, body.constant(0u), 0x01));
+
+
+ body.instructions = f01E1_parent_instructions;
+ body.emit(f01E1);
+
+ /* END IF */
+
+
+ body.instructions = f01DF_parent_instructions;
+ body.emit(f01DF);
+
+ /* END IF */
+
+ body.emit(assign(r01D6, body.constant(0u), 0x01));
+
+
+ body.instructions = f01DB_parent_instructions;
+ body.emit(f01DB);
+
+ /* END IF */
+
+ ir_expression *const r01E9 = nequal(r01D2, body.constant(0u));
+ ir_expression *const r01EA = expr(ir_unop_b2i, r01E9);
+ ir_expression *const r01EB = expr(ir_unop_i2u, r01EA);
+ body.emit(assign(r01D4, bit_or(r01D4, r01EB), 0x01));
+
+
+ body.instructions = f01D9_parent_instructions;
+ body.emit(f01D9);
+
+ /* END IF */
+
+ body.emit(assign(r01BC, r01D6, 0x01));
+
+ body.emit(assign(r01BD, r01D5, 0x01));
+
+ body.emit(assign(r01BE, r01D4, 0x01));
+
+ body.emit(assign(r01BB, body.constant(int(0)), 0x01));
+
+ body.emit(assign(r01C1, less(r01D4, body.constant(0u)), 0x01));
+
+
+ body.instructions = f01D0_parent_instructions;
+ body.emit(f01D0);
+
+ /* END IF */
+
+
+ body.instructions = f01C5_parent_instructions;
+ body.emit(f01C5);
+
+ /* END IF */
+
+
+ body.instructions = f01C3_parent_instructions;
+ body.emit(f01C3);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f01EC = new(mem_ctx) ir_if(operand(r01BF).val);
+ exec_list *const f01EC_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01EC->then_instructions;
+
+ /* IF CONDITION */
+ ir_if *f01ED = new(mem_ctx) ir_if(operand(r01C1).val);
+ exec_list *const f01ED_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01ED->then_instructions;
+
+ ir_variable *const r01EE = body.make_temp(glsl_type::uint_type, "assignment_tmp");
+ body.emit(assign(r01EE, add(r01BD, body.constant(1u)), 0x01));
+
+ ir_expression *const r01EF = less(r01EE, r01BD);
+ ir_expression *const r01F0 = expr(ir_unop_b2i, r01EF);
+ ir_expression *const r01F1 = expr(ir_unop_i2u, r01F0);
+ body.emit(assign(r01BC, add(r01BC, r01F1), 0x01));
+
+ ir_expression *const r01F2 = equal(r01BE, body.constant(0u));
+ ir_expression *const r01F3 = expr(ir_unop_b2i, r01F2);
+ ir_expression *const r01F4 = expr(ir_unop_i2u, r01F3);
+ ir_expression *const r01F5 = add(r01BE, r01F4);
+ ir_expression *const r01F6 = bit_and(r01F5, body.constant(1u));
+ ir_expression *const r01F7 = expr(ir_unop_bit_not, r01F6);
+ body.emit(assign(r01BD, bit_and(r01EE, r01F7), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f01ED->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r01F9 = bit_or(r01BC, r01BD);
+ ir_expression *const r01FA = equal(r01F9, body.constant(0u));
+ ir_if *f01F8 = new(mem_ctx) ir_if(operand(r01FA).val);
+ exec_list *const f01F8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f01F8->then_instructions;
+
+ body.emit(assign(r01BB, body.constant(int(0)), 0x01));
+
+
+ body.instructions = f01F8_parent_instructions;
+ body.emit(f01F8);
+
+ /* END IF */
+
+
+ body.instructions = f01ED_parent_instructions;
+ body.emit(f01ED);
+
+ /* END IF */
+
+ ir_variable *const r01FB = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r01FB);
+ ir_expression *const r01FC = lshift(r017B, body.constant(int(31)));
+ ir_expression *const r01FD = expr(ir_unop_i2u, r01BB);
+ ir_expression *const r01FE = lshift(r01FD, body.constant(int(20)));
+ ir_expression *const r01FF = add(r01FC, r01FE);
+ body.emit(assign(r01FB, add(r01FF, r01BC), 0x02));
+
+ body.emit(assign(r01FB, r01BD, 0x01));
+
+ body.emit(assign(r01C0, r01FB, 0x03));
+
+ body.emit(assign(r01BF, body.constant(false), 0x01));
+
+
+ body.instructions = f01EC_parent_instructions;
+ body.emit(f01EC);
+
+ /* END IF */
+
+ body.emit(ret(r01C0));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+propagateFloat64NaN(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r0200 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
+ sig_parameters.push_tail(r0200);
+ ir_variable *const r0201 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "b", ir_var_function_in);
+ sig_parameters.push_tail(r0201);
+ ir_variable *const r0202 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0203 = body.make_temp(glsl_type::bool_type, "is_nan_retval");
+ ir_expression *const r0204 = lshift(swizzle_y(r0200), body.constant(int(1)));
+ ir_expression *const r0205 = lequal(body.constant(4292870144u), r0204);
+ ir_expression *const r0206 = nequal(swizzle_x(r0200), body.constant(0u));
+ ir_expression *const r0207 = bit_and(swizzle_y(r0200), body.constant(1048575u));
+ ir_expression *const r0208 = nequal(r0207, body.constant(0u));
+ ir_expression *const r0209 = logic_or(r0206, r0208);
+ body.emit(assign(r0203, logic_and(r0205, r0209), 0x01));
+
+ ir_variable *const r020A = body.make_temp(glsl_type::bool_type, "is_nan_retval");
+ ir_expression *const r020B = lshift(swizzle_y(r0201), body.constant(int(1)));
+ ir_expression *const r020C = lequal(body.constant(4292870144u), r020B);
+ ir_expression *const r020D = nequal(swizzle_x(r0201), body.constant(0u));
+ ir_expression *const r020E = bit_and(swizzle_y(r0201), body.constant(1048575u));
+ ir_expression *const r020F = nequal(r020E, body.constant(0u));
+ ir_expression *const r0210 = logic_or(r020D, r020F);
+ body.emit(assign(r020A, logic_and(r020C, r0210), 0x01));
+
+ body.emit(assign(r0200, bit_or(swizzle_y(r0200), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r0201, bit_or(swizzle_y(r0201), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_if *f0211 = new(mem_ctx) ir_if(operand(r0203).val);
+ exec_list *const f0211_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0211->then_instructions;
+
+ ir_variable *const r0212 = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_if *f0213 = new(mem_ctx) ir_if(operand(r020A).val);
+ exec_list *const f0213_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0213->then_instructions;
+
+ body.emit(assign(r0212, r0201, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0213->else_instructions;
+
+ body.emit(assign(r0212, r0200, 0x03));
+
+
+ body.instructions = f0213_parent_instructions;
+ body.emit(f0213);
+
+ /* END IF */
+
+ body.emit(assign(r0202, r0212, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0211->else_instructions;
+
+ body.emit(assign(r0202, r0201, 0x03));
+
+
+ body.instructions = f0211_parent_instructions;
+ body.emit(f0211);
+
+ /* END IF */
+
+ body.emit(ret(r0202));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+fadd64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r0214 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
+ sig_parameters.push_tail(r0214);
+ ir_variable *const r0215 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "b", ir_var_function_in);
+ sig_parameters.push_tail(r0215);
+ ir_variable *const r0216 = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r0216, body.constant(true), 0x01));
+
+ ir_variable *const r0217 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0218 = new(mem_ctx) ir_variable(glsl_type::uint_type, "aSign", ir_var_auto);
+ body.emit(r0218);
+ ir_variable *const r0219 = body.make_temp(glsl_type::uint_type, "extractFloat64Sign_retval");
+ body.emit(assign(r0219, rshift(swizzle_y(r0214), body.constant(int(31))), 0x01));
+
+ body.emit(assign(r0218, r0219, 0x01));
+
+ ir_variable *const r021A = body.make_temp(glsl_type::uint_type, "extractFloat64Sign_retval");
+ body.emit(assign(r021A, rshift(swizzle_y(r0215), body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r021C = equal(r0219, r021A);
+ ir_if *f021B = new(mem_ctx) ir_if(operand(r021C).val);
+ exec_list *const f021B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f021B->then_instructions;
+
+ ir_variable *const r021D = new(mem_ctx) ir_variable(glsl_type::int_type, "expDiff", ir_var_auto);
+ body.emit(r021D);
+ ir_variable *const r021E = new(mem_ctx) ir_variable(glsl_type::uint_type, "bFracHi", ir_var_auto);
+ body.emit(r021E);
+ ir_variable *const r021F = new(mem_ctx) ir_variable(glsl_type::uint_type, "bFracLo", ir_var_auto);
+ body.emit(r021F);
+ ir_variable *const r0220 = new(mem_ctx) ir_variable(glsl_type::uint_type, "aFracHi", ir_var_auto);
+ body.emit(r0220);
+ ir_variable *const r0221 = new(mem_ctx) ir_variable(glsl_type::uint_type, "aFracLo", ir_var_auto);
+ body.emit(r0221);
+ ir_variable *const r0222 = new(mem_ctx) ir_variable(glsl_type::int_type, "zExp", ir_var_auto);
+ body.emit(r0222);
+ ir_variable *const r0223 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r0223);
+ ir_variable *const r0224 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac0", ir_var_auto);
+ body.emit(r0224);
+ body.emit(assign(r0224, body.constant(0u), 0x01));
+
+ body.emit(assign(r0223, body.constant(0u), 0x01));
+
+ ir_variable *const r0225 = body.make_temp(glsl_type::uint_type, "extractFloat64FracLo_retval");
+ body.emit(assign(r0225, swizzle_x(r0214), 0x01));
+
+ body.emit(assign(r0221, r0225, 0x01));
+
+ ir_variable *const r0226 = body.make_temp(glsl_type::uint_type, "extractFloat64FracHi_retval");
+ body.emit(assign(r0226, bit_and(swizzle_y(r0214), body.constant(1048575u)), 0x01));
+
+ body.emit(assign(r0220, r0226, 0x01));
+
+ ir_variable *const r0227 = body.make_temp(glsl_type::uint_type, "extractFloat64FracLo_retval");
+ body.emit(assign(r0227, swizzle_x(r0215), 0x01));
+
+ body.emit(assign(r021F, r0227, 0x01));
+
+ ir_variable *const r0228 = body.make_temp(glsl_type::uint_type, "extractFloat64FracHi_retval");
+ body.emit(assign(r0228, bit_and(swizzle_y(r0215), body.constant(1048575u)), 0x01));
+
+ body.emit(assign(r021E, r0228, 0x01));
+
+ ir_variable *const r0229 = body.make_temp(glsl_type::int_type, "extractFloat64Exp_retval");
+ ir_expression *const r022A = rshift(swizzle_y(r0214), body.constant(int(20)));
+ ir_expression *const r022B = bit_and(r022A, body.constant(2047u));
+ body.emit(assign(r0229, expr(ir_unop_u2i, r022B), 0x01));
+
+ ir_variable *const r022C = body.make_temp(glsl_type::int_type, "extractFloat64Exp_retval");
+ ir_expression *const r022D = rshift(swizzle_y(r0215), body.constant(int(20)));
+ ir_expression *const r022E = bit_and(r022D, body.constant(2047u));
+ body.emit(assign(r022C, expr(ir_unop_u2i, r022E), 0x01));
+
+ ir_variable *const r022F = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ body.emit(assign(r022F, sub(r0229, r022C), 0x01));
+
+ body.emit(assign(r021D, r022F, 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0231 = less(body.constant(int(0)), r022F);
+ ir_if *f0230 = new(mem_ctx) ir_if(operand(r0231).val);
+ exec_list *const f0230_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0230->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0233 = equal(r0229, body.constant(int(2047)));
+ ir_if *f0232 = new(mem_ctx) ir_if(operand(r0233).val);
+ exec_list *const f0232_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0232->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0235 = bit_or(r0226, swizzle_x(r0214));
+ ir_expression *const r0236 = nequal(r0235, body.constant(0u));
+ ir_if *f0234 = new(mem_ctx) ir_if(operand(r0236).val);
+ exec_list *const f0234_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0234->then_instructions;
+
+ ir_variable *const r0237 = body.make_temp(glsl_type::uvec2_type, "a");
+ body.emit(assign(r0237, swizzle_x(r0214), 0x01));
+
+ ir_variable *const r0238 = body.make_temp(glsl_type::uvec2_type, "b");
+ body.emit(assign(r0238, swizzle_x(r0215), 0x01));
+
+ ir_variable *const r0239 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r023A = body.make_temp(glsl_type::bool_type, "is_nan_retval");
+ ir_expression *const r023B = lshift(swizzle_y(r0215), body.constant(int(1)));
+ ir_expression *const r023C = lequal(body.constant(4292870144u), r023B);
+ ir_expression *const r023D = nequal(swizzle_x(r0215), body.constant(0u));
+ ir_expression *const r023E = bit_and(swizzle_y(r0215), body.constant(1048575u));
+ ir_expression *const r023F = nequal(r023E, body.constant(0u));
+ ir_expression *const r0240 = logic_or(r023D, r023F);
+ body.emit(assign(r023A, logic_and(r023C, r0240), 0x01));
+
+ body.emit(assign(r0237, bit_or(swizzle_y(r0214), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r0238, bit_or(swizzle_y(r0215), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r0242 = lshift(swizzle_y(r0214), body.constant(int(1)));
+ ir_expression *const r0243 = lequal(body.constant(4292870144u), r0242);
+ ir_expression *const r0244 = nequal(swizzle_x(r0214), body.constant(0u));
+ ir_expression *const r0245 = bit_and(swizzle_y(r0214), body.constant(1048575u));
+ ir_expression *const r0246 = nequal(r0245, body.constant(0u));
+ ir_expression *const r0247 = logic_or(r0244, r0246);
+ ir_expression *const r0248 = logic_and(r0243, r0247);
+ ir_if *f0241 = new(mem_ctx) ir_if(operand(r0248).val);
+ exec_list *const f0241_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0241->then_instructions;
+
+ ir_variable *const r0249 = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_if *f024A = new(mem_ctx) ir_if(operand(r023A).val);
+ exec_list *const f024A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f024A->then_instructions;
+
+ body.emit(assign(r0249, r0238, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f024A->else_instructions;
+
+ body.emit(assign(r0249, r0237, 0x03));
+
+
+ body.instructions = f024A_parent_instructions;
+ body.emit(f024A);
+
+ /* END IF */
+
+ body.emit(assign(r0239, r0249, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0241->else_instructions;
+
+ body.emit(assign(r0239, r0238, 0x03));
+
+
+ body.instructions = f0241_parent_instructions;
+ body.emit(f0241);
+
+ /* END IF */
+
+ body.emit(assign(r0217, r0239, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0234->else_instructions;
+
+ body.emit(assign(r0217, r0214, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ body.instructions = f0234_parent_instructions;
+ body.emit(f0234);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0232->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r024C = equal(r022C, body.constant(int(0)));
+ ir_if *f024B = new(mem_ctx) ir_if(operand(r024C).val);
+ exec_list *const f024B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f024B->then_instructions;
+
+ body.emit(assign(r021D, add(r022F, body.constant(int(-1))), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f024B->else_instructions;
+
+ body.emit(assign(r021E, bit_or(r0228, body.constant(1048576u)), 0x01));
+
+
+ body.instructions = f024B_parent_instructions;
+ body.emit(f024B);
+
+ /* END IF */
+
+ ir_variable *const r024D = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r024D, body.constant(0u), 0x01));
+
+ ir_variable *const r024E = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r024E);
+ ir_variable *const r024F = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r024F);
+ ir_variable *const r0250 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0250);
+ ir_variable *const r0251 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0252 = neg(r021D);
+ body.emit(assign(r0251, bit_and(r0252, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0254 = equal(r021D, body.constant(int(0)));
+ ir_if *f0253 = new(mem_ctx) ir_if(operand(r0254).val);
+ exec_list *const f0253_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0253->then_instructions;
+
+ body.emit(assign(r024E, r024D, 0x01));
+
+ body.emit(assign(r024F, r0227, 0x01));
+
+ body.emit(assign(r0250, r021E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0253->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0256 = less(r021D, body.constant(int(32)));
+ ir_if *f0255 = new(mem_ctx) ir_if(operand(r0256).val);
+ exec_list *const f0255_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0255->then_instructions;
+
+ body.emit(assign(r024E, lshift(swizzle_x(r0215), r0251), 0x01));
+
+ ir_expression *const r0257 = lshift(r021E, r0251);
+ ir_expression *const r0258 = rshift(swizzle_x(r0215), r021D);
+ body.emit(assign(r024F, bit_or(r0257, r0258), 0x01));
+
+ body.emit(assign(r0250, rshift(r021E, r021D), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0255->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r025A = equal(r021D, body.constant(int(32)));
+ ir_if *f0259 = new(mem_ctx) ir_if(operand(r025A).val);
+ exec_list *const f0259_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0259->then_instructions;
+
+ body.emit(assign(r024E, r0227, 0x01));
+
+ body.emit(assign(r024F, r021E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0259->else_instructions;
+
+ body.emit(assign(r024D, bit_or(body.constant(0u), swizzle_x(r0215)), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r025C = less(r021D, body.constant(int(64)));
+ ir_if *f025B = new(mem_ctx) ir_if(operand(r025C).val);
+ exec_list *const f025B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f025B->then_instructions;
+
+ body.emit(assign(r024E, lshift(r021E, r0251), 0x01));
+
+ ir_expression *const r025D = bit_and(r021D, body.constant(int(31)));
+ body.emit(assign(r024F, rshift(r021E, r025D), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f025B->else_instructions;
+
+ ir_variable *const r025E = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0260 = equal(r021D, body.constant(int(64)));
+ ir_if *f025F = new(mem_ctx) ir_if(operand(r0260).val);
+ exec_list *const f025F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f025F->then_instructions;
+
+ body.emit(assign(r025E, r021E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f025F->else_instructions;
+
+ ir_expression *const r0261 = nequal(r021E, body.constant(0u));
+ ir_expression *const r0262 = expr(ir_unop_b2i, r0261);
+ body.emit(assign(r025E, expr(ir_unop_i2u, r0262), 0x01));
+
+
+ body.instructions = f025F_parent_instructions;
+ body.emit(f025F);
+
+ /* END IF */
+
+ body.emit(assign(r024E, r025E, 0x01));
+
+ body.emit(assign(r024F, body.constant(0u), 0x01));
+
+
+ body.instructions = f025B_parent_instructions;
+ body.emit(f025B);
+
+ /* END IF */
+
+
+ body.instructions = f0259_parent_instructions;
+ body.emit(f0259);
+
+ /* END IF */
+
+ body.emit(assign(r0250, body.constant(0u), 0x01));
+
+
+ body.instructions = f0255_parent_instructions;
+ body.emit(f0255);
+
+ /* END IF */
+
+ ir_expression *const r0263 = nequal(r024D, body.constant(0u));
+ ir_expression *const r0264 = expr(ir_unop_b2i, r0263);
+ ir_expression *const r0265 = expr(ir_unop_i2u, r0264);
+ body.emit(assign(r024E, bit_or(r024E, r0265), 0x01));
+
+
+ body.instructions = f0253_parent_instructions;
+ body.emit(f0253);
+
+ /* END IF */
+
+ body.emit(assign(r021E, r0250, 0x01));
+
+ body.emit(assign(r021F, r024F, 0x01));
+
+ body.emit(assign(r0223, r024E, 0x01));
+
+ body.emit(assign(r0222, r0229, 0x01));
+
+
+ body.instructions = f0232_parent_instructions;
+ body.emit(f0232);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0230->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0267 = less(r021D, body.constant(int(0)));
+ ir_if *f0266 = new(mem_ctx) ir_if(operand(r0267).val);
+ exec_list *const f0266_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0266->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0269 = equal(r022C, body.constant(int(2047)));
+ ir_if *f0268 = new(mem_ctx) ir_if(operand(r0269).val);
+ exec_list *const f0268_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0268->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r026B = bit_or(r021E, r021F);
+ ir_expression *const r026C = nequal(r026B, body.constant(0u));
+ ir_if *f026A = new(mem_ctx) ir_if(operand(r026C).val);
+ exec_list *const f026A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f026A->then_instructions;
+
+ ir_variable *const r026D = body.make_temp(glsl_type::uvec2_type, "a");
+ body.emit(assign(r026D, swizzle_x(r0214), 0x01));
+
+ ir_variable *const r026E = body.make_temp(glsl_type::uvec2_type, "b");
+ body.emit(assign(r026E, swizzle_x(r0215), 0x01));
+
+ ir_variable *const r026F = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0270 = body.make_temp(glsl_type::bool_type, "is_nan_retval");
+ ir_expression *const r0271 = lshift(swizzle_y(r0215), body.constant(int(1)));
+ ir_expression *const r0272 = lequal(body.constant(4292870144u), r0271);
+ ir_expression *const r0273 = nequal(swizzle_x(r0215), body.constant(0u));
+ ir_expression *const r0274 = bit_and(swizzle_y(r0215), body.constant(1048575u));
+ ir_expression *const r0275 = nequal(r0274, body.constant(0u));
+ ir_expression *const r0276 = logic_or(r0273, r0275);
+ body.emit(assign(r0270, logic_and(r0272, r0276), 0x01));
+
+ body.emit(assign(r026D, bit_or(swizzle_y(r0214), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r026E, bit_or(swizzle_y(r0215), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r0278 = lshift(swizzle_y(r0214), body.constant(int(1)));
+ ir_expression *const r0279 = lequal(body.constant(4292870144u), r0278);
+ ir_expression *const r027A = nequal(swizzle_x(r0214), body.constant(0u));
+ ir_expression *const r027B = bit_and(swizzle_y(r0214), body.constant(1048575u));
+ ir_expression *const r027C = nequal(r027B, body.constant(0u));
+ ir_expression *const r027D = logic_or(r027A, r027C);
+ ir_expression *const r027E = logic_and(r0279, r027D);
+ ir_if *f0277 = new(mem_ctx) ir_if(operand(r027E).val);
+ exec_list *const f0277_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0277->then_instructions;
+
+ ir_variable *const r027F = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_if *f0280 = new(mem_ctx) ir_if(operand(r0270).val);
+ exec_list *const f0280_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0280->then_instructions;
+
+ body.emit(assign(r027F, r026E, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0280->else_instructions;
+
+ body.emit(assign(r027F, r026D, 0x03));
+
+
+ body.instructions = f0280_parent_instructions;
+ body.emit(f0280);
+
+ /* END IF */
+
+ body.emit(assign(r026F, r027F, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0277->else_instructions;
+
+ body.emit(assign(r026F, r026E, 0x03));
+
+
+ body.instructions = f0277_parent_instructions;
+ body.emit(f0277);
+
+ /* END IF */
+
+ body.emit(assign(r0217, r026F, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f026A->else_instructions;
+
+ ir_variable *const r0281 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0281);
+ ir_expression *const r0282 = lshift(r0219, body.constant(int(31)));
+ body.emit(assign(r0281, add(r0282, body.constant(2146435072u)), 0x02));
+
+ body.emit(assign(r0281, body.constant(0u), 0x01));
+
+ body.emit(assign(r0217, r0281, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ body.instructions = f026A_parent_instructions;
+ body.emit(f026A);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0268->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0284 = equal(r0229, body.constant(int(0)));
+ ir_if *f0283 = new(mem_ctx) ir_if(operand(r0284).val);
+ exec_list *const f0283_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0283->then_instructions;
+
+ body.emit(assign(r021D, add(r021D, body.constant(int(1))), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0283->else_instructions;
+
+ body.emit(assign(r0220, bit_or(r0226, body.constant(1048576u)), 0x01));
+
+
+ body.instructions = f0283_parent_instructions;
+ body.emit(f0283);
+
+ /* END IF */
+
+ ir_variable *const r0285 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0285, body.constant(0u), 0x01));
+
+ ir_variable *const r0286 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r0286, neg(r021D), 0x01));
+
+ ir_variable *const r0287 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0287);
+ ir_variable *const r0288 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0288);
+ ir_variable *const r0289 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0289);
+ ir_variable *const r028A = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r028B = neg(r0286);
+ body.emit(assign(r028A, bit_and(r028B, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r028D = equal(r0286, body.constant(int(0)));
+ ir_if *f028C = new(mem_ctx) ir_if(operand(r028D).val);
+ exec_list *const f028C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f028C->then_instructions;
+
+ body.emit(assign(r0287, r0285, 0x01));
+
+ body.emit(assign(r0288, r0225, 0x01));
+
+ body.emit(assign(r0289, r0220, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f028C->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r028F = less(r0286, body.constant(int(32)));
+ ir_if *f028E = new(mem_ctx) ir_if(operand(r028F).val);
+ exec_list *const f028E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f028E->then_instructions;
+
+ body.emit(assign(r0287, lshift(swizzle_x(r0214), r028A), 0x01));
+
+ ir_expression *const r0290 = lshift(r0220, r028A);
+ ir_expression *const r0291 = rshift(swizzle_x(r0214), r0286);
+ body.emit(assign(r0288, bit_or(r0290, r0291), 0x01));
+
+ body.emit(assign(r0289, rshift(r0220, r0286), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f028E->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0293 = equal(r0286, body.constant(int(32)));
+ ir_if *f0292 = new(mem_ctx) ir_if(operand(r0293).val);
+ exec_list *const f0292_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0292->then_instructions;
+
+ body.emit(assign(r0287, r0225, 0x01));
+
+ body.emit(assign(r0288, r0220, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0292->else_instructions;
+
+ body.emit(assign(r0285, bit_or(body.constant(0u), swizzle_x(r0214)), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0295 = less(r0286, body.constant(int(64)));
+ ir_if *f0294 = new(mem_ctx) ir_if(operand(r0295).val);
+ exec_list *const f0294_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0294->then_instructions;
+
+ body.emit(assign(r0287, lshift(r0220, r028A), 0x01));
+
+ ir_expression *const r0296 = bit_and(r0286, body.constant(int(31)));
+ body.emit(assign(r0288, rshift(r0220, r0296), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0294->else_instructions;
+
+ ir_variable *const r0297 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0299 = equal(r0286, body.constant(int(64)));
+ ir_if *f0298 = new(mem_ctx) ir_if(operand(r0299).val);
+ exec_list *const f0298_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0298->then_instructions;
+
+ body.emit(assign(r0297, r0220, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0298->else_instructions;
+
+ ir_expression *const r029A = nequal(r0220, body.constant(0u));
+ ir_expression *const r029B = expr(ir_unop_b2i, r029A);
+ body.emit(assign(r0297, expr(ir_unop_i2u, r029B), 0x01));
+
+
+ body.instructions = f0298_parent_instructions;
+ body.emit(f0298);
+
+ /* END IF */
+
+ body.emit(assign(r0287, r0297, 0x01));
+
+ body.emit(assign(r0288, body.constant(0u), 0x01));
+
+
+ body.instructions = f0294_parent_instructions;
+ body.emit(f0294);
+
+ /* END IF */
+
+
+ body.instructions = f0292_parent_instructions;
+ body.emit(f0292);
+
+ /* END IF */
+
+ body.emit(assign(r0289, body.constant(0u), 0x01));
+
+
+ body.instructions = f028E_parent_instructions;
+ body.emit(f028E);
+
+ /* END IF */
+
+ ir_expression *const r029C = nequal(r0285, body.constant(0u));
+ ir_expression *const r029D = expr(ir_unop_b2i, r029C);
+ ir_expression *const r029E = expr(ir_unop_i2u, r029D);
+ body.emit(assign(r0287, bit_or(r0287, r029E), 0x01));
+
+
+ body.instructions = f028C_parent_instructions;
+ body.emit(f028C);
+
+ /* END IF */
+
+ body.emit(assign(r0220, r0289, 0x01));
+
+ body.emit(assign(r0221, r0288, 0x01));
+
+ body.emit(assign(r0223, r0287, 0x01));
+
+ body.emit(assign(r0222, r022C, 0x01));
+
+
+ body.instructions = f0268_parent_instructions;
+ body.emit(f0268);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0266->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r02A0 = equal(r0229, body.constant(int(2047)));
+ ir_if *f029F = new(mem_ctx) ir_if(operand(r02A0).val);
+ exec_list *const f029F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f029F->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r02A2 = bit_or(r0220, r0221);
+ ir_expression *const r02A3 = bit_or(r021E, r021F);
+ ir_expression *const r02A4 = bit_or(r02A2, r02A3);
+ ir_expression *const r02A5 = nequal(r02A4, body.constant(0u));
+ ir_if *f02A1 = new(mem_ctx) ir_if(operand(r02A5).val);
+ exec_list *const f02A1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02A1->then_instructions;
+
+ ir_variable *const r02A6 = body.make_temp(glsl_type::uvec2_type, "a");
+ body.emit(assign(r02A6, swizzle_x(r0214), 0x01));
+
+ ir_variable *const r02A7 = body.make_temp(glsl_type::uvec2_type, "b");
+ body.emit(assign(r02A7, swizzle_x(r0215), 0x01));
+
+ ir_variable *const r02A8 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r02A9 = body.make_temp(glsl_type::bool_type, "is_nan_retval");
+ ir_expression *const r02AA = lshift(swizzle_y(r0215), body.constant(int(1)));
+ ir_expression *const r02AB = lequal(body.constant(4292870144u), r02AA);
+ ir_expression *const r02AC = nequal(swizzle_x(r0215), body.constant(0u));
+ ir_expression *const r02AD = bit_and(swizzle_y(r0215), body.constant(1048575u));
+ ir_expression *const r02AE = nequal(r02AD, body.constant(0u));
+ ir_expression *const r02AF = logic_or(r02AC, r02AE);
+ body.emit(assign(r02A9, logic_and(r02AB, r02AF), 0x01));
+
+ body.emit(assign(r02A6, bit_or(swizzle_y(r0214), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r02A7, bit_or(swizzle_y(r0215), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r02B1 = lshift(swizzle_y(r0214), body.constant(int(1)));
+ ir_expression *const r02B2 = lequal(body.constant(4292870144u), r02B1);
+ ir_expression *const r02B3 = nequal(swizzle_x(r0214), body.constant(0u));
+ ir_expression *const r02B4 = bit_and(swizzle_y(r0214), body.constant(1048575u));
+ ir_expression *const r02B5 = nequal(r02B4, body.constant(0u));
+ ir_expression *const r02B6 = logic_or(r02B3, r02B5);
+ ir_expression *const r02B7 = logic_and(r02B2, r02B6);
+ ir_if *f02B0 = new(mem_ctx) ir_if(operand(r02B7).val);
+ exec_list *const f02B0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02B0->then_instructions;
+
+ ir_variable *const r02B8 = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_if *f02B9 = new(mem_ctx) ir_if(operand(r02A9).val);
+ exec_list *const f02B9_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02B9->then_instructions;
+
+ body.emit(assign(r02B8, r02A7, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02B9->else_instructions;
+
+ body.emit(assign(r02B8, r02A6, 0x03));
+
+
+ body.instructions = f02B9_parent_instructions;
+ body.emit(f02B9);
+
+ /* END IF */
+
+ body.emit(assign(r02A8, r02B8, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02B0->else_instructions;
+
+ body.emit(assign(r02A8, r02A7, 0x03));
+
+
+ body.instructions = f02B0_parent_instructions;
+ body.emit(f02B0);
+
+ /* END IF */
+
+ body.emit(assign(r0217, r02A8, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02A1->else_instructions;
+
+ body.emit(assign(r0217, r0214, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ body.instructions = f02A1_parent_instructions;
+ body.emit(f02A1);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f029F->else_instructions;
+
+ ir_variable *const r02BA = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r02BB = body.make_temp(glsl_type::uint_type, "assignment_tmp");
+ body.emit(assign(r02BB, add(r0221, r021F), 0x01));
+
+ ir_expression *const r02BC = add(r0220, r021E);
+ ir_expression *const r02BD = less(r02BB, r0221);
+ ir_expression *const r02BE = expr(ir_unop_b2i, r02BD);
+ ir_expression *const r02BF = expr(ir_unop_i2u, r02BE);
+ body.emit(assign(r02BA, add(r02BC, r02BF), 0x01));
+
+ body.emit(assign(r0224, r02BA, 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r02C1 = equal(r0229, body.constant(int(0)));
+ ir_if *f02C0 = new(mem_ctx) ir_if(operand(r02C1).val);
+ exec_list *const f02C0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02C0->then_instructions;
+
+ ir_variable *const r02C2 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r02C2);
+ ir_expression *const r02C3 = lshift(r0219, body.constant(int(31)));
+ body.emit(assign(r02C2, add(r02C3, r02BA), 0x02));
+
+ body.emit(assign(r02C2, r02BB, 0x01));
+
+ body.emit(assign(r0217, r02C2, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02C0->else_instructions;
+
+ body.emit(assign(r0224, bit_or(r02BA, body.constant(2097152u)), 0x01));
+
+ body.emit(assign(r0222, r0229, 0x01));
+
+ ir_variable *const r02C4 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r02C4);
+ ir_variable *const r02C5 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r02C5);
+ ir_variable *const r02C6 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r02C6);
+ body.emit(assign(r02C4, lshift(r02BB, body.constant(int(31))), 0x01));
+
+ ir_expression *const r02C7 = lshift(r0224, body.constant(int(31)));
+ ir_expression *const r02C8 = rshift(r02BB, body.constant(int(1)));
+ body.emit(assign(r02C5, bit_or(r02C7, r02C8), 0x01));
+
+ body.emit(assign(r02C6, rshift(r0224, body.constant(int(1))), 0x01));
+
+ body.emit(assign(r02C4, bit_or(r02C4, body.constant(0u)), 0x01));
+
+ body.emit(assign(r0224, r02C6, 0x01));
+
+ body.emit(assign(r0223, r02C4, 0x01));
+
+ ir_variable *const r02C9 = body.make_temp(glsl_type::int_type, "zExp");
+ body.emit(assign(r02C9, r0229, 0x01));
+
+ ir_variable *const r02CA = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r02CA, r02C6, 0x01));
+
+ ir_variable *const r02CB = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r02CB, r02C5, 0x01));
+
+ ir_variable *const r02CC = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r02CC, r02C4, 0x01));
+
+ ir_variable *const r02CD = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r02CD, body.constant(true), 0x01));
+
+ ir_variable *const r02CE = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r02CF = new(mem_ctx) ir_variable(glsl_type::bool_type, "increment", ir_var_auto);
+ body.emit(r02CF);
+ ir_expression *const r02D0 = expr(ir_unop_u2i, r02C4);
+ body.emit(assign(r02CF, less(r02D0, body.constant(int(0))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r02D2 = lequal(body.constant(int(2045)), r0229);
+ ir_if *f02D1 = new(mem_ctx) ir_if(operand(r02D2).val);
+ exec_list *const f02D1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02D1->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r02D4 = less(body.constant(int(2045)), r0229);
+ ir_expression *const r02D5 = equal(r0229, body.constant(int(2045)));
+ ir_expression *const r02D6 = equal(body.constant(2097151u), r02C6);
+ ir_expression *const r02D7 = equal(body.constant(4294967295u), r02C5);
+ ir_expression *const r02D8 = logic_and(r02D6, r02D7);
+ ir_expression *const r02D9 = logic_and(r02D5, r02D8);
+ ir_expression *const r02DA = logic_and(r02D9, r02CF);
+ ir_expression *const r02DB = logic_or(r02D4, r02DA);
+ ir_if *f02D3 = new(mem_ctx) ir_if(operand(r02DB).val);
+ exec_list *const f02D3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02D3->then_instructions;
+
+ ir_variable *const r02DC = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r02DC);
+ ir_expression *const r02DD = lshift(r0219, body.constant(int(31)));
+ body.emit(assign(r02DC, add(r02DD, body.constant(2146435072u)), 0x02));
+
+ body.emit(assign(r02DC, body.constant(0u), 0x01));
+
+ body.emit(assign(r02CE, r02DC, 0x03));
+
+ body.emit(assign(r02CD, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02D3->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r02DF = less(r0229, body.constant(int(0)));
+ ir_if *f02DE = new(mem_ctx) ir_if(operand(r02DF).val);
+ exec_list *const f02DE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02DE->then_instructions;
+
+ ir_variable *const r02E0 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r02E0, r02C4, 0x01));
+
+ ir_variable *const r02E1 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r02E1, neg(r0229), 0x01));
+
+ ir_variable *const r02E2 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r02E2);
+ ir_variable *const r02E3 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r02E3);
+ ir_variable *const r02E4 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r02E4);
+ ir_variable *const r02E5 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r02E6 = neg(r02E1);
+ body.emit(assign(r02E5, bit_and(r02E6, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r02E8 = equal(r02E1, body.constant(int(0)));
+ ir_if *f02E7 = new(mem_ctx) ir_if(operand(r02E8).val);
+ exec_list *const f02E7_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02E7->then_instructions;
+
+ body.emit(assign(r02E2, r02C4, 0x01));
+
+ body.emit(assign(r02E3, r02C5, 0x01));
+
+ body.emit(assign(r02E4, r02C6, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02E7->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r02EA = less(r02E1, body.constant(int(32)));
+ ir_if *f02E9 = new(mem_ctx) ir_if(operand(r02EA).val);
+ exec_list *const f02E9_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02E9->then_instructions;
+
+ body.emit(assign(r02E2, lshift(r02C5, r02E5), 0x01));
+
+ ir_expression *const r02EB = lshift(r02C6, r02E5);
+ ir_expression *const r02EC = rshift(r02C5, r02E1);
+ body.emit(assign(r02E3, bit_or(r02EB, r02EC), 0x01));
+
+ body.emit(assign(r02E4, rshift(r02C6, r02E1), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02E9->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r02EE = equal(r02E1, body.constant(int(32)));
+ ir_if *f02ED = new(mem_ctx) ir_if(operand(r02EE).val);
+ exec_list *const f02ED_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02ED->then_instructions;
+
+ body.emit(assign(r02E2, r02C5, 0x01));
+
+ body.emit(assign(r02E3, r02C6, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02ED->else_instructions;
+
+ body.emit(assign(r02E0, bit_or(r02C4, r02C5), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r02F0 = less(r02E1, body.constant(int(64)));
+ ir_if *f02EF = new(mem_ctx) ir_if(operand(r02F0).val);
+ exec_list *const f02EF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02EF->then_instructions;
+
+ body.emit(assign(r02E2, lshift(r02C6, r02E5), 0x01));
+
+ ir_expression *const r02F1 = bit_and(r02E1, body.constant(int(31)));
+ body.emit(assign(r02E3, rshift(r02C6, r02F1), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02EF->else_instructions;
+
+ ir_variable *const r02F2 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r02F4 = equal(r02E1, body.constant(int(64)));
+ ir_if *f02F3 = new(mem_ctx) ir_if(operand(r02F4).val);
+ exec_list *const f02F3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02F3->then_instructions;
+
+ body.emit(assign(r02F2, r02C6, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02F3->else_instructions;
+
+ ir_expression *const r02F5 = nequal(r02C6, body.constant(0u));
+ ir_expression *const r02F6 = expr(ir_unop_b2i, r02F5);
+ body.emit(assign(r02F2, expr(ir_unop_i2u, r02F6), 0x01));
+
+
+ body.instructions = f02F3_parent_instructions;
+ body.emit(f02F3);
+
+ /* END IF */
+
+ body.emit(assign(r02E2, r02F2, 0x01));
+
+ body.emit(assign(r02E3, body.constant(0u), 0x01));
+
+
+ body.instructions = f02EF_parent_instructions;
+ body.emit(f02EF);
+
+ /* END IF */
+
+
+ body.instructions = f02ED_parent_instructions;
+ body.emit(f02ED);
+
+ /* END IF */
+
+ body.emit(assign(r02E4, body.constant(0u), 0x01));
+
+
+ body.instructions = f02E9_parent_instructions;
+ body.emit(f02E9);
+
+ /* END IF */
+
+ ir_expression *const r02F7 = nequal(r02E0, body.constant(0u));
+ ir_expression *const r02F8 = expr(ir_unop_b2i, r02F7);
+ ir_expression *const r02F9 = expr(ir_unop_i2u, r02F8);
+ body.emit(assign(r02E2, bit_or(r02E2, r02F9), 0x01));
+
+
+ body.instructions = f02E7_parent_instructions;
+ body.emit(f02E7);
+
+ /* END IF */
+
+ body.emit(assign(r02CA, r02E4, 0x01));
+
+ body.emit(assign(r02CB, r02E3, 0x01));
+
+ body.emit(assign(r02CC, r02E2, 0x01));
+
+ body.emit(assign(r02C9, body.constant(int(0)), 0x01));
+
+ body.emit(assign(r02CF, less(r02E2, body.constant(0u)), 0x01));
+
+
+ body.instructions = f02DE_parent_instructions;
+ body.emit(f02DE);
+
+ /* END IF */
+
+
+ body.instructions = f02D3_parent_instructions;
+ body.emit(f02D3);
+
+ /* END IF */
+
+
+ body.instructions = f02D1_parent_instructions;
+ body.emit(f02D1);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f02FA = new(mem_ctx) ir_if(operand(r02CD).val);
+ exec_list *const f02FA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02FA->then_instructions;
+
+ /* IF CONDITION */
+ ir_if *f02FB = new(mem_ctx) ir_if(operand(r02CF).val);
+ exec_list *const f02FB_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f02FB->then_instructions;
+
+ ir_variable *const r02FC = body.make_temp(glsl_type::uint_type, "assignment_tmp");
+ body.emit(assign(r02FC, add(r02CB, body.constant(1u)), 0x01));
+
+ ir_expression *const r02FD = less(r02FC, r02CB);
+ ir_expression *const r02FE = expr(ir_unop_b2i, r02FD);
+ ir_expression *const r02FF = expr(ir_unop_i2u, r02FE);
+ body.emit(assign(r02CA, add(r02CA, r02FF), 0x01));
+
+ ir_expression *const r0300 = equal(r02CC, body.constant(0u));
+ ir_expression *const r0301 = expr(ir_unop_b2i, r0300);
+ ir_expression *const r0302 = expr(ir_unop_i2u, r0301);
+ ir_expression *const r0303 = add(r02CC, r0302);
+ ir_expression *const r0304 = bit_and(r0303, body.constant(1u));
+ ir_expression *const r0305 = expr(ir_unop_bit_not, r0304);
+ body.emit(assign(r02CB, bit_and(r02FC, r0305), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f02FB->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0307 = bit_or(r02CA, r02CB);
+ ir_expression *const r0308 = equal(r0307, body.constant(0u));
+ ir_if *f0306 = new(mem_ctx) ir_if(operand(r0308).val);
+ exec_list *const f0306_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0306->then_instructions;
+
+ body.emit(assign(r02C9, body.constant(int(0)), 0x01));
+
+
+ body.instructions = f0306_parent_instructions;
+ body.emit(f0306);
+
+ /* END IF */
+
+
+ body.instructions = f02FB_parent_instructions;
+ body.emit(f02FB);
+
+ /* END IF */
+
+ ir_variable *const r0309 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0309);
+ ir_expression *const r030A = lshift(r0219, body.constant(int(31)));
+ ir_expression *const r030B = expr(ir_unop_i2u, r02C9);
+ ir_expression *const r030C = lshift(r030B, body.constant(int(20)));
+ ir_expression *const r030D = add(r030A, r030C);
+ body.emit(assign(r0309, add(r030D, r02CA), 0x02));
+
+ body.emit(assign(r0309, r02CB, 0x01));
+
+ body.emit(assign(r02CE, r0309, 0x03));
+
+ body.emit(assign(r02CD, body.constant(false), 0x01));
+
+
+ body.instructions = f02FA_parent_instructions;
+ body.emit(f02FA);
+
+ /* END IF */
+
+ body.emit(assign(r0217, r02CE, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ body.instructions = f02C0_parent_instructions;
+ body.emit(f02C0);
+
+ /* END IF */
+
+
+ body.instructions = f029F_parent_instructions;
+ body.emit(f029F);
+
+ /* END IF */
+
+
+ body.instructions = f0266_parent_instructions;
+ body.emit(f0266);
+
+ /* END IF */
+
+
+ body.instructions = f0230_parent_instructions;
+ body.emit(f0230);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f030E = new(mem_ctx) ir_if(operand(r0216).val);
+ exec_list *const f030E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f030E->then_instructions;
+
+ body.emit(assign(r0220, bit_or(r0220, body.constant(1048576u)), 0x01));
+
+ ir_variable *const r030F = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r0310 = body.make_temp(glsl_type::uint_type, "assignment_tmp");
+ body.emit(assign(r0310, add(r0221, r021F), 0x01));
+
+ ir_expression *const r0311 = add(r0220, r021E);
+ ir_expression *const r0312 = less(r0310, r0221);
+ ir_expression *const r0313 = expr(ir_unop_b2i, r0312);
+ ir_expression *const r0314 = expr(ir_unop_i2u, r0313);
+ body.emit(assign(r030F, add(r0311, r0314), 0x01));
+
+ body.emit(assign(r0224, r030F, 0x01));
+
+ body.emit(assign(r0222, add(r0222, body.constant(int(-1))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0316 = less(r030F, body.constant(2097152u));
+ ir_if *f0315 = new(mem_ctx) ir_if(operand(r0316).val);
+ exec_list *const f0315_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0315->then_instructions;
+
+ ir_variable *const r0317 = body.make_temp(glsl_type::int_type, "zExp");
+ body.emit(assign(r0317, r0222, 0x01));
+
+ ir_variable *const r0318 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0318, r030F, 0x01));
+
+ ir_variable *const r0319 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0319, r0310, 0x01));
+
+ ir_variable *const r031A = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r031A, r0223, 0x01));
+
+ ir_variable *const r031B = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r031B, body.constant(true), 0x01));
+
+ ir_variable *const r031C = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r031D = new(mem_ctx) ir_variable(glsl_type::bool_type, "increment", ir_var_auto);
+ body.emit(r031D);
+ ir_expression *const r031E = expr(ir_unop_u2i, r0223);
+ body.emit(assign(r031D, less(r031E, body.constant(int(0))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0320 = lequal(body.constant(int(2045)), r0222);
+ ir_if *f031F = new(mem_ctx) ir_if(operand(r0320).val);
+ exec_list *const f031F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f031F->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0322 = less(body.constant(int(2045)), r0222);
+ ir_expression *const r0323 = equal(r0222, body.constant(int(2045)));
+ ir_expression *const r0324 = equal(body.constant(2097151u), r030F);
+ ir_expression *const r0325 = equal(body.constant(4294967295u), r0310);
+ ir_expression *const r0326 = logic_and(r0324, r0325);
+ ir_expression *const r0327 = logic_and(r0323, r0326);
+ ir_expression *const r0328 = logic_and(r0327, r031D);
+ ir_expression *const r0329 = logic_or(r0322, r0328);
+ ir_if *f0321 = new(mem_ctx) ir_if(operand(r0329).val);
+ exec_list *const f0321_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0321->then_instructions;
+
+ ir_variable *const r032A = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r032A);
+ ir_expression *const r032B = lshift(r0219, body.constant(int(31)));
+ body.emit(assign(r032A, add(r032B, body.constant(2146435072u)), 0x02));
+
+ body.emit(assign(r032A, body.constant(0u), 0x01));
+
+ body.emit(assign(r031C, r032A, 0x03));
+
+ body.emit(assign(r031B, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0321->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r032D = less(r0222, body.constant(int(0)));
+ ir_if *f032C = new(mem_ctx) ir_if(operand(r032D).val);
+ exec_list *const f032C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f032C->then_instructions;
+
+ ir_variable *const r032E = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r032E, r0223, 0x01));
+
+ ir_variable *const r032F = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r032F, neg(r0222), 0x01));
+
+ ir_variable *const r0330 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0330);
+ ir_variable *const r0331 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0331);
+ ir_variable *const r0332 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0332);
+ ir_variable *const r0333 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0334 = neg(r032F);
+ body.emit(assign(r0333, bit_and(r0334, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0336 = equal(r032F, body.constant(int(0)));
+ ir_if *f0335 = new(mem_ctx) ir_if(operand(r0336).val);
+ exec_list *const f0335_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0335->then_instructions;
+
+ body.emit(assign(r0330, r0223, 0x01));
+
+ body.emit(assign(r0331, r0310, 0x01));
+
+ body.emit(assign(r0332, r030F, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0335->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0338 = less(r032F, body.constant(int(32)));
+ ir_if *f0337 = new(mem_ctx) ir_if(operand(r0338).val);
+ exec_list *const f0337_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0337->then_instructions;
+
+ body.emit(assign(r0330, lshift(r0310, r0333), 0x01));
+
+ ir_expression *const r0339 = lshift(r030F, r0333);
+ ir_expression *const r033A = rshift(r0310, r032F);
+ body.emit(assign(r0331, bit_or(r0339, r033A), 0x01));
+
+ body.emit(assign(r0332, rshift(r030F, r032F), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0337->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r033C = equal(r032F, body.constant(int(32)));
+ ir_if *f033B = new(mem_ctx) ir_if(operand(r033C).val);
+ exec_list *const f033B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f033B->then_instructions;
+
+ body.emit(assign(r0330, r0310, 0x01));
+
+ body.emit(assign(r0331, r030F, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f033B->else_instructions;
+
+ body.emit(assign(r032E, bit_or(r0223, r0310), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r033E = less(r032F, body.constant(int(64)));
+ ir_if *f033D = new(mem_ctx) ir_if(operand(r033E).val);
+ exec_list *const f033D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f033D->then_instructions;
+
+ body.emit(assign(r0330, lshift(r030F, r0333), 0x01));
+
+ ir_expression *const r033F = bit_and(r032F, body.constant(int(31)));
+ body.emit(assign(r0331, rshift(r030F, r033F), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f033D->else_instructions;
+
+ ir_variable *const r0340 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0342 = equal(r032F, body.constant(int(64)));
+ ir_if *f0341 = new(mem_ctx) ir_if(operand(r0342).val);
+ exec_list *const f0341_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0341->then_instructions;
+
+ body.emit(assign(r0340, r030F, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0341->else_instructions;
+
+ ir_expression *const r0343 = nequal(r030F, body.constant(0u));
+ ir_expression *const r0344 = expr(ir_unop_b2i, r0343);
+ body.emit(assign(r0340, expr(ir_unop_i2u, r0344), 0x01));
+
+
+ body.instructions = f0341_parent_instructions;
+ body.emit(f0341);
+
+ /* END IF */
+
+ body.emit(assign(r0330, r0340, 0x01));
+
+ body.emit(assign(r0331, body.constant(0u), 0x01));
+
+
+ body.instructions = f033D_parent_instructions;
+ body.emit(f033D);
+
+ /* END IF */
+
+
+ body.instructions = f033B_parent_instructions;
+ body.emit(f033B);
+
+ /* END IF */
+
+ body.emit(assign(r0332, body.constant(0u), 0x01));
+
+
+ body.instructions = f0337_parent_instructions;
+ body.emit(f0337);
+
+ /* END IF */
+
+ ir_expression *const r0345 = nequal(r032E, body.constant(0u));
+ ir_expression *const r0346 = expr(ir_unop_b2i, r0345);
+ ir_expression *const r0347 = expr(ir_unop_i2u, r0346);
+ body.emit(assign(r0330, bit_or(r0330, r0347), 0x01));
+
+
+ body.instructions = f0335_parent_instructions;
+ body.emit(f0335);
+
+ /* END IF */
+
+ body.emit(assign(r0318, r0332, 0x01));
+
+ body.emit(assign(r0319, r0331, 0x01));
+
+ body.emit(assign(r031A, r0330, 0x01));
+
+ body.emit(assign(r0317, body.constant(int(0)), 0x01));
+
+ body.emit(assign(r031D, less(r0330, body.constant(0u)), 0x01));
+
+
+ body.instructions = f032C_parent_instructions;
+ body.emit(f032C);
+
+ /* END IF */
+
+
+ body.instructions = f0321_parent_instructions;
+ body.emit(f0321);
+
+ /* END IF */
+
+
+ body.instructions = f031F_parent_instructions;
+ body.emit(f031F);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0348 = new(mem_ctx) ir_if(operand(r031B).val);
+ exec_list *const f0348_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0348->then_instructions;
+
+ /* IF CONDITION */
+ ir_if *f0349 = new(mem_ctx) ir_if(operand(r031D).val);
+ exec_list *const f0349_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0349->then_instructions;
+
+ ir_variable *const r034A = body.make_temp(glsl_type::uint_type, "assignment_tmp");
+ body.emit(assign(r034A, add(r0319, body.constant(1u)), 0x01));
+
+ ir_expression *const r034B = less(r034A, r0319);
+ ir_expression *const r034C = expr(ir_unop_b2i, r034B);
+ ir_expression *const r034D = expr(ir_unop_i2u, r034C);
+ body.emit(assign(r0318, add(r0318, r034D), 0x01));
+
+ ir_expression *const r034E = equal(r031A, body.constant(0u));
+ ir_expression *const r034F = expr(ir_unop_b2i, r034E);
+ ir_expression *const r0350 = expr(ir_unop_i2u, r034F);
+ ir_expression *const r0351 = add(r031A, r0350);
+ ir_expression *const r0352 = bit_and(r0351, body.constant(1u));
+ ir_expression *const r0353 = expr(ir_unop_bit_not, r0352);
+ body.emit(assign(r0319, bit_and(r034A, r0353), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0349->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0355 = bit_or(r0318, r0319);
+ ir_expression *const r0356 = equal(r0355, body.constant(0u));
+ ir_if *f0354 = new(mem_ctx) ir_if(operand(r0356).val);
+ exec_list *const f0354_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0354->then_instructions;
+
+ body.emit(assign(r0317, body.constant(int(0)), 0x01));
+
+
+ body.instructions = f0354_parent_instructions;
+ body.emit(f0354);
+
+ /* END IF */
+
+
+ body.instructions = f0349_parent_instructions;
+ body.emit(f0349);
+
+ /* END IF */
+
+ ir_variable *const r0357 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0357);
+ ir_expression *const r0358 = lshift(r0219, body.constant(int(31)));
+ ir_expression *const r0359 = expr(ir_unop_i2u, r0317);
+ ir_expression *const r035A = lshift(r0359, body.constant(int(20)));
+ ir_expression *const r035B = add(r0358, r035A);
+ body.emit(assign(r0357, add(r035B, r0318), 0x02));
+
+ body.emit(assign(r0357, r0319, 0x01));
+
+ body.emit(assign(r031C, r0357, 0x03));
+
+ body.emit(assign(r031B, body.constant(false), 0x01));
+
+
+ body.instructions = f0348_parent_instructions;
+ body.emit(f0348);
+
+ /* END IF */
+
+ body.emit(assign(r0217, r031C, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0315->else_instructions;
+
+ body.emit(assign(r0222, add(r0222, body.constant(int(1))), 0x01));
+
+ ir_variable *const r035C = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r035C);
+ ir_variable *const r035D = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r035D);
+ ir_variable *const r035E = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r035E);
+ body.emit(assign(r035C, lshift(r0310, body.constant(int(31))), 0x01));
+
+ ir_expression *const r035F = lshift(r030F, body.constant(int(31)));
+ ir_expression *const r0360 = rshift(r0310, body.constant(int(1)));
+ body.emit(assign(r035D, bit_or(r035F, r0360), 0x01));
+
+ body.emit(assign(r035E, rshift(r030F, body.constant(int(1))), 0x01));
+
+ ir_expression *const r0361 = nequal(r0223, body.constant(0u));
+ ir_expression *const r0362 = expr(ir_unop_b2i, r0361);
+ ir_expression *const r0363 = expr(ir_unop_i2u, r0362);
+ body.emit(assign(r035C, bit_or(r035C, r0363), 0x01));
+
+ body.emit(assign(r0224, r035E, 0x01));
+
+ body.emit(assign(r0223, r035C, 0x01));
+
+ ir_variable *const r0364 = body.make_temp(glsl_type::int_type, "zExp");
+ body.emit(assign(r0364, r0222, 0x01));
+
+ ir_variable *const r0365 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0365, r035E, 0x01));
+
+ ir_variable *const r0366 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0366, r035D, 0x01));
+
+ ir_variable *const r0367 = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r0367, r035C, 0x01));
+
+ ir_variable *const r0368 = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r0368, body.constant(true), 0x01));
+
+ ir_variable *const r0369 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r036A = new(mem_ctx) ir_variable(glsl_type::bool_type, "increment", ir_var_auto);
+ body.emit(r036A);
+ ir_expression *const r036B = expr(ir_unop_u2i, r035C);
+ body.emit(assign(r036A, less(r036B, body.constant(int(0))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r036D = lequal(body.constant(int(2045)), r0222);
+ ir_if *f036C = new(mem_ctx) ir_if(operand(r036D).val);
+ exec_list *const f036C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f036C->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r036F = less(body.constant(int(2045)), r0222);
+ ir_expression *const r0370 = equal(r0222, body.constant(int(2045)));
+ ir_expression *const r0371 = equal(body.constant(2097151u), r035E);
+ ir_expression *const r0372 = equal(body.constant(4294967295u), r035D);
+ ir_expression *const r0373 = logic_and(r0371, r0372);
+ ir_expression *const r0374 = logic_and(r0370, r0373);
+ ir_expression *const r0375 = logic_and(r0374, r036A);
+ ir_expression *const r0376 = logic_or(r036F, r0375);
+ ir_if *f036E = new(mem_ctx) ir_if(operand(r0376).val);
+ exec_list *const f036E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f036E->then_instructions;
+
+ ir_variable *const r0377 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0377);
+ ir_expression *const r0378 = lshift(r0219, body.constant(int(31)));
+ body.emit(assign(r0377, add(r0378, body.constant(2146435072u)), 0x02));
+
+ body.emit(assign(r0377, body.constant(0u), 0x01));
+
+ body.emit(assign(r0369, r0377, 0x03));
+
+ body.emit(assign(r0368, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f036E->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r037A = less(r0222, body.constant(int(0)));
+ ir_if *f0379 = new(mem_ctx) ir_if(operand(r037A).val);
+ exec_list *const f0379_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0379->then_instructions;
+
+ ir_variable *const r037B = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r037B, r035C, 0x01));
+
+ ir_variable *const r037C = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r037C, neg(r0222), 0x01));
+
+ ir_variable *const r037D = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r037D);
+ ir_variable *const r037E = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r037E);
+ ir_variable *const r037F = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r037F);
+ ir_variable *const r0380 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0381 = neg(r037C);
+ body.emit(assign(r0380, bit_and(r0381, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0383 = equal(r037C, body.constant(int(0)));
+ ir_if *f0382 = new(mem_ctx) ir_if(operand(r0383).val);
+ exec_list *const f0382_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0382->then_instructions;
+
+ body.emit(assign(r037D, r035C, 0x01));
+
+ body.emit(assign(r037E, r035D, 0x01));
+
+ body.emit(assign(r037F, r035E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0382->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0385 = less(r037C, body.constant(int(32)));
+ ir_if *f0384 = new(mem_ctx) ir_if(operand(r0385).val);
+ exec_list *const f0384_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0384->then_instructions;
+
+ body.emit(assign(r037D, lshift(r035D, r0380), 0x01));
+
+ ir_expression *const r0386 = lshift(r035E, r0380);
+ ir_expression *const r0387 = rshift(r035D, r037C);
+ body.emit(assign(r037E, bit_or(r0386, r0387), 0x01));
+
+ body.emit(assign(r037F, rshift(r035E, r037C), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0384->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0389 = equal(r037C, body.constant(int(32)));
+ ir_if *f0388 = new(mem_ctx) ir_if(operand(r0389).val);
+ exec_list *const f0388_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0388->then_instructions;
+
+ body.emit(assign(r037D, r035D, 0x01));
+
+ body.emit(assign(r037E, r035E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0388->else_instructions;
+
+ body.emit(assign(r037B, bit_or(r035C, r035D), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r038B = less(r037C, body.constant(int(64)));
+ ir_if *f038A = new(mem_ctx) ir_if(operand(r038B).val);
+ exec_list *const f038A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f038A->then_instructions;
+
+ body.emit(assign(r037D, lshift(r035E, r0380), 0x01));
+
+ ir_expression *const r038C = bit_and(r037C, body.constant(int(31)));
+ body.emit(assign(r037E, rshift(r035E, r038C), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f038A->else_instructions;
+
+ ir_variable *const r038D = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r038F = equal(r037C, body.constant(int(64)));
+ ir_if *f038E = new(mem_ctx) ir_if(operand(r038F).val);
+ exec_list *const f038E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f038E->then_instructions;
+
+ body.emit(assign(r038D, r035E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f038E->else_instructions;
+
+ ir_expression *const r0390 = nequal(r035E, body.constant(0u));
+ ir_expression *const r0391 = expr(ir_unop_b2i, r0390);
+ body.emit(assign(r038D, expr(ir_unop_i2u, r0391), 0x01));
+
+
+ body.instructions = f038E_parent_instructions;
+ body.emit(f038E);
+
+ /* END IF */
+
+ body.emit(assign(r037D, r038D, 0x01));
+
+ body.emit(assign(r037E, body.constant(0u), 0x01));
+
+
+ body.instructions = f038A_parent_instructions;
+ body.emit(f038A);
+
+ /* END IF */
+
+
+ body.instructions = f0388_parent_instructions;
+ body.emit(f0388);
+
+ /* END IF */
+
+ body.emit(assign(r037F, body.constant(0u), 0x01));
+
+
+ body.instructions = f0384_parent_instructions;
+ body.emit(f0384);
+
+ /* END IF */
+
+ ir_expression *const r0392 = nequal(r037B, body.constant(0u));
+ ir_expression *const r0393 = expr(ir_unop_b2i, r0392);
+ ir_expression *const r0394 = expr(ir_unop_i2u, r0393);
+ body.emit(assign(r037D, bit_or(r037D, r0394), 0x01));
+
+
+ body.instructions = f0382_parent_instructions;
+ body.emit(f0382);
+
+ /* END IF */
+
+ body.emit(assign(r0365, r037F, 0x01));
+
+ body.emit(assign(r0366, r037E, 0x01));
+
+ body.emit(assign(r0367, r037D, 0x01));
+
+ body.emit(assign(r0364, body.constant(int(0)), 0x01));
+
+ body.emit(assign(r036A, less(r037D, body.constant(0u)), 0x01));
+
+
+ body.instructions = f0379_parent_instructions;
+ body.emit(f0379);
+
+ /* END IF */
+
+
+ body.instructions = f036E_parent_instructions;
+ body.emit(f036E);
+
+ /* END IF */
+
+
+ body.instructions = f036C_parent_instructions;
+ body.emit(f036C);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0395 = new(mem_ctx) ir_if(operand(r0368).val);
+ exec_list *const f0395_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0395->then_instructions;
+
+ /* IF CONDITION */
+ ir_if *f0396 = new(mem_ctx) ir_if(operand(r036A).val);
+ exec_list *const f0396_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0396->then_instructions;
+
+ ir_variable *const r0397 = body.make_temp(glsl_type::uint_type, "assignment_tmp");
+ body.emit(assign(r0397, add(r0366, body.constant(1u)), 0x01));
+
+ ir_expression *const r0398 = less(r0397, r0366);
+ ir_expression *const r0399 = expr(ir_unop_b2i, r0398);
+ ir_expression *const r039A = expr(ir_unop_i2u, r0399);
+ body.emit(assign(r0365, add(r0365, r039A), 0x01));
+
+ ir_expression *const r039B = equal(r0367, body.constant(0u));
+ ir_expression *const r039C = expr(ir_unop_b2i, r039B);
+ ir_expression *const r039D = expr(ir_unop_i2u, r039C);
+ ir_expression *const r039E = add(r0367, r039D);
+ ir_expression *const r039F = bit_and(r039E, body.constant(1u));
+ ir_expression *const r03A0 = expr(ir_unop_bit_not, r039F);
+ body.emit(assign(r0366, bit_and(r0397, r03A0), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0396->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r03A2 = bit_or(r0365, r0366);
+ ir_expression *const r03A3 = equal(r03A2, body.constant(0u));
+ ir_if *f03A1 = new(mem_ctx) ir_if(operand(r03A3).val);
+ exec_list *const f03A1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03A1->then_instructions;
+
+ body.emit(assign(r0364, body.constant(int(0)), 0x01));
+
+
+ body.instructions = f03A1_parent_instructions;
+ body.emit(f03A1);
+
+ /* END IF */
+
+
+ body.instructions = f0396_parent_instructions;
+ body.emit(f0396);
+
+ /* END IF */
+
+ ir_variable *const r03A4 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r03A4);
+ ir_expression *const r03A5 = lshift(r0219, body.constant(int(31)));
+ ir_expression *const r03A6 = expr(ir_unop_i2u, r0364);
+ ir_expression *const r03A7 = lshift(r03A6, body.constant(int(20)));
+ ir_expression *const r03A8 = add(r03A5, r03A7);
+ body.emit(assign(r03A4, add(r03A8, r0365), 0x02));
+
+ body.emit(assign(r03A4, r0366, 0x01));
+
+ body.emit(assign(r0369, r03A4, 0x03));
+
+ body.emit(assign(r0368, body.constant(false), 0x01));
+
+
+ body.instructions = f0395_parent_instructions;
+ body.emit(f0395);
+
+ /* END IF */
+
+ body.emit(assign(r0217, r0369, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ body.instructions = f0315_parent_instructions;
+ body.emit(f0315);
+
+ /* END IF */
+
+
+ body.instructions = f030E_parent_instructions;
+ body.emit(f030E);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f021B->else_instructions;
+
+ ir_variable *const r03A9 = new(mem_ctx) ir_variable(glsl_type::int_type, "expDiff", ir_var_auto);
+ body.emit(r03A9);
+ ir_variable *const r03AA = new(mem_ctx) ir_variable(glsl_type::int_type, "bExp", ir_var_auto);
+ body.emit(r03AA);
+ ir_variable *const r03AB = new(mem_ctx) ir_variable(glsl_type::int_type, "aExp", ir_var_auto);
+ body.emit(r03AB);
+ ir_variable *const r03AC = new(mem_ctx) ir_variable(glsl_type::uint_type, "bFracHi", ir_var_auto);
+ body.emit(r03AC);
+ ir_variable *const r03AD = new(mem_ctx) ir_variable(glsl_type::uint_type, "bFracLo", ir_var_auto);
+ body.emit(r03AD);
+ ir_variable *const r03AE = new(mem_ctx) ir_variable(glsl_type::uint_type, "aFracHi", ir_var_auto);
+ body.emit(r03AE);
+ ir_variable *const r03AF = new(mem_ctx) ir_variable(glsl_type::uint_type, "aFracLo", ir_var_auto);
+ body.emit(r03AF);
+ ir_variable *const r03B0 = new(mem_ctx) ir_variable(glsl_type::int_type, "zExp", ir_var_auto);
+ body.emit(r03B0);
+ ir_variable *const r03B1 = body.make_temp(glsl_type::int_type, "extractFloat64Exp_retval");
+ ir_expression *const r03B2 = rshift(swizzle_y(r0214), body.constant(int(20)));
+ ir_expression *const r03B3 = bit_and(r03B2, body.constant(2047u));
+ body.emit(assign(r03B1, expr(ir_unop_u2i, r03B3), 0x01));
+
+ body.emit(assign(r03AB, r03B1, 0x01));
+
+ ir_variable *const r03B4 = body.make_temp(glsl_type::int_type, "extractFloat64Exp_retval");
+ ir_expression *const r03B5 = rshift(swizzle_y(r0215), body.constant(int(20)));
+ ir_expression *const r03B6 = bit_and(r03B5, body.constant(2047u));
+ body.emit(assign(r03B4, expr(ir_unop_u2i, r03B6), 0x01));
+
+ body.emit(assign(r03AA, r03B4, 0x01));
+
+ body.emit(assign(r03A9, sub(r03B1, r03B4), 0x01));
+
+ ir_variable *const r03B7 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r03B7, lshift(swizzle_x(r0214), body.constant(int(10))), 0x01));
+
+ ir_variable *const r03B8 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ ir_expression *const r03B9 = bit_and(swizzle_y(r0214), body.constant(1048575u));
+ ir_expression *const r03BA = lshift(r03B9, body.constant(int(10)));
+ ir_expression *const r03BB = rshift(swizzle_x(r0214), body.constant(int(22)));
+ body.emit(assign(r03B8, bit_or(r03BA, r03BB), 0x01));
+
+ body.emit(assign(r03AE, r03B8, 0x01));
+
+ body.emit(assign(r03AF, r03B7, 0x01));
+
+ ir_variable *const r03BC = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r03BC, lshift(swizzle_x(r0215), body.constant(int(10))), 0x01));
+
+ ir_variable *const r03BD = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ ir_expression *const r03BE = bit_and(swizzle_y(r0215), body.constant(1048575u));
+ ir_expression *const r03BF = lshift(r03BE, body.constant(int(10)));
+ ir_expression *const r03C0 = rshift(swizzle_x(r0215), body.constant(int(22)));
+ body.emit(assign(r03BD, bit_or(r03BF, r03C0), 0x01));
+
+ body.emit(assign(r03AC, r03BD, 0x01));
+
+ body.emit(assign(r03AD, r03BC, 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r03C2 = less(body.constant(int(0)), r03A9);
+ ir_if *f03C1 = new(mem_ctx) ir_if(operand(r03C2).val);
+ exec_list *const f03C1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03C1->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r03C4 = equal(r03B1, body.constant(int(2047)));
+ ir_if *f03C3 = new(mem_ctx) ir_if(operand(r03C4).val);
+ exec_list *const f03C3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03C3->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r03C6 = bit_or(r03B8, r03B7);
+ ir_expression *const r03C7 = nequal(r03C6, body.constant(0u));
+ ir_if *f03C5 = new(mem_ctx) ir_if(operand(r03C7).val);
+ exec_list *const f03C5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03C5->then_instructions;
+
+ ir_variable *const r03C8 = body.make_temp(glsl_type::uvec2_type, "a");
+ body.emit(assign(r03C8, swizzle_x(r0214), 0x01));
+
+ ir_variable *const r03C9 = body.make_temp(glsl_type::uvec2_type, "b");
+ body.emit(assign(r03C9, swizzle_x(r0215), 0x01));
+
+ ir_variable *const r03CA = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r03CB = body.make_temp(glsl_type::bool_type, "is_nan_retval");
+ ir_expression *const r03CC = lshift(swizzle_y(r0215), body.constant(int(1)));
+ ir_expression *const r03CD = lequal(body.constant(4292870144u), r03CC);
+ ir_expression *const r03CE = nequal(swizzle_x(r0215), body.constant(0u));
+ ir_expression *const r03CF = bit_and(swizzle_y(r0215), body.constant(1048575u));
+ ir_expression *const r03D0 = nequal(r03CF, body.constant(0u));
+ ir_expression *const r03D1 = logic_or(r03CE, r03D0);
+ body.emit(assign(r03CB, logic_and(r03CD, r03D1), 0x01));
+
+ body.emit(assign(r03C8, bit_or(swizzle_y(r0214), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r03C9, bit_or(swizzle_y(r0215), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r03D3 = lshift(swizzle_y(r0214), body.constant(int(1)));
+ ir_expression *const r03D4 = lequal(body.constant(4292870144u), r03D3);
+ ir_expression *const r03D5 = nequal(swizzle_x(r0214), body.constant(0u));
+ ir_expression *const r03D6 = bit_and(swizzle_y(r0214), body.constant(1048575u));
+ ir_expression *const r03D7 = nequal(r03D6, body.constant(0u));
+ ir_expression *const r03D8 = logic_or(r03D5, r03D7);
+ ir_expression *const r03D9 = logic_and(r03D4, r03D8);
+ ir_if *f03D2 = new(mem_ctx) ir_if(operand(r03D9).val);
+ exec_list *const f03D2_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03D2->then_instructions;
+
+ ir_variable *const r03DA = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_if *f03DB = new(mem_ctx) ir_if(operand(r03CB).val);
+ exec_list *const f03DB_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03DB->then_instructions;
+
+ body.emit(assign(r03DA, r03C9, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03DB->else_instructions;
+
+ body.emit(assign(r03DA, r03C8, 0x03));
+
+
+ body.instructions = f03DB_parent_instructions;
+ body.emit(f03DB);
+
+ /* END IF */
+
+ body.emit(assign(r03CA, r03DA, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03D2->else_instructions;
+
+ body.emit(assign(r03CA, r03C9, 0x03));
+
+
+ body.instructions = f03D2_parent_instructions;
+ body.emit(f03D2);
+
+ /* END IF */
+
+ body.emit(assign(r0217, r03CA, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03C5->else_instructions;
+
+ body.emit(assign(r0217, r0214, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ body.instructions = f03C5_parent_instructions;
+ body.emit(f03C5);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03C3->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r03DD = equal(r03B4, body.constant(int(0)));
+ ir_if *f03DC = new(mem_ctx) ir_if(operand(r03DD).val);
+ exec_list *const f03DC_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03DC->then_instructions;
+
+ body.emit(assign(r03A9, add(r03A9, body.constant(int(-1))), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03DC->else_instructions;
+
+ body.emit(assign(r03AC, bit_or(r03BD, body.constant(1073741824u)), 0x01));
+
+
+ body.instructions = f03DC_parent_instructions;
+ body.emit(f03DC);
+
+ /* END IF */
+
+ ir_variable *const r03DE = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r03DE);
+ ir_variable *const r03DF = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r03DF);
+ ir_variable *const r03E0 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r03E1 = neg(r03A9);
+ body.emit(assign(r03E0, bit_and(r03E1, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r03E3 = equal(r03A9, body.constant(int(0)));
+ ir_if *f03E2 = new(mem_ctx) ir_if(operand(r03E3).val);
+ exec_list *const f03E2_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03E2->then_instructions;
+
+ body.emit(assign(r03DE, r03BC, 0x01));
+
+ body.emit(assign(r03DF, r03AC, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03E2->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r03E5 = less(r03A9, body.constant(int(32)));
+ ir_if *f03E4 = new(mem_ctx) ir_if(operand(r03E5).val);
+ exec_list *const f03E4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03E4->then_instructions;
+
+ ir_expression *const r03E6 = lshift(r03AC, r03E0);
+ ir_expression *const r03E7 = rshift(r03BC, r03A9);
+ ir_expression *const r03E8 = bit_or(r03E6, r03E7);
+ ir_expression *const r03E9 = lshift(r03BC, r03E0);
+ ir_expression *const r03EA = nequal(r03E9, body.constant(0u));
+ ir_expression *const r03EB = expr(ir_unop_b2i, r03EA);
+ ir_expression *const r03EC = expr(ir_unop_i2u, r03EB);
+ body.emit(assign(r03DE, bit_or(r03E8, r03EC), 0x01));
+
+ body.emit(assign(r03DF, rshift(r03AC, r03A9), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03E4->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r03EE = equal(r03A9, body.constant(int(32)));
+ ir_if *f03ED = new(mem_ctx) ir_if(operand(r03EE).val);
+ exec_list *const f03ED_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03ED->then_instructions;
+
+ ir_expression *const r03EF = nequal(r03BC, body.constant(0u));
+ ir_expression *const r03F0 = expr(ir_unop_b2i, r03EF);
+ ir_expression *const r03F1 = expr(ir_unop_i2u, r03F0);
+ body.emit(assign(r03DE, bit_or(r03AC, r03F1), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03ED->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r03F3 = less(r03A9, body.constant(int(64)));
+ ir_if *f03F2 = new(mem_ctx) ir_if(operand(r03F3).val);
+ exec_list *const f03F2_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f03F2->then_instructions;
+
+ ir_expression *const r03F4 = bit_and(r03A9, body.constant(int(31)));
+ ir_expression *const r03F5 = rshift(r03AC, r03F4);
+ ir_expression *const r03F6 = lshift(r03AC, r03E0);
+ ir_expression *const r03F7 = bit_or(r03F6, r03BC);
+ ir_expression *const r03F8 = nequal(r03F7, body.constant(0u));
+ ir_expression *const r03F9 = expr(ir_unop_b2i, r03F8);
+ ir_expression *const r03FA = expr(ir_unop_i2u, r03F9);
+ body.emit(assign(r03DE, bit_or(r03F5, r03FA), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03F2->else_instructions;
+
+ ir_expression *const r03FB = bit_or(r03AC, r03BC);
+ ir_expression *const r03FC = nequal(r03FB, body.constant(0u));
+ ir_expression *const r03FD = expr(ir_unop_b2i, r03FC);
+ body.emit(assign(r03DE, expr(ir_unop_i2u, r03FD), 0x01));
+
+
+ body.instructions = f03F2_parent_instructions;
+ body.emit(f03F2);
+
+ /* END IF */
+
+
+ body.instructions = f03ED_parent_instructions;
+ body.emit(f03ED);
+
+ /* END IF */
+
+ body.emit(assign(r03DF, body.constant(0u), 0x01));
+
+
+ body.instructions = f03E4_parent_instructions;
+ body.emit(f03E4);
+
+ /* END IF */
+
+
+ body.instructions = f03E2_parent_instructions;
+ body.emit(f03E2);
+
+ /* END IF */
+
+ body.emit(assign(r03AC, r03DF, 0x01));
+
+ body.emit(assign(r03AD, r03DE, 0x01));
+
+ body.emit(assign(r03AE, bit_or(r03B8, body.constant(1073741824u)), 0x01));
+
+ ir_variable *const r03FE = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r03FF = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r03FF, sub(r03B7, r03DE), 0x01));
+
+ ir_expression *const r0400 = sub(r03AE, r03DF);
+ ir_expression *const r0401 = less(r03B7, r03DE);
+ ir_expression *const r0402 = expr(ir_unop_b2i, r0401);
+ ir_expression *const r0403 = expr(ir_unop_i2u, r0402);
+ body.emit(assign(r03FE, sub(r0400, r0403), 0x01));
+
+ body.emit(assign(r03B0, add(r03B1, body.constant(int(-1))), 0x01));
+
+ ir_variable *const r0404 = body.make_temp(glsl_type::int_type, "zExp");
+ body.emit(assign(r0404, add(r03B0, body.constant(int(-10))), 0x01));
+
+ ir_variable *const r0405 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0405, r03FE, 0x01));
+
+ ir_variable *const r0406 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0406, r03FF, 0x01));
+
+ ir_variable *const r0407 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r0407);
+ ir_variable *const r0408 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r0408);
+ /* IF CONDITION */
+ ir_expression *const r040A = equal(r03FE, body.constant(0u));
+ ir_if *f0409 = new(mem_ctx) ir_if(operand(r040A).val);
+ exec_list *const f0409_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0409->then_instructions;
+
+ body.emit(assign(r0405, r03FF, 0x01));
+
+ body.emit(assign(r0406, body.constant(0u), 0x01));
+
+ body.emit(assign(r0404, add(r0404, body.constant(int(-32))), 0x01));
+
+
+ body.instructions = f0409_parent_instructions;
+ body.emit(f0409);
+
+ /* END IF */
+
+ ir_variable *const r040B = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r040B, r0405, 0x01));
+
+ ir_variable *const r040C = body.make_temp(glsl_type::int_type, "return_value");
+ ir_variable *const r040D = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r040D);
+ /* IF CONDITION */
+ ir_expression *const r040F = equal(r0405, body.constant(0u));
+ ir_if *f040E = new(mem_ctx) ir_if(operand(r040F).val);
+ exec_list *const f040E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f040E->then_instructions;
+
+ body.emit(assign(r040C, body.constant(int(32)), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f040E->else_instructions;
+
+ body.emit(assign(r040D, body.constant(int(0)), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0411 = bit_and(r0405, body.constant(4294901760u));
+ ir_expression *const r0412 = equal(r0411, body.constant(0u));
+ ir_if *f0410 = new(mem_ctx) ir_if(operand(r0412).val);
+ exec_list *const f0410_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0410->then_instructions;
+
+ body.emit(assign(r040D, body.constant(int(16)), 0x01));
+
+ body.emit(assign(r040B, lshift(r0405, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f0410_parent_instructions;
+ body.emit(f0410);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0414 = bit_and(r040B, body.constant(4278190080u));
+ ir_expression *const r0415 = equal(r0414, body.constant(0u));
+ ir_if *f0413 = new(mem_ctx) ir_if(operand(r0415).val);
+ exec_list *const f0413_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0413->then_instructions;
+
+ body.emit(assign(r040D, add(r040D, body.constant(int(8))), 0x01));
+
+ body.emit(assign(r040B, lshift(r040B, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f0413_parent_instructions;
+ body.emit(f0413);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0417 = bit_and(r040B, body.constant(4026531840u));
+ ir_expression *const r0418 = equal(r0417, body.constant(0u));
+ ir_if *f0416 = new(mem_ctx) ir_if(operand(r0418).val);
+ exec_list *const f0416_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0416->then_instructions;
+
+ body.emit(assign(r040D, add(r040D, body.constant(int(4))), 0x01));
+
+ body.emit(assign(r040B, lshift(r040B, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f0416_parent_instructions;
+ body.emit(f0416);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r041A = bit_and(r040B, body.constant(3221225472u));
+ ir_expression *const r041B = equal(r041A, body.constant(0u));
+ ir_if *f0419 = new(mem_ctx) ir_if(operand(r041B).val);
+ exec_list *const f0419_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0419->then_instructions;
+
+ body.emit(assign(r040D, add(r040D, body.constant(int(2))), 0x01));
+
+ body.emit(assign(r040B, lshift(r040B, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f0419_parent_instructions;
+ body.emit(f0419);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r041D = bit_and(r040B, body.constant(2147483648u));
+ ir_expression *const r041E = equal(r041D, body.constant(0u));
+ ir_if *f041C = new(mem_ctx) ir_if(operand(r041E).val);
+ exec_list *const f041C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f041C->then_instructions;
+
+ body.emit(assign(r040D, add(r040D, body.constant(int(1))), 0x01));
+
+
+ body.instructions = f041C_parent_instructions;
+ body.emit(f041C);
+
+ /* END IF */
+
+ body.emit(assign(r040C, r040D, 0x01));
+
+
+ body.instructions = f040E_parent_instructions;
+ body.emit(f040E);
+
+ /* END IF */
+
+ body.emit(assign(r0408, add(r040C, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0420 = lequal(body.constant(int(0)), r0408);
+ ir_if *f041F = new(mem_ctx) ir_if(operand(r0420).val);
+ exec_list *const f041F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f041F->then_instructions;
+
+ body.emit(assign(r0407, body.constant(0u), 0x01));
+
+ ir_variable *const r0421 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0421, lshift(r0406, r0408), 0x01));
+
+ ir_variable *const r0422 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0424 = equal(r0408, body.constant(int(0)));
+ ir_if *f0423 = new(mem_ctx) ir_if(operand(r0424).val);
+ exec_list *const f0423_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0423->then_instructions;
+
+ body.emit(assign(r0422, r0405, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0423->else_instructions;
+
+ ir_expression *const r0425 = lshift(r0405, r0408);
+ ir_expression *const r0426 = neg(r0408);
+ ir_expression *const r0427 = bit_and(r0426, body.constant(int(31)));
+ ir_expression *const r0428 = rshift(r0406, r0427);
+ body.emit(assign(r0422, bit_or(r0425, r0428), 0x01));
+
+
+ body.instructions = f0423_parent_instructions;
+ body.emit(f0423);
+
+ /* END IF */
+
+ body.emit(assign(r0405, r0422, 0x01));
+
+ body.emit(assign(r0406, r0421, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f041F->else_instructions;
+
+ ir_variable *const r0429 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0429, body.constant(0u), 0x01));
+
+ ir_variable *const r042A = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r042A, neg(r0408), 0x01));
+
+ ir_variable *const r042B = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r042B);
+ ir_variable *const r042C = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r042C);
+ ir_variable *const r042D = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r042D);
+ ir_variable *const r042E = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r042F = neg(r042A);
+ body.emit(assign(r042E, bit_and(r042F, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0431 = equal(r042A, body.constant(int(0)));
+ ir_if *f0430 = new(mem_ctx) ir_if(operand(r0431).val);
+ exec_list *const f0430_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0430->then_instructions;
+
+ body.emit(assign(r042B, r0429, 0x01));
+
+ body.emit(assign(r042C, r0406, 0x01));
+
+ body.emit(assign(r042D, r0405, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0430->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0433 = less(r042A, body.constant(int(32)));
+ ir_if *f0432 = new(mem_ctx) ir_if(operand(r0433).val);
+ exec_list *const f0432_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0432->then_instructions;
+
+ body.emit(assign(r042B, lshift(r0406, r042E), 0x01));
+
+ ir_expression *const r0434 = lshift(r0405, r042E);
+ ir_expression *const r0435 = rshift(r0406, r042A);
+ body.emit(assign(r042C, bit_or(r0434, r0435), 0x01));
+
+ body.emit(assign(r042D, rshift(r0405, r042A), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0432->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0437 = equal(r042A, body.constant(int(32)));
+ ir_if *f0436 = new(mem_ctx) ir_if(operand(r0437).val);
+ exec_list *const f0436_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0436->then_instructions;
+
+ body.emit(assign(r042B, r0406, 0x01));
+
+ body.emit(assign(r042C, r0405, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0436->else_instructions;
+
+ body.emit(assign(r0429, bit_or(body.constant(0u), r0406), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0439 = less(r042A, body.constant(int(64)));
+ ir_if *f0438 = new(mem_ctx) ir_if(operand(r0439).val);
+ exec_list *const f0438_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0438->then_instructions;
+
+ body.emit(assign(r042B, lshift(r0405, r042E), 0x01));
+
+ ir_expression *const r043A = bit_and(r042A, body.constant(int(31)));
+ body.emit(assign(r042C, rshift(r0405, r043A), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0438->else_instructions;
+
+ ir_variable *const r043B = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r043D = equal(r042A, body.constant(int(64)));
+ ir_if *f043C = new(mem_ctx) ir_if(operand(r043D).val);
+ exec_list *const f043C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f043C->then_instructions;
+
+ body.emit(assign(r043B, r0405, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f043C->else_instructions;
+
+ ir_expression *const r043E = nequal(r0405, body.constant(0u));
+ ir_expression *const r043F = expr(ir_unop_b2i, r043E);
+ body.emit(assign(r043B, expr(ir_unop_i2u, r043F), 0x01));
+
+
+ body.instructions = f043C_parent_instructions;
+ body.emit(f043C);
+
+ /* END IF */
+
+ body.emit(assign(r042B, r043B, 0x01));
+
+ body.emit(assign(r042C, body.constant(0u), 0x01));
+
+
+ body.instructions = f0438_parent_instructions;
+ body.emit(f0438);
+
+ /* END IF */
+
+
+ body.instructions = f0436_parent_instructions;
+ body.emit(f0436);
+
+ /* END IF */
+
+ body.emit(assign(r042D, body.constant(0u), 0x01));
+
+
+ body.instructions = f0432_parent_instructions;
+ body.emit(f0432);
+
+ /* END IF */
+
+ ir_expression *const r0440 = nequal(r0429, body.constant(0u));
+ ir_expression *const r0441 = expr(ir_unop_b2i, r0440);
+ ir_expression *const r0442 = expr(ir_unop_i2u, r0441);
+ body.emit(assign(r042B, bit_or(r042B, r0442), 0x01));
+
+
+ body.instructions = f0430_parent_instructions;
+ body.emit(f0430);
+
+ /* END IF */
+
+ body.emit(assign(r0405, r042D, 0x01));
+
+ body.emit(assign(r0406, r042C, 0x01));
+
+ body.emit(assign(r0407, r042B, 0x01));
+
+
+ body.instructions = f041F_parent_instructions;
+ body.emit(f041F);
+
+ /* END IF */
+
+ body.emit(assign(r0404, sub(r0404, r0408), 0x01));
+
+ ir_variable *const r0443 = body.make_temp(glsl_type::int_type, "zExp");
+ body.emit(assign(r0443, r0404, 0x01));
+
+ ir_variable *const r0444 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0444, r0405, 0x01));
+
+ ir_variable *const r0445 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0445, r0406, 0x01));
+
+ ir_variable *const r0446 = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r0446, r0407, 0x01));
+
+ ir_variable *const r0447 = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r0447, body.constant(true), 0x01));
+
+ ir_variable *const r0448 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0449 = new(mem_ctx) ir_variable(glsl_type::bool_type, "increment", ir_var_auto);
+ body.emit(r0449);
+ ir_expression *const r044A = expr(ir_unop_u2i, r0407);
+ body.emit(assign(r0449, less(r044A, body.constant(int(0))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r044C = lequal(body.constant(int(2045)), r0404);
+ ir_if *f044B = new(mem_ctx) ir_if(operand(r044C).val);
+ exec_list *const f044B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f044B->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r044E = less(body.constant(int(2045)), r0404);
+ ir_expression *const r044F = equal(r0404, body.constant(int(2045)));
+ ir_expression *const r0450 = equal(body.constant(2097151u), r0405);
+ ir_expression *const r0451 = equal(body.constant(4294967295u), r0406);
+ ir_expression *const r0452 = logic_and(r0450, r0451);
+ ir_expression *const r0453 = logic_and(r044F, r0452);
+ ir_expression *const r0454 = logic_and(r0453, r0449);
+ ir_expression *const r0455 = logic_or(r044E, r0454);
+ ir_if *f044D = new(mem_ctx) ir_if(operand(r0455).val);
+ exec_list *const f044D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f044D->then_instructions;
+
+ ir_variable *const r0456 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0456);
+ ir_expression *const r0457 = lshift(r0219, body.constant(int(31)));
+ body.emit(assign(r0456, add(r0457, body.constant(2146435072u)), 0x02));
+
+ body.emit(assign(r0456, body.constant(0u), 0x01));
+
+ body.emit(assign(r0448, r0456, 0x03));
+
+ body.emit(assign(r0447, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f044D->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0459 = less(r0404, body.constant(int(0)));
+ ir_if *f0458 = new(mem_ctx) ir_if(operand(r0459).val);
+ exec_list *const f0458_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0458->then_instructions;
+
+ ir_variable *const r045A = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r045A, r0407, 0x01));
+
+ ir_variable *const r045B = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r045B, neg(r0404), 0x01));
+
+ ir_variable *const r045C = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r045C);
+ ir_variable *const r045D = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r045D);
+ ir_variable *const r045E = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r045E);
+ ir_variable *const r045F = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0460 = neg(r045B);
+ body.emit(assign(r045F, bit_and(r0460, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0462 = equal(r045B, body.constant(int(0)));
+ ir_if *f0461 = new(mem_ctx) ir_if(operand(r0462).val);
+ exec_list *const f0461_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0461->then_instructions;
+
+ body.emit(assign(r045C, r0407, 0x01));
+
+ body.emit(assign(r045D, r0406, 0x01));
+
+ body.emit(assign(r045E, r0405, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0461->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0464 = less(r045B, body.constant(int(32)));
+ ir_if *f0463 = new(mem_ctx) ir_if(operand(r0464).val);
+ exec_list *const f0463_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0463->then_instructions;
+
+ body.emit(assign(r045C, lshift(r0406, r045F), 0x01));
+
+ ir_expression *const r0465 = lshift(r0405, r045F);
+ ir_expression *const r0466 = rshift(r0406, r045B);
+ body.emit(assign(r045D, bit_or(r0465, r0466), 0x01));
+
+ body.emit(assign(r045E, rshift(r0405, r045B), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0463->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0468 = equal(r045B, body.constant(int(32)));
+ ir_if *f0467 = new(mem_ctx) ir_if(operand(r0468).val);
+ exec_list *const f0467_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0467->then_instructions;
+
+ body.emit(assign(r045C, r0406, 0x01));
+
+ body.emit(assign(r045D, r0405, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0467->else_instructions;
+
+ body.emit(assign(r045A, bit_or(r0407, r0406), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r046A = less(r045B, body.constant(int(64)));
+ ir_if *f0469 = new(mem_ctx) ir_if(operand(r046A).val);
+ exec_list *const f0469_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0469->then_instructions;
+
+ body.emit(assign(r045C, lshift(r0405, r045F), 0x01));
+
+ ir_expression *const r046B = bit_and(r045B, body.constant(int(31)));
+ body.emit(assign(r045D, rshift(r0405, r046B), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0469->else_instructions;
+
+ ir_variable *const r046C = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r046E = equal(r045B, body.constant(int(64)));
+ ir_if *f046D = new(mem_ctx) ir_if(operand(r046E).val);
+ exec_list *const f046D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f046D->then_instructions;
+
+ body.emit(assign(r046C, r0405, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f046D->else_instructions;
+
+ ir_expression *const r046F = nequal(r0405, body.constant(0u));
+ ir_expression *const r0470 = expr(ir_unop_b2i, r046F);
+ body.emit(assign(r046C, expr(ir_unop_i2u, r0470), 0x01));
+
+
+ body.instructions = f046D_parent_instructions;
+ body.emit(f046D);
+
+ /* END IF */
+
+ body.emit(assign(r045C, r046C, 0x01));
+
+ body.emit(assign(r045D, body.constant(0u), 0x01));
+
+
+ body.instructions = f0469_parent_instructions;
+ body.emit(f0469);
+
+ /* END IF */
+
+
+ body.instructions = f0467_parent_instructions;
+ body.emit(f0467);
+
+ /* END IF */
+
+ body.emit(assign(r045E, body.constant(0u), 0x01));
+
+
+ body.instructions = f0463_parent_instructions;
+ body.emit(f0463);
+
+ /* END IF */
+
+ ir_expression *const r0471 = nequal(r045A, body.constant(0u));
+ ir_expression *const r0472 = expr(ir_unop_b2i, r0471);
+ ir_expression *const r0473 = expr(ir_unop_i2u, r0472);
+ body.emit(assign(r045C, bit_or(r045C, r0473), 0x01));
+
+
+ body.instructions = f0461_parent_instructions;
+ body.emit(f0461);
+
+ /* END IF */
+
+ body.emit(assign(r0444, r045E, 0x01));
+
+ body.emit(assign(r0445, r045D, 0x01));
+
+ body.emit(assign(r0446, r045C, 0x01));
+
+ body.emit(assign(r0443, body.constant(int(0)), 0x01));
+
+ body.emit(assign(r0449, less(r045C, body.constant(0u)), 0x01));
+
+
+ body.instructions = f0458_parent_instructions;
+ body.emit(f0458);
+
+ /* END IF */
+
+
+ body.instructions = f044D_parent_instructions;
+ body.emit(f044D);
+
+ /* END IF */
+
+
+ body.instructions = f044B_parent_instructions;
+ body.emit(f044B);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0474 = new(mem_ctx) ir_if(operand(r0447).val);
+ exec_list *const f0474_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0474->then_instructions;
+
+ /* IF CONDITION */
+ ir_if *f0475 = new(mem_ctx) ir_if(operand(r0449).val);
+ exec_list *const f0475_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0475->then_instructions;
+
+ ir_variable *const r0476 = body.make_temp(glsl_type::uint_type, "assignment_tmp");
+ body.emit(assign(r0476, add(r0445, body.constant(1u)), 0x01));
+
+ ir_expression *const r0477 = less(r0476, r0445);
+ ir_expression *const r0478 = expr(ir_unop_b2i, r0477);
+ ir_expression *const r0479 = expr(ir_unop_i2u, r0478);
+ body.emit(assign(r0444, add(r0444, r0479), 0x01));
+
+ ir_expression *const r047A = equal(r0446, body.constant(0u));
+ ir_expression *const r047B = expr(ir_unop_b2i, r047A);
+ ir_expression *const r047C = expr(ir_unop_i2u, r047B);
+ ir_expression *const r047D = add(r0446, r047C);
+ ir_expression *const r047E = bit_and(r047D, body.constant(1u));
+ ir_expression *const r047F = expr(ir_unop_bit_not, r047E);
+ body.emit(assign(r0445, bit_and(r0476, r047F), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0475->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0481 = bit_or(r0444, r0445);
+ ir_expression *const r0482 = equal(r0481, body.constant(0u));
+ ir_if *f0480 = new(mem_ctx) ir_if(operand(r0482).val);
+ exec_list *const f0480_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0480->then_instructions;
+
+ body.emit(assign(r0443, body.constant(int(0)), 0x01));
+
+
+ body.instructions = f0480_parent_instructions;
+ body.emit(f0480);
+
+ /* END IF */
+
+
+ body.instructions = f0475_parent_instructions;
+ body.emit(f0475);
+
+ /* END IF */
+
+ ir_variable *const r0483 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0483);
+ ir_expression *const r0484 = lshift(r0219, body.constant(int(31)));
+ ir_expression *const r0485 = expr(ir_unop_i2u, r0443);
+ ir_expression *const r0486 = lshift(r0485, body.constant(int(20)));
+ ir_expression *const r0487 = add(r0484, r0486);
+ body.emit(assign(r0483, add(r0487, r0444), 0x02));
+
+ body.emit(assign(r0483, r0445, 0x01));
+
+ body.emit(assign(r0448, r0483, 0x03));
+
+ body.emit(assign(r0447, body.constant(false), 0x01));
+
+
+ body.instructions = f0474_parent_instructions;
+ body.emit(f0474);
+
+ /* END IF */
+
+ body.emit(assign(r0217, r0448, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ body.instructions = f03C3_parent_instructions;
+ body.emit(f03C3);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f03C1->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0489 = less(r03A9, body.constant(int(0)));
+ ir_if *f0488 = new(mem_ctx) ir_if(operand(r0489).val);
+ exec_list *const f0488_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0488->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r048B = equal(r03B4, body.constant(int(2047)));
+ ir_if *f048A = new(mem_ctx) ir_if(operand(r048B).val);
+ exec_list *const f048A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f048A->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r048D = bit_or(r03AC, r03AD);
+ ir_expression *const r048E = nequal(r048D, body.constant(0u));
+ ir_if *f048C = new(mem_ctx) ir_if(operand(r048E).val);
+ exec_list *const f048C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f048C->then_instructions;
+
+ ir_variable *const r048F = body.make_temp(glsl_type::uvec2_type, "a");
+ body.emit(assign(r048F, swizzle_x(r0214), 0x01));
+
+ ir_variable *const r0490 = body.make_temp(glsl_type::uvec2_type, "b");
+ body.emit(assign(r0490, swizzle_x(r0215), 0x01));
+
+ ir_variable *const r0491 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0492 = body.make_temp(glsl_type::bool_type, "is_nan_retval");
+ ir_expression *const r0493 = lshift(swizzle_y(r0215), body.constant(int(1)));
+ ir_expression *const r0494 = lequal(body.constant(4292870144u), r0493);
+ ir_expression *const r0495 = nequal(swizzle_x(r0215), body.constant(0u));
+ ir_expression *const r0496 = bit_and(swizzle_y(r0215), body.constant(1048575u));
+ ir_expression *const r0497 = nequal(r0496, body.constant(0u));
+ ir_expression *const r0498 = logic_or(r0495, r0497);
+ body.emit(assign(r0492, logic_and(r0494, r0498), 0x01));
+
+ body.emit(assign(r048F, bit_or(swizzle_y(r0214), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r0490, bit_or(swizzle_y(r0215), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r049A = lshift(swizzle_y(r0214), body.constant(int(1)));
+ ir_expression *const r049B = lequal(body.constant(4292870144u), r049A);
+ ir_expression *const r049C = nequal(swizzle_x(r0214), body.constant(0u));
+ ir_expression *const r049D = bit_and(swizzle_y(r0214), body.constant(1048575u));
+ ir_expression *const r049E = nequal(r049D, body.constant(0u));
+ ir_expression *const r049F = logic_or(r049C, r049E);
+ ir_expression *const r04A0 = logic_and(r049B, r049F);
+ ir_if *f0499 = new(mem_ctx) ir_if(operand(r04A0).val);
+ exec_list *const f0499_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0499->then_instructions;
+
+ ir_variable *const r04A1 = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_if *f04A2 = new(mem_ctx) ir_if(operand(r0492).val);
+ exec_list *const f04A2_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04A2->then_instructions;
+
+ body.emit(assign(r04A1, r0490, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04A2->else_instructions;
+
+ body.emit(assign(r04A1, r048F, 0x03));
+
+
+ body.instructions = f04A2_parent_instructions;
+ body.emit(f04A2);
+
+ /* END IF */
+
+ body.emit(assign(r0491, r04A1, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0499->else_instructions;
+
+ body.emit(assign(r0491, r0490, 0x03));
+
+
+ body.instructions = f0499_parent_instructions;
+ body.emit(f0499);
+
+ /* END IF */
+
+ body.emit(assign(r0217, r0491, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f048C->else_instructions;
+
+ ir_variable *const r04A3 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r04A3);
+ ir_expression *const r04A4 = bit_xor(r0219, body.constant(1u));
+ ir_expression *const r04A5 = lshift(r04A4, body.constant(int(31)));
+ body.emit(assign(r04A3, add(r04A5, body.constant(2146435072u)), 0x02));
+
+ body.emit(assign(r04A3, body.constant(0u), 0x01));
+
+ body.emit(assign(r0217, r04A3, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ body.instructions = f048C_parent_instructions;
+ body.emit(f048C);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f048A->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r04A7 = equal(r03B1, body.constant(int(0)));
+ ir_if *f04A6 = new(mem_ctx) ir_if(operand(r04A7).val);
+ exec_list *const f04A6_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04A6->then_instructions;
+
+ body.emit(assign(r03A9, add(r03A9, body.constant(int(1))), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04A6->else_instructions;
+
+ body.emit(assign(r03AE, bit_or(r03AE, body.constant(1073741824u)), 0x01));
+
+
+ body.instructions = f04A6_parent_instructions;
+ body.emit(f04A6);
+
+ /* END IF */
+
+ ir_variable *const r04A8 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r04A8, neg(r03A9), 0x01));
+
+ ir_variable *const r04A9 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r04A9);
+ ir_variable *const r04AA = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r04AA);
+ ir_variable *const r04AB = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r04AC = neg(r04A8);
+ body.emit(assign(r04AB, bit_and(r04AC, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r04AE = equal(r04A8, body.constant(int(0)));
+ ir_if *f04AD = new(mem_ctx) ir_if(operand(r04AE).val);
+ exec_list *const f04AD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04AD->then_instructions;
+
+ body.emit(assign(r04A9, r03B7, 0x01));
+
+ body.emit(assign(r04AA, r03AE, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04AD->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r04B0 = less(r04A8, body.constant(int(32)));
+ ir_if *f04AF = new(mem_ctx) ir_if(operand(r04B0).val);
+ exec_list *const f04AF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04AF->then_instructions;
+
+ ir_expression *const r04B1 = lshift(r03AE, r04AB);
+ ir_expression *const r04B2 = rshift(r03B7, r04A8);
+ ir_expression *const r04B3 = bit_or(r04B1, r04B2);
+ ir_expression *const r04B4 = lshift(r03B7, r04AB);
+ ir_expression *const r04B5 = nequal(r04B4, body.constant(0u));
+ ir_expression *const r04B6 = expr(ir_unop_b2i, r04B5);
+ ir_expression *const r04B7 = expr(ir_unop_i2u, r04B6);
+ body.emit(assign(r04A9, bit_or(r04B3, r04B7), 0x01));
+
+ body.emit(assign(r04AA, rshift(r03AE, r04A8), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04AF->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r04B9 = equal(r04A8, body.constant(int(32)));
+ ir_if *f04B8 = new(mem_ctx) ir_if(operand(r04B9).val);
+ exec_list *const f04B8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04B8->then_instructions;
+
+ ir_expression *const r04BA = nequal(r03B7, body.constant(0u));
+ ir_expression *const r04BB = expr(ir_unop_b2i, r04BA);
+ ir_expression *const r04BC = expr(ir_unop_i2u, r04BB);
+ body.emit(assign(r04A9, bit_or(r03AE, r04BC), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04B8->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r04BE = less(r04A8, body.constant(int(64)));
+ ir_if *f04BD = new(mem_ctx) ir_if(operand(r04BE).val);
+ exec_list *const f04BD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04BD->then_instructions;
+
+ ir_expression *const r04BF = bit_and(r04A8, body.constant(int(31)));
+ ir_expression *const r04C0 = rshift(r03AE, r04BF);
+ ir_expression *const r04C1 = lshift(r03AE, r04AB);
+ ir_expression *const r04C2 = bit_or(r04C1, r03B7);
+ ir_expression *const r04C3 = nequal(r04C2, body.constant(0u));
+ ir_expression *const r04C4 = expr(ir_unop_b2i, r04C3);
+ ir_expression *const r04C5 = expr(ir_unop_i2u, r04C4);
+ body.emit(assign(r04A9, bit_or(r04C0, r04C5), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04BD->else_instructions;
+
+ ir_expression *const r04C6 = bit_or(r03AE, r03B7);
+ ir_expression *const r04C7 = nequal(r04C6, body.constant(0u));
+ ir_expression *const r04C8 = expr(ir_unop_b2i, r04C7);
+ body.emit(assign(r04A9, expr(ir_unop_i2u, r04C8), 0x01));
+
+
+ body.instructions = f04BD_parent_instructions;
+ body.emit(f04BD);
+
+ /* END IF */
+
+
+ body.instructions = f04B8_parent_instructions;
+ body.emit(f04B8);
+
+ /* END IF */
+
+ body.emit(assign(r04AA, body.constant(0u), 0x01));
+
+
+ body.instructions = f04AF_parent_instructions;
+ body.emit(f04AF);
+
+ /* END IF */
+
+
+ body.instructions = f04AD_parent_instructions;
+ body.emit(f04AD);
+
+ /* END IF */
+
+ body.emit(assign(r03AE, r04AA, 0x01));
+
+ body.emit(assign(r03AF, r04A9, 0x01));
+
+ body.emit(assign(r03AC, bit_or(r03AC, body.constant(1073741824u)), 0x01));
+
+ ir_variable *const r04C9 = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r04CA = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r04CA, sub(r03AD, r04A9), 0x01));
+
+ ir_expression *const r04CB = sub(r03AC, r04AA);
+ ir_expression *const r04CC = less(r03AD, r04A9);
+ ir_expression *const r04CD = expr(ir_unop_b2i, r04CC);
+ ir_expression *const r04CE = expr(ir_unop_i2u, r04CD);
+ body.emit(assign(r04C9, sub(r04CB, r04CE), 0x01));
+
+ body.emit(assign(r0218, bit_xor(r0219, body.constant(1u)), 0x01));
+
+ body.emit(assign(r03B0, add(r03B4, body.constant(int(-1))), 0x01));
+
+ ir_variable *const r04CF = body.make_temp(glsl_type::int_type, "zExp");
+ body.emit(assign(r04CF, add(r03B0, body.constant(int(-10))), 0x01));
+
+ ir_variable *const r04D0 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r04D0, r04C9, 0x01));
+
+ ir_variable *const r04D1 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r04D1, r04CA, 0x01));
+
+ ir_variable *const r04D2 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r04D2);
+ ir_variable *const r04D3 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r04D3);
+ /* IF CONDITION */
+ ir_expression *const r04D5 = equal(r04C9, body.constant(0u));
+ ir_if *f04D4 = new(mem_ctx) ir_if(operand(r04D5).val);
+ exec_list *const f04D4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04D4->then_instructions;
+
+ body.emit(assign(r04D0, r04CA, 0x01));
+
+ body.emit(assign(r04D1, body.constant(0u), 0x01));
+
+ body.emit(assign(r04CF, add(r04CF, body.constant(int(-32))), 0x01));
+
+
+ body.instructions = f04D4_parent_instructions;
+ body.emit(f04D4);
+
+ /* END IF */
+
+ ir_variable *const r04D6 = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r04D6, r04D0, 0x01));
+
+ ir_variable *const r04D7 = body.make_temp(glsl_type::int_type, "return_value");
+ ir_variable *const r04D8 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r04D8);
+ /* IF CONDITION */
+ ir_expression *const r04DA = equal(r04D0, body.constant(0u));
+ ir_if *f04D9 = new(mem_ctx) ir_if(operand(r04DA).val);
+ exec_list *const f04D9_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04D9->then_instructions;
+
+ body.emit(assign(r04D7, body.constant(int(32)), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04D9->else_instructions;
+
+ body.emit(assign(r04D8, body.constant(int(0)), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r04DC = bit_and(r04D0, body.constant(4294901760u));
+ ir_expression *const r04DD = equal(r04DC, body.constant(0u));
+ ir_if *f04DB = new(mem_ctx) ir_if(operand(r04DD).val);
+ exec_list *const f04DB_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04DB->then_instructions;
+
+ body.emit(assign(r04D8, body.constant(int(16)), 0x01));
+
+ body.emit(assign(r04D6, lshift(r04D0, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f04DB_parent_instructions;
+ body.emit(f04DB);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r04DF = bit_and(r04D6, body.constant(4278190080u));
+ ir_expression *const r04E0 = equal(r04DF, body.constant(0u));
+ ir_if *f04DE = new(mem_ctx) ir_if(operand(r04E0).val);
+ exec_list *const f04DE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04DE->then_instructions;
+
+ body.emit(assign(r04D8, add(r04D8, body.constant(int(8))), 0x01));
+
+ body.emit(assign(r04D6, lshift(r04D6, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f04DE_parent_instructions;
+ body.emit(f04DE);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r04E2 = bit_and(r04D6, body.constant(4026531840u));
+ ir_expression *const r04E3 = equal(r04E2, body.constant(0u));
+ ir_if *f04E1 = new(mem_ctx) ir_if(operand(r04E3).val);
+ exec_list *const f04E1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04E1->then_instructions;
+
+ body.emit(assign(r04D8, add(r04D8, body.constant(int(4))), 0x01));
+
+ body.emit(assign(r04D6, lshift(r04D6, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f04E1_parent_instructions;
+ body.emit(f04E1);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r04E5 = bit_and(r04D6, body.constant(3221225472u));
+ ir_expression *const r04E6 = equal(r04E5, body.constant(0u));
+ ir_if *f04E4 = new(mem_ctx) ir_if(operand(r04E6).val);
+ exec_list *const f04E4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04E4->then_instructions;
+
+ body.emit(assign(r04D8, add(r04D8, body.constant(int(2))), 0x01));
+
+ body.emit(assign(r04D6, lshift(r04D6, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f04E4_parent_instructions;
+ body.emit(f04E4);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r04E8 = bit_and(r04D6, body.constant(2147483648u));
+ ir_expression *const r04E9 = equal(r04E8, body.constant(0u));
+ ir_if *f04E7 = new(mem_ctx) ir_if(operand(r04E9).val);
+ exec_list *const f04E7_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04E7->then_instructions;
+
+ body.emit(assign(r04D8, add(r04D8, body.constant(int(1))), 0x01));
+
+
+ body.instructions = f04E7_parent_instructions;
+ body.emit(f04E7);
+
+ /* END IF */
+
+ body.emit(assign(r04D7, r04D8, 0x01));
+
+
+ body.instructions = f04D9_parent_instructions;
+ body.emit(f04D9);
+
+ /* END IF */
+
+ body.emit(assign(r04D3, add(r04D7, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r04EB = lequal(body.constant(int(0)), r04D3);
+ ir_if *f04EA = new(mem_ctx) ir_if(operand(r04EB).val);
+ exec_list *const f04EA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04EA->then_instructions;
+
+ body.emit(assign(r04D2, body.constant(0u), 0x01));
+
+ ir_variable *const r04EC = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r04EC, lshift(r04D1, r04D3), 0x01));
+
+ ir_variable *const r04ED = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r04EF = equal(r04D3, body.constant(int(0)));
+ ir_if *f04EE = new(mem_ctx) ir_if(operand(r04EF).val);
+ exec_list *const f04EE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04EE->then_instructions;
+
+ body.emit(assign(r04ED, r04D0, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04EE->else_instructions;
+
+ ir_expression *const r04F0 = lshift(r04D0, r04D3);
+ ir_expression *const r04F1 = neg(r04D3);
+ ir_expression *const r04F2 = bit_and(r04F1, body.constant(int(31)));
+ ir_expression *const r04F3 = rshift(r04D1, r04F2);
+ body.emit(assign(r04ED, bit_or(r04F0, r04F3), 0x01));
+
+
+ body.instructions = f04EE_parent_instructions;
+ body.emit(f04EE);
+
+ /* END IF */
+
+ body.emit(assign(r04D0, r04ED, 0x01));
+
+ body.emit(assign(r04D1, r04EC, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04EA->else_instructions;
+
+ ir_variable *const r04F4 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r04F4, body.constant(0u), 0x01));
+
+ ir_variable *const r04F5 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r04F5, neg(r04D3), 0x01));
+
+ ir_variable *const r04F6 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r04F6);
+ ir_variable *const r04F7 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r04F7);
+ ir_variable *const r04F8 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r04F8);
+ ir_variable *const r04F9 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r04FA = neg(r04F5);
+ body.emit(assign(r04F9, bit_and(r04FA, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r04FC = equal(r04F5, body.constant(int(0)));
+ ir_if *f04FB = new(mem_ctx) ir_if(operand(r04FC).val);
+ exec_list *const f04FB_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04FB->then_instructions;
+
+ body.emit(assign(r04F6, r04F4, 0x01));
+
+ body.emit(assign(r04F7, r04D1, 0x01));
+
+ body.emit(assign(r04F8, r04D0, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04FB->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r04FE = less(r04F5, body.constant(int(32)));
+ ir_if *f04FD = new(mem_ctx) ir_if(operand(r04FE).val);
+ exec_list *const f04FD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f04FD->then_instructions;
+
+ body.emit(assign(r04F6, lshift(r04D1, r04F9), 0x01));
+
+ ir_expression *const r04FF = lshift(r04D0, r04F9);
+ ir_expression *const r0500 = rshift(r04D1, r04F5);
+ body.emit(assign(r04F7, bit_or(r04FF, r0500), 0x01));
+
+ body.emit(assign(r04F8, rshift(r04D0, r04F5), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f04FD->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0502 = equal(r04F5, body.constant(int(32)));
+ ir_if *f0501 = new(mem_ctx) ir_if(operand(r0502).val);
+ exec_list *const f0501_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0501->then_instructions;
+
+ body.emit(assign(r04F6, r04D1, 0x01));
+
+ body.emit(assign(r04F7, r04D0, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0501->else_instructions;
+
+ body.emit(assign(r04F4, bit_or(body.constant(0u), r04D1), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0504 = less(r04F5, body.constant(int(64)));
+ ir_if *f0503 = new(mem_ctx) ir_if(operand(r0504).val);
+ exec_list *const f0503_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0503->then_instructions;
+
+ body.emit(assign(r04F6, lshift(r04D0, r04F9), 0x01));
+
+ ir_expression *const r0505 = bit_and(r04F5, body.constant(int(31)));
+ body.emit(assign(r04F7, rshift(r04D0, r0505), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0503->else_instructions;
+
+ ir_variable *const r0506 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0508 = equal(r04F5, body.constant(int(64)));
+ ir_if *f0507 = new(mem_ctx) ir_if(operand(r0508).val);
+ exec_list *const f0507_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0507->then_instructions;
+
+ body.emit(assign(r0506, r04D0, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0507->else_instructions;
+
+ ir_expression *const r0509 = nequal(r04D0, body.constant(0u));
+ ir_expression *const r050A = expr(ir_unop_b2i, r0509);
+ body.emit(assign(r0506, expr(ir_unop_i2u, r050A), 0x01));
+
+
+ body.instructions = f0507_parent_instructions;
+ body.emit(f0507);
+
+ /* END IF */
+
+ body.emit(assign(r04F6, r0506, 0x01));
+
+ body.emit(assign(r04F7, body.constant(0u), 0x01));
+
+
+ body.instructions = f0503_parent_instructions;
+ body.emit(f0503);
+
+ /* END IF */
+
+
+ body.instructions = f0501_parent_instructions;
+ body.emit(f0501);
+
+ /* END IF */
+
+ body.emit(assign(r04F8, body.constant(0u), 0x01));
+
+
+ body.instructions = f04FD_parent_instructions;
+ body.emit(f04FD);
+
+ /* END IF */
+
+ ir_expression *const r050B = nequal(r04F4, body.constant(0u));
+ ir_expression *const r050C = expr(ir_unop_b2i, r050B);
+ ir_expression *const r050D = expr(ir_unop_i2u, r050C);
+ body.emit(assign(r04F6, bit_or(r04F6, r050D), 0x01));
+
+
+ body.instructions = f04FB_parent_instructions;
+ body.emit(f04FB);
+
+ /* END IF */
+
+ body.emit(assign(r04D0, r04F8, 0x01));
+
+ body.emit(assign(r04D1, r04F7, 0x01));
+
+ body.emit(assign(r04D2, r04F6, 0x01));
+
+
+ body.instructions = f04EA_parent_instructions;
+ body.emit(f04EA);
+
+ /* END IF */
+
+ body.emit(assign(r04CF, sub(r04CF, r04D3), 0x01));
+
+ ir_variable *const r050E = body.make_temp(glsl_type::int_type, "zExp");
+ body.emit(assign(r050E, r04CF, 0x01));
+
+ ir_variable *const r050F = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r050F, r04D0, 0x01));
+
+ ir_variable *const r0510 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0510, r04D1, 0x01));
+
+ ir_variable *const r0511 = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r0511, r04D2, 0x01));
+
+ ir_variable *const r0512 = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r0512, body.constant(true), 0x01));
+
+ ir_variable *const r0513 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0514 = new(mem_ctx) ir_variable(glsl_type::bool_type, "increment", ir_var_auto);
+ body.emit(r0514);
+ ir_expression *const r0515 = expr(ir_unop_u2i, r04D2);
+ body.emit(assign(r0514, less(r0515, body.constant(int(0))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0517 = lequal(body.constant(int(2045)), r04CF);
+ ir_if *f0516 = new(mem_ctx) ir_if(operand(r0517).val);
+ exec_list *const f0516_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0516->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0519 = less(body.constant(int(2045)), r04CF);
+ ir_expression *const r051A = equal(r04CF, body.constant(int(2045)));
+ ir_expression *const r051B = equal(body.constant(2097151u), r04D0);
+ ir_expression *const r051C = equal(body.constant(4294967295u), r04D1);
+ ir_expression *const r051D = logic_and(r051B, r051C);
+ ir_expression *const r051E = logic_and(r051A, r051D);
+ ir_expression *const r051F = logic_and(r051E, r0514);
+ ir_expression *const r0520 = logic_or(r0519, r051F);
+ ir_if *f0518 = new(mem_ctx) ir_if(operand(r0520).val);
+ exec_list *const f0518_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0518->then_instructions;
+
+ ir_variable *const r0521 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0521);
+ ir_expression *const r0522 = lshift(r0218, body.constant(int(31)));
+ body.emit(assign(r0521, add(r0522, body.constant(2146435072u)), 0x02));
+
+ body.emit(assign(r0521, body.constant(0u), 0x01));
+
+ body.emit(assign(r0513, r0521, 0x03));
+
+ body.emit(assign(r0512, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0518->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0524 = less(r04CF, body.constant(int(0)));
+ ir_if *f0523 = new(mem_ctx) ir_if(operand(r0524).val);
+ exec_list *const f0523_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0523->then_instructions;
+
+ ir_variable *const r0525 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0525, r04D2, 0x01));
+
+ ir_variable *const r0526 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r0526, neg(r04CF), 0x01));
+
+ ir_variable *const r0527 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0527);
+ ir_variable *const r0528 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0528);
+ ir_variable *const r0529 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0529);
+ ir_variable *const r052A = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r052B = neg(r0526);
+ body.emit(assign(r052A, bit_and(r052B, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r052D = equal(r0526, body.constant(int(0)));
+ ir_if *f052C = new(mem_ctx) ir_if(operand(r052D).val);
+ exec_list *const f052C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f052C->then_instructions;
+
+ body.emit(assign(r0527, r04D2, 0x01));
+
+ body.emit(assign(r0528, r04D1, 0x01));
+
+ body.emit(assign(r0529, r04D0, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f052C->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r052F = less(r0526, body.constant(int(32)));
+ ir_if *f052E = new(mem_ctx) ir_if(operand(r052F).val);
+ exec_list *const f052E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f052E->then_instructions;
+
+ body.emit(assign(r0527, lshift(r04D1, r052A), 0x01));
+
+ ir_expression *const r0530 = lshift(r04D0, r052A);
+ ir_expression *const r0531 = rshift(r04D1, r0526);
+ body.emit(assign(r0528, bit_or(r0530, r0531), 0x01));
+
+ body.emit(assign(r0529, rshift(r04D0, r0526), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f052E->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0533 = equal(r0526, body.constant(int(32)));
+ ir_if *f0532 = new(mem_ctx) ir_if(operand(r0533).val);
+ exec_list *const f0532_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0532->then_instructions;
+
+ body.emit(assign(r0527, r04D1, 0x01));
+
+ body.emit(assign(r0528, r04D0, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0532->else_instructions;
+
+ body.emit(assign(r0525, bit_or(r04D2, r04D1), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0535 = less(r0526, body.constant(int(64)));
+ ir_if *f0534 = new(mem_ctx) ir_if(operand(r0535).val);
+ exec_list *const f0534_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0534->then_instructions;
+
+ body.emit(assign(r0527, lshift(r04D0, r052A), 0x01));
+
+ ir_expression *const r0536 = bit_and(r0526, body.constant(int(31)));
+ body.emit(assign(r0528, rshift(r04D0, r0536), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0534->else_instructions;
+
+ ir_variable *const r0537 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0539 = equal(r0526, body.constant(int(64)));
+ ir_if *f0538 = new(mem_ctx) ir_if(operand(r0539).val);
+ exec_list *const f0538_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0538->then_instructions;
+
+ body.emit(assign(r0537, r04D0, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0538->else_instructions;
+
+ ir_expression *const r053A = nequal(r04D0, body.constant(0u));
+ ir_expression *const r053B = expr(ir_unop_b2i, r053A);
+ body.emit(assign(r0537, expr(ir_unop_i2u, r053B), 0x01));
+
+
+ body.instructions = f0538_parent_instructions;
+ body.emit(f0538);
+
+ /* END IF */
+
+ body.emit(assign(r0527, r0537, 0x01));
+
+ body.emit(assign(r0528, body.constant(0u), 0x01));
+
+
+ body.instructions = f0534_parent_instructions;
+ body.emit(f0534);
+
+ /* END IF */
+
+
+ body.instructions = f0532_parent_instructions;
+ body.emit(f0532);
+
+ /* END IF */
+
+ body.emit(assign(r0529, body.constant(0u), 0x01));
+
+
+ body.instructions = f052E_parent_instructions;
+ body.emit(f052E);
+
+ /* END IF */
+
+ ir_expression *const r053C = nequal(r0525, body.constant(0u));
+ ir_expression *const r053D = expr(ir_unop_b2i, r053C);
+ ir_expression *const r053E = expr(ir_unop_i2u, r053D);
+ body.emit(assign(r0527, bit_or(r0527, r053E), 0x01));
+
+
+ body.instructions = f052C_parent_instructions;
+ body.emit(f052C);
+
+ /* END IF */
+
+ body.emit(assign(r050F, r0529, 0x01));
+
+ body.emit(assign(r0510, r0528, 0x01));
+
+ body.emit(assign(r0511, r0527, 0x01));
+
+ body.emit(assign(r050E, body.constant(int(0)), 0x01));
+
+ body.emit(assign(r0514, less(r0527, body.constant(0u)), 0x01));
+
+
+ body.instructions = f0523_parent_instructions;
+ body.emit(f0523);
+
+ /* END IF */
+
+
+ body.instructions = f0518_parent_instructions;
+ body.emit(f0518);
+
+ /* END IF */
+
+
+ body.instructions = f0516_parent_instructions;
+ body.emit(f0516);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f053F = new(mem_ctx) ir_if(operand(r0512).val);
+ exec_list *const f053F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f053F->then_instructions;
+
+ /* IF CONDITION */
+ ir_if *f0540 = new(mem_ctx) ir_if(operand(r0514).val);
+ exec_list *const f0540_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0540->then_instructions;
+
+ ir_variable *const r0541 = body.make_temp(glsl_type::uint_type, "assignment_tmp");
+ body.emit(assign(r0541, add(r0510, body.constant(1u)), 0x01));
+
+ ir_expression *const r0542 = less(r0541, r0510);
+ ir_expression *const r0543 = expr(ir_unop_b2i, r0542);
+ ir_expression *const r0544 = expr(ir_unop_i2u, r0543);
+ body.emit(assign(r050F, add(r050F, r0544), 0x01));
+
+ ir_expression *const r0545 = equal(r0511, body.constant(0u));
+ ir_expression *const r0546 = expr(ir_unop_b2i, r0545);
+ ir_expression *const r0547 = expr(ir_unop_i2u, r0546);
+ ir_expression *const r0548 = add(r0511, r0547);
+ ir_expression *const r0549 = bit_and(r0548, body.constant(1u));
+ ir_expression *const r054A = expr(ir_unop_bit_not, r0549);
+ body.emit(assign(r0510, bit_and(r0541, r054A), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0540->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r054C = bit_or(r050F, r0510);
+ ir_expression *const r054D = equal(r054C, body.constant(0u));
+ ir_if *f054B = new(mem_ctx) ir_if(operand(r054D).val);
+ exec_list *const f054B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f054B->then_instructions;
+
+ body.emit(assign(r050E, body.constant(int(0)), 0x01));
+
+
+ body.instructions = f054B_parent_instructions;
+ body.emit(f054B);
+
+ /* END IF */
+
+
+ body.instructions = f0540_parent_instructions;
+ body.emit(f0540);
+
+ /* END IF */
+
+ ir_variable *const r054E = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r054E);
+ ir_expression *const r054F = lshift(r0218, body.constant(int(31)));
+ ir_expression *const r0550 = expr(ir_unop_i2u, r050E);
+ ir_expression *const r0551 = lshift(r0550, body.constant(int(20)));
+ ir_expression *const r0552 = add(r054F, r0551);
+ body.emit(assign(r054E, add(r0552, r050F), 0x02));
+
+ body.emit(assign(r054E, r0510, 0x01));
+
+ body.emit(assign(r0513, r054E, 0x03));
+
+ body.emit(assign(r0512, body.constant(false), 0x01));
+
+
+ body.instructions = f053F_parent_instructions;
+ body.emit(f053F);
+
+ /* END IF */
+
+ body.emit(assign(r0217, r0513, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ body.instructions = f048A_parent_instructions;
+ body.emit(f048A);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0488->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0554 = equal(r03B1, body.constant(int(2047)));
+ ir_if *f0553 = new(mem_ctx) ir_if(operand(r0554).val);
+ exec_list *const f0553_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0553->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0556 = bit_or(r03AE, r03AF);
+ ir_expression *const r0557 = bit_or(r03AC, r03AD);
+ ir_expression *const r0558 = bit_or(r0556, r0557);
+ ir_expression *const r0559 = nequal(r0558, body.constant(0u));
+ ir_if *f0555 = new(mem_ctx) ir_if(operand(r0559).val);
+ exec_list *const f0555_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0555->then_instructions;
+
+ ir_variable *const r055A = body.make_temp(glsl_type::uvec2_type, "a");
+ body.emit(assign(r055A, swizzle_x(r0214), 0x01));
+
+ ir_variable *const r055B = body.make_temp(glsl_type::uvec2_type, "b");
+ body.emit(assign(r055B, swizzle_x(r0215), 0x01));
+
+ ir_variable *const r055C = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r055D = body.make_temp(glsl_type::bool_type, "is_nan_retval");
+ ir_expression *const r055E = lshift(swizzle_y(r0215), body.constant(int(1)));
+ ir_expression *const r055F = lequal(body.constant(4292870144u), r055E);
+ ir_expression *const r0560 = nequal(swizzle_x(r0215), body.constant(0u));
+ ir_expression *const r0561 = bit_and(swizzle_y(r0215), body.constant(1048575u));
+ ir_expression *const r0562 = nequal(r0561, body.constant(0u));
+ ir_expression *const r0563 = logic_or(r0560, r0562);
+ body.emit(assign(r055D, logic_and(r055F, r0563), 0x01));
+
+ body.emit(assign(r055A, bit_or(swizzle_y(r0214), body.constant(524288u)), 0x02));
+
+ body.emit(assign(r055B, bit_or(swizzle_y(r0215), body.constant(524288u)), 0x02));
+
+ /* IF CONDITION */
+ ir_expression *const r0565 = lshift(swizzle_y(r0214), body.constant(int(1)));
+ ir_expression *const r0566 = lequal(body.constant(4292870144u), r0565);
+ ir_expression *const r0567 = nequal(swizzle_x(r0214), body.constant(0u));
+ ir_expression *const r0568 = bit_and(swizzle_y(r0214), body.constant(1048575u));
+ ir_expression *const r0569 = nequal(r0568, body.constant(0u));
+ ir_expression *const r056A = logic_or(r0567, r0569);
+ ir_expression *const r056B = logic_and(r0566, r056A);
+ ir_if *f0564 = new(mem_ctx) ir_if(operand(r056B).val);
+ exec_list *const f0564_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0564->then_instructions;
+
+ ir_variable *const r056C = body.make_temp(glsl_type::uvec2_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_if *f056D = new(mem_ctx) ir_if(operand(r055D).val);
+ exec_list *const f056D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f056D->then_instructions;
+
+ body.emit(assign(r056C, r055B, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f056D->else_instructions;
+
+ body.emit(assign(r056C, r055A, 0x03));
+
+
+ body.instructions = f056D_parent_instructions;
+ body.emit(f056D);
+
+ /* END IF */
+
+ body.emit(assign(r055C, r056C, 0x03));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0564->else_instructions;
+
+ body.emit(assign(r055C, r055B, 0x03));
+
+
+ body.instructions = f0564_parent_instructions;
+ body.emit(f0564);
+
+ /* END IF */
+
+ body.emit(assign(r0217, r055C, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0555->else_instructions;
+
+ ir_constant_data r056E_data;
+ memset(&r056E_data, 0, sizeof(ir_constant_data));
+ r056E_data.u[0] = 4294967295;
+ r056E_data.u[1] = 4294967295;
+ ir_constant *const r056E = new(mem_ctx) ir_constant(glsl_type::uvec2_type, &r056E_data);
+ body.emit(assign(r0217, r056E, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ body.instructions = f0555_parent_instructions;
+ body.emit(f0555);
+
+ /* END IF */
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0553->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0570 = equal(r03B1, body.constant(int(0)));
+ ir_if *f056F = new(mem_ctx) ir_if(operand(r0570).val);
+ exec_list *const f056F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f056F->then_instructions;
+
+ body.emit(assign(r03AB, body.constant(int(1)), 0x01));
+
+ body.emit(assign(r03AA, body.constant(int(1)), 0x01));
+
+
+ body.instructions = f056F_parent_instructions;
+ body.emit(f056F);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0572 = less(r03AC, r03AE);
+ ir_if *f0571 = new(mem_ctx) ir_if(operand(r0572).val);
+ exec_list *const f0571_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0571->then_instructions;
+
+ ir_variable *const r0573 = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r0574 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0574, sub(r03AF, r03AD), 0x01));
+
+ ir_expression *const r0575 = sub(r03AE, r03AC);
+ ir_expression *const r0576 = less(r03AF, r03AD);
+ ir_expression *const r0577 = expr(ir_unop_b2i, r0576);
+ ir_expression *const r0578 = expr(ir_unop_i2u, r0577);
+ body.emit(assign(r0573, sub(r0575, r0578), 0x01));
+
+ body.emit(assign(r03B0, add(r03AB, body.constant(int(-1))), 0x01));
+
+ ir_variable *const r0579 = body.make_temp(glsl_type::int_type, "zExp");
+ body.emit(assign(r0579, add(r03B0, body.constant(int(-10))), 0x01));
+
+ ir_variable *const r057A = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r057A, r0573, 0x01));
+
+ ir_variable *const r057B = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r057B, r0574, 0x01));
+
+ ir_variable *const r057C = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r057C);
+ ir_variable *const r057D = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r057D);
+ /* IF CONDITION */
+ ir_expression *const r057F = equal(r0573, body.constant(0u));
+ ir_if *f057E = new(mem_ctx) ir_if(operand(r057F).val);
+ exec_list *const f057E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f057E->then_instructions;
+
+ body.emit(assign(r057A, r0574, 0x01));
+
+ body.emit(assign(r057B, body.constant(0u), 0x01));
+
+ body.emit(assign(r0579, add(r0579, body.constant(int(-32))), 0x01));
+
+
+ body.instructions = f057E_parent_instructions;
+ body.emit(f057E);
+
+ /* END IF */
+
+ ir_variable *const r0580 = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r0580, r057A, 0x01));
+
+ ir_variable *const r0581 = body.make_temp(glsl_type::int_type, "return_value");
+ ir_variable *const r0582 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r0582);
+ /* IF CONDITION */
+ ir_expression *const r0584 = equal(r057A, body.constant(0u));
+ ir_if *f0583 = new(mem_ctx) ir_if(operand(r0584).val);
+ exec_list *const f0583_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0583->then_instructions;
+
+ body.emit(assign(r0581, body.constant(int(32)), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0583->else_instructions;
+
+ body.emit(assign(r0582, body.constant(int(0)), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0586 = bit_and(r057A, body.constant(4294901760u));
+ ir_expression *const r0587 = equal(r0586, body.constant(0u));
+ ir_if *f0585 = new(mem_ctx) ir_if(operand(r0587).val);
+ exec_list *const f0585_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0585->then_instructions;
+
+ body.emit(assign(r0582, body.constant(int(16)), 0x01));
+
+ body.emit(assign(r0580, lshift(r057A, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f0585_parent_instructions;
+ body.emit(f0585);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0589 = bit_and(r0580, body.constant(4278190080u));
+ ir_expression *const r058A = equal(r0589, body.constant(0u));
+ ir_if *f0588 = new(mem_ctx) ir_if(operand(r058A).val);
+ exec_list *const f0588_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0588->then_instructions;
+
+ body.emit(assign(r0582, add(r0582, body.constant(int(8))), 0x01));
+
+ body.emit(assign(r0580, lshift(r0580, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f0588_parent_instructions;
+ body.emit(f0588);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r058C = bit_and(r0580, body.constant(4026531840u));
+ ir_expression *const r058D = equal(r058C, body.constant(0u));
+ ir_if *f058B = new(mem_ctx) ir_if(operand(r058D).val);
+ exec_list *const f058B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f058B->then_instructions;
+
+ body.emit(assign(r0582, add(r0582, body.constant(int(4))), 0x01));
+
+ body.emit(assign(r0580, lshift(r0580, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f058B_parent_instructions;
+ body.emit(f058B);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r058F = bit_and(r0580, body.constant(3221225472u));
+ ir_expression *const r0590 = equal(r058F, body.constant(0u));
+ ir_if *f058E = new(mem_ctx) ir_if(operand(r0590).val);
+ exec_list *const f058E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f058E->then_instructions;
+
+ body.emit(assign(r0582, add(r0582, body.constant(int(2))), 0x01));
+
+ body.emit(assign(r0580, lshift(r0580, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f058E_parent_instructions;
+ body.emit(f058E);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0592 = bit_and(r0580, body.constant(2147483648u));
+ ir_expression *const r0593 = equal(r0592, body.constant(0u));
+ ir_if *f0591 = new(mem_ctx) ir_if(operand(r0593).val);
+ exec_list *const f0591_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0591->then_instructions;
+
+ body.emit(assign(r0582, add(r0582, body.constant(int(1))), 0x01));
+
+
+ body.instructions = f0591_parent_instructions;
+ body.emit(f0591);
+
+ /* END IF */
+
+ body.emit(assign(r0581, r0582, 0x01));
+
+
+ body.instructions = f0583_parent_instructions;
+ body.emit(f0583);
+
+ /* END IF */
+
+ body.emit(assign(r057D, add(r0581, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0595 = lequal(body.constant(int(0)), r057D);
+ ir_if *f0594 = new(mem_ctx) ir_if(operand(r0595).val);
+ exec_list *const f0594_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0594->then_instructions;
+
+ body.emit(assign(r057C, body.constant(0u), 0x01));
+
+ ir_variable *const r0596 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0596, lshift(r057B, r057D), 0x01));
+
+ ir_variable *const r0597 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0599 = equal(r057D, body.constant(int(0)));
+ ir_if *f0598 = new(mem_ctx) ir_if(operand(r0599).val);
+ exec_list *const f0598_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0598->then_instructions;
+
+ body.emit(assign(r0597, r057A, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0598->else_instructions;
+
+ ir_expression *const r059A = lshift(r057A, r057D);
+ ir_expression *const r059B = neg(r057D);
+ ir_expression *const r059C = bit_and(r059B, body.constant(int(31)));
+ ir_expression *const r059D = rshift(r057B, r059C);
+ body.emit(assign(r0597, bit_or(r059A, r059D), 0x01));
+
+
+ body.instructions = f0598_parent_instructions;
+ body.emit(f0598);
+
+ /* END IF */
+
+ body.emit(assign(r057A, r0597, 0x01));
+
+ body.emit(assign(r057B, r0596, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0594->else_instructions;
+
+ ir_variable *const r059E = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r059E, body.constant(0u), 0x01));
+
+ ir_variable *const r059F = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r059F, neg(r057D), 0x01));
+
+ ir_variable *const r05A0 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r05A0);
+ ir_variable *const r05A1 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r05A1);
+ ir_variable *const r05A2 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r05A2);
+ ir_variable *const r05A3 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r05A4 = neg(r059F);
+ body.emit(assign(r05A3, bit_and(r05A4, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r05A6 = equal(r059F, body.constant(int(0)));
+ ir_if *f05A5 = new(mem_ctx) ir_if(operand(r05A6).val);
+ exec_list *const f05A5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05A5->then_instructions;
+
+ body.emit(assign(r05A0, r059E, 0x01));
+
+ body.emit(assign(r05A1, r057B, 0x01));
+
+ body.emit(assign(r05A2, r057A, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05A5->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r05A8 = less(r059F, body.constant(int(32)));
+ ir_if *f05A7 = new(mem_ctx) ir_if(operand(r05A8).val);
+ exec_list *const f05A7_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05A7->then_instructions;
+
+ body.emit(assign(r05A0, lshift(r057B, r05A3), 0x01));
+
+ ir_expression *const r05A9 = lshift(r057A, r05A3);
+ ir_expression *const r05AA = rshift(r057B, r059F);
+ body.emit(assign(r05A1, bit_or(r05A9, r05AA), 0x01));
+
+ body.emit(assign(r05A2, rshift(r057A, r059F), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05A7->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r05AC = equal(r059F, body.constant(int(32)));
+ ir_if *f05AB = new(mem_ctx) ir_if(operand(r05AC).val);
+ exec_list *const f05AB_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05AB->then_instructions;
+
+ body.emit(assign(r05A0, r057B, 0x01));
+
+ body.emit(assign(r05A1, r057A, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05AB->else_instructions;
+
+ body.emit(assign(r059E, bit_or(body.constant(0u), r057B), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r05AE = less(r059F, body.constant(int(64)));
+ ir_if *f05AD = new(mem_ctx) ir_if(operand(r05AE).val);
+ exec_list *const f05AD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05AD->then_instructions;
+
+ body.emit(assign(r05A0, lshift(r057A, r05A3), 0x01));
+
+ ir_expression *const r05AF = bit_and(r059F, body.constant(int(31)));
+ body.emit(assign(r05A1, rshift(r057A, r05AF), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05AD->else_instructions;
+
+ ir_variable *const r05B0 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r05B2 = equal(r059F, body.constant(int(64)));
+ ir_if *f05B1 = new(mem_ctx) ir_if(operand(r05B2).val);
+ exec_list *const f05B1_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05B1->then_instructions;
+
+ body.emit(assign(r05B0, r057A, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05B1->else_instructions;
+
+ ir_expression *const r05B3 = nequal(r057A, body.constant(0u));
+ ir_expression *const r05B4 = expr(ir_unop_b2i, r05B3);
+ body.emit(assign(r05B0, expr(ir_unop_i2u, r05B4), 0x01));
+
+
+ body.instructions = f05B1_parent_instructions;
+ body.emit(f05B1);
+
+ /* END IF */
+
+ body.emit(assign(r05A0, r05B0, 0x01));
+
+ body.emit(assign(r05A1, body.constant(0u), 0x01));
+
+
+ body.instructions = f05AD_parent_instructions;
+ body.emit(f05AD);
+
+ /* END IF */
+
+
+ body.instructions = f05AB_parent_instructions;
+ body.emit(f05AB);
+
+ /* END IF */
+
+ body.emit(assign(r05A2, body.constant(0u), 0x01));
+
+
+ body.instructions = f05A7_parent_instructions;
+ body.emit(f05A7);
+
+ /* END IF */
+
+ ir_expression *const r05B5 = nequal(r059E, body.constant(0u));
+ ir_expression *const r05B6 = expr(ir_unop_b2i, r05B5);
+ ir_expression *const r05B7 = expr(ir_unop_i2u, r05B6);
+ body.emit(assign(r05A0, bit_or(r05A0, r05B7), 0x01));
+
+
+ body.instructions = f05A5_parent_instructions;
+ body.emit(f05A5);
+
+ /* END IF */
+
+ body.emit(assign(r057A, r05A2, 0x01));
+
+ body.emit(assign(r057B, r05A1, 0x01));
+
+ body.emit(assign(r057C, r05A0, 0x01));
+
+
+ body.instructions = f0594_parent_instructions;
+ body.emit(f0594);
+
+ /* END IF */
+
+ body.emit(assign(r0579, sub(r0579, r057D), 0x01));
+
+ ir_variable *const r05B8 = body.make_temp(glsl_type::int_type, "zExp");
+ body.emit(assign(r05B8, r0579, 0x01));
+
+ ir_variable *const r05B9 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r05B9, r057A, 0x01));
+
+ ir_variable *const r05BA = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r05BA, r057B, 0x01));
+
+ ir_variable *const r05BB = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r05BB, r057C, 0x01));
+
+ ir_variable *const r05BC = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r05BC, body.constant(true), 0x01));
+
+ ir_variable *const r05BD = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r05BE = new(mem_ctx) ir_variable(glsl_type::bool_type, "increment", ir_var_auto);
+ body.emit(r05BE);
+ ir_expression *const r05BF = expr(ir_unop_u2i, r057C);
+ body.emit(assign(r05BE, less(r05BF, body.constant(int(0))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r05C1 = lequal(body.constant(int(2045)), r0579);
+ ir_if *f05C0 = new(mem_ctx) ir_if(operand(r05C1).val);
+ exec_list *const f05C0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05C0->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r05C3 = less(body.constant(int(2045)), r0579);
+ ir_expression *const r05C4 = equal(r0579, body.constant(int(2045)));
+ ir_expression *const r05C5 = equal(body.constant(2097151u), r057A);
+ ir_expression *const r05C6 = equal(body.constant(4294967295u), r057B);
+ ir_expression *const r05C7 = logic_and(r05C5, r05C6);
+ ir_expression *const r05C8 = logic_and(r05C4, r05C7);
+ ir_expression *const r05C9 = logic_and(r05C8, r05BE);
+ ir_expression *const r05CA = logic_or(r05C3, r05C9);
+ ir_if *f05C2 = new(mem_ctx) ir_if(operand(r05CA).val);
+ exec_list *const f05C2_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05C2->then_instructions;
+
+ ir_variable *const r05CB = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r05CB);
+ ir_expression *const r05CC = lshift(r0218, body.constant(int(31)));
+ body.emit(assign(r05CB, add(r05CC, body.constant(2146435072u)), 0x02));
+
+ body.emit(assign(r05CB, body.constant(0u), 0x01));
+
+ body.emit(assign(r05BD, r05CB, 0x03));
+
+ body.emit(assign(r05BC, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05C2->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r05CE = less(r0579, body.constant(int(0)));
+ ir_if *f05CD = new(mem_ctx) ir_if(operand(r05CE).val);
+ exec_list *const f05CD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05CD->then_instructions;
+
+ ir_variable *const r05CF = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r05CF, r057C, 0x01));
+
+ ir_variable *const r05D0 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r05D0, neg(r0579), 0x01));
+
+ ir_variable *const r05D1 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r05D1);
+ ir_variable *const r05D2 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r05D2);
+ ir_variable *const r05D3 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r05D3);
+ ir_variable *const r05D4 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r05D5 = neg(r05D0);
+ body.emit(assign(r05D4, bit_and(r05D5, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r05D7 = equal(r05D0, body.constant(int(0)));
+ ir_if *f05D6 = new(mem_ctx) ir_if(operand(r05D7).val);
+ exec_list *const f05D6_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05D6->then_instructions;
+
+ body.emit(assign(r05D1, r057C, 0x01));
+
+ body.emit(assign(r05D2, r057B, 0x01));
+
+ body.emit(assign(r05D3, r057A, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05D6->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r05D9 = less(r05D0, body.constant(int(32)));
+ ir_if *f05D8 = new(mem_ctx) ir_if(operand(r05D9).val);
+ exec_list *const f05D8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05D8->then_instructions;
+
+ body.emit(assign(r05D1, lshift(r057B, r05D4), 0x01));
+
+ ir_expression *const r05DA = lshift(r057A, r05D4);
+ ir_expression *const r05DB = rshift(r057B, r05D0);
+ body.emit(assign(r05D2, bit_or(r05DA, r05DB), 0x01));
+
+ body.emit(assign(r05D3, rshift(r057A, r05D0), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05D8->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r05DD = equal(r05D0, body.constant(int(32)));
+ ir_if *f05DC = new(mem_ctx) ir_if(operand(r05DD).val);
+ exec_list *const f05DC_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05DC->then_instructions;
+
+ body.emit(assign(r05D1, r057B, 0x01));
+
+ body.emit(assign(r05D2, r057A, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05DC->else_instructions;
+
+ body.emit(assign(r05CF, bit_or(r057C, r057B), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r05DF = less(r05D0, body.constant(int(64)));
+ ir_if *f05DE = new(mem_ctx) ir_if(operand(r05DF).val);
+ exec_list *const f05DE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05DE->then_instructions;
+
+ body.emit(assign(r05D1, lshift(r057A, r05D4), 0x01));
+
+ ir_expression *const r05E0 = bit_and(r05D0, body.constant(int(31)));
+ body.emit(assign(r05D2, rshift(r057A, r05E0), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05DE->else_instructions;
+
+ ir_variable *const r05E1 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r05E3 = equal(r05D0, body.constant(int(64)));
+ ir_if *f05E2 = new(mem_ctx) ir_if(operand(r05E3).val);
+ exec_list *const f05E2_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05E2->then_instructions;
+
+ body.emit(assign(r05E1, r057A, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05E2->else_instructions;
+
+ ir_expression *const r05E4 = nequal(r057A, body.constant(0u));
+ ir_expression *const r05E5 = expr(ir_unop_b2i, r05E4);
+ body.emit(assign(r05E1, expr(ir_unop_i2u, r05E5), 0x01));
+
+
+ body.instructions = f05E2_parent_instructions;
+ body.emit(f05E2);
+
+ /* END IF */
+
+ body.emit(assign(r05D1, r05E1, 0x01));
+
+ body.emit(assign(r05D2, body.constant(0u), 0x01));
+
+
+ body.instructions = f05DE_parent_instructions;
+ body.emit(f05DE);
+
+ /* END IF */
+
+
+ body.instructions = f05DC_parent_instructions;
+ body.emit(f05DC);
+
+ /* END IF */
+
+ body.emit(assign(r05D3, body.constant(0u), 0x01));
+
+
+ body.instructions = f05D8_parent_instructions;
+ body.emit(f05D8);
+
+ /* END IF */
+
+ ir_expression *const r05E6 = nequal(r05CF, body.constant(0u));
+ ir_expression *const r05E7 = expr(ir_unop_b2i, r05E6);
+ ir_expression *const r05E8 = expr(ir_unop_i2u, r05E7);
+ body.emit(assign(r05D1, bit_or(r05D1, r05E8), 0x01));
+
+
+ body.instructions = f05D6_parent_instructions;
+ body.emit(f05D6);
+
+ /* END IF */
+
+ body.emit(assign(r05B9, r05D3, 0x01));
+
+ body.emit(assign(r05BA, r05D2, 0x01));
+
+ body.emit(assign(r05BB, r05D1, 0x01));
+
+ body.emit(assign(r05B8, body.constant(int(0)), 0x01));
+
+ body.emit(assign(r05BE, less(r05D1, body.constant(0u)), 0x01));
+
+
+ body.instructions = f05CD_parent_instructions;
+ body.emit(f05CD);
+
+ /* END IF */
+
+
+ body.instructions = f05C2_parent_instructions;
+ body.emit(f05C2);
+
+ /* END IF */
+
+
+ body.instructions = f05C0_parent_instructions;
+ body.emit(f05C0);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f05E9 = new(mem_ctx) ir_if(operand(r05BC).val);
+ exec_list *const f05E9_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05E9->then_instructions;
+
+ /* IF CONDITION */
+ ir_if *f05EA = new(mem_ctx) ir_if(operand(r05BE).val);
+ exec_list *const f05EA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05EA->then_instructions;
+
+ ir_variable *const r05EB = body.make_temp(glsl_type::uint_type, "assignment_tmp");
+ body.emit(assign(r05EB, add(r05BA, body.constant(1u)), 0x01));
+
+ ir_expression *const r05EC = less(r05EB, r05BA);
+ ir_expression *const r05ED = expr(ir_unop_b2i, r05EC);
+ ir_expression *const r05EE = expr(ir_unop_i2u, r05ED);
+ body.emit(assign(r05B9, add(r05B9, r05EE), 0x01));
+
+ ir_expression *const r05EF = equal(r05BB, body.constant(0u));
+ ir_expression *const r05F0 = expr(ir_unop_b2i, r05EF);
+ ir_expression *const r05F1 = expr(ir_unop_i2u, r05F0);
+ ir_expression *const r05F2 = add(r05BB, r05F1);
+ ir_expression *const r05F3 = bit_and(r05F2, body.constant(1u));
+ ir_expression *const r05F4 = expr(ir_unop_bit_not, r05F3);
+ body.emit(assign(r05BA, bit_and(r05EB, r05F4), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05EA->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r05F6 = bit_or(r05B9, r05BA);
+ ir_expression *const r05F7 = equal(r05F6, body.constant(0u));
+ ir_if *f05F5 = new(mem_ctx) ir_if(operand(r05F7).val);
+ exec_list *const f05F5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05F5->then_instructions;
+
+ body.emit(assign(r05B8, body.constant(int(0)), 0x01));
+
+
+ body.instructions = f05F5_parent_instructions;
+ body.emit(f05F5);
+
+ /* END IF */
+
+
+ body.instructions = f05EA_parent_instructions;
+ body.emit(f05EA);
+
+ /* END IF */
+
+ ir_variable *const r05F8 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r05F8);
+ ir_expression *const r05F9 = lshift(r0218, body.constant(int(31)));
+ ir_expression *const r05FA = expr(ir_unop_i2u, r05B8);
+ ir_expression *const r05FB = lshift(r05FA, body.constant(int(20)));
+ ir_expression *const r05FC = add(r05F9, r05FB);
+ body.emit(assign(r05F8, add(r05FC, r05B9), 0x02));
+
+ body.emit(assign(r05F8, r05BA, 0x01));
+
+ body.emit(assign(r05BD, r05F8, 0x03));
+
+ body.emit(assign(r05BC, body.constant(false), 0x01));
+
+
+ body.instructions = f05E9_parent_instructions;
+ body.emit(f05E9);
+
+ /* END IF */
+
+ body.emit(assign(r0217, r05BD, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0571->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r05FE = less(r03AE, r03AC);
+ ir_if *f05FD = new(mem_ctx) ir_if(operand(r05FE).val);
+ exec_list *const f05FD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f05FD->then_instructions;
+
+ ir_variable *const r05FF = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r0600 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0600, sub(r03AD, r03AF), 0x01));
+
+ ir_expression *const r0601 = sub(r03AC, r03AE);
+ ir_expression *const r0602 = less(r03AD, r03AF);
+ ir_expression *const r0603 = expr(ir_unop_b2i, r0602);
+ ir_expression *const r0604 = expr(ir_unop_i2u, r0603);
+ body.emit(assign(r05FF, sub(r0601, r0604), 0x01));
+
+ body.emit(assign(r0218, bit_xor(r0218, body.constant(1u)), 0x01));
+
+ body.emit(assign(r03B0, add(r03AA, body.constant(int(-1))), 0x01));
+
+ ir_variable *const r0605 = body.make_temp(glsl_type::int_type, "zExp");
+ body.emit(assign(r0605, add(r03B0, body.constant(int(-10))), 0x01));
+
+ ir_variable *const r0606 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0606, r05FF, 0x01));
+
+ ir_variable *const r0607 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0607, r0600, 0x01));
+
+ ir_variable *const r0608 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r0608);
+ ir_variable *const r0609 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r0609);
+ /* IF CONDITION */
+ ir_expression *const r060B = equal(r05FF, body.constant(0u));
+ ir_if *f060A = new(mem_ctx) ir_if(operand(r060B).val);
+ exec_list *const f060A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f060A->then_instructions;
+
+ body.emit(assign(r0606, r0600, 0x01));
+
+ body.emit(assign(r0607, body.constant(0u), 0x01));
+
+ body.emit(assign(r0605, add(r0605, body.constant(int(-32))), 0x01));
+
+
+ body.instructions = f060A_parent_instructions;
+ body.emit(f060A);
+
+ /* END IF */
+
+ ir_variable *const r060C = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r060C, r0606, 0x01));
+
+ ir_variable *const r060D = body.make_temp(glsl_type::int_type, "return_value");
+ ir_variable *const r060E = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r060E);
+ /* IF CONDITION */
+ ir_expression *const r0610 = equal(r0606, body.constant(0u));
+ ir_if *f060F = new(mem_ctx) ir_if(operand(r0610).val);
+ exec_list *const f060F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f060F->then_instructions;
+
+ body.emit(assign(r060D, body.constant(int(32)), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f060F->else_instructions;
+
+ body.emit(assign(r060E, body.constant(int(0)), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0612 = bit_and(r0606, body.constant(4294901760u));
+ ir_expression *const r0613 = equal(r0612, body.constant(0u));
+ ir_if *f0611 = new(mem_ctx) ir_if(operand(r0613).val);
+ exec_list *const f0611_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0611->then_instructions;
+
+ body.emit(assign(r060E, body.constant(int(16)), 0x01));
+
+ body.emit(assign(r060C, lshift(r0606, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f0611_parent_instructions;
+ body.emit(f0611);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0615 = bit_and(r060C, body.constant(4278190080u));
+ ir_expression *const r0616 = equal(r0615, body.constant(0u));
+ ir_if *f0614 = new(mem_ctx) ir_if(operand(r0616).val);
+ exec_list *const f0614_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0614->then_instructions;
+
+ body.emit(assign(r060E, add(r060E, body.constant(int(8))), 0x01));
+
+ body.emit(assign(r060C, lshift(r060C, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f0614_parent_instructions;
+ body.emit(f0614);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0618 = bit_and(r060C, body.constant(4026531840u));
+ ir_expression *const r0619 = equal(r0618, body.constant(0u));
+ ir_if *f0617 = new(mem_ctx) ir_if(operand(r0619).val);
+ exec_list *const f0617_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0617->then_instructions;
+
+ body.emit(assign(r060E, add(r060E, body.constant(int(4))), 0x01));
+
+ body.emit(assign(r060C, lshift(r060C, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f0617_parent_instructions;
+ body.emit(f0617);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r061B = bit_and(r060C, body.constant(3221225472u));
+ ir_expression *const r061C = equal(r061B, body.constant(0u));
+ ir_if *f061A = new(mem_ctx) ir_if(operand(r061C).val);
+ exec_list *const f061A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f061A->then_instructions;
+
+ body.emit(assign(r060E, add(r060E, body.constant(int(2))), 0x01));
+
+ body.emit(assign(r060C, lshift(r060C, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f061A_parent_instructions;
+ body.emit(f061A);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r061E = bit_and(r060C, body.constant(2147483648u));
+ ir_expression *const r061F = equal(r061E, body.constant(0u));
+ ir_if *f061D = new(mem_ctx) ir_if(operand(r061F).val);
+ exec_list *const f061D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f061D->then_instructions;
+
+ body.emit(assign(r060E, add(r060E, body.constant(int(1))), 0x01));
+
+
+ body.instructions = f061D_parent_instructions;
+ body.emit(f061D);
+
+ /* END IF */
+
+ body.emit(assign(r060D, r060E, 0x01));
+
+
+ body.instructions = f060F_parent_instructions;
+ body.emit(f060F);
+
+ /* END IF */
+
+ body.emit(assign(r0609, add(r060D, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0621 = lequal(body.constant(int(0)), r0609);
+ ir_if *f0620 = new(mem_ctx) ir_if(operand(r0621).val);
+ exec_list *const f0620_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0620->then_instructions;
+
+ body.emit(assign(r0608, body.constant(0u), 0x01));
+
+ ir_variable *const r0622 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0622, lshift(r0607, r0609), 0x01));
+
+ ir_variable *const r0623 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0625 = equal(r0609, body.constant(int(0)));
+ ir_if *f0624 = new(mem_ctx) ir_if(operand(r0625).val);
+ exec_list *const f0624_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0624->then_instructions;
+
+ body.emit(assign(r0623, r0606, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0624->else_instructions;
+
+ ir_expression *const r0626 = lshift(r0606, r0609);
+ ir_expression *const r0627 = neg(r0609);
+ ir_expression *const r0628 = bit_and(r0627, body.constant(int(31)));
+ ir_expression *const r0629 = rshift(r0607, r0628);
+ body.emit(assign(r0623, bit_or(r0626, r0629), 0x01));
+
+
+ body.instructions = f0624_parent_instructions;
+ body.emit(f0624);
+
+ /* END IF */
+
+ body.emit(assign(r0606, r0623, 0x01));
+
+ body.emit(assign(r0607, r0622, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0620->else_instructions;
+
+ ir_variable *const r062A = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r062A, body.constant(0u), 0x01));
+
+ ir_variable *const r062B = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r062B, neg(r0609), 0x01));
+
+ ir_variable *const r062C = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r062C);
+ ir_variable *const r062D = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r062D);
+ ir_variable *const r062E = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r062E);
+ ir_variable *const r062F = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0630 = neg(r062B);
+ body.emit(assign(r062F, bit_and(r0630, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0632 = equal(r062B, body.constant(int(0)));
+ ir_if *f0631 = new(mem_ctx) ir_if(operand(r0632).val);
+ exec_list *const f0631_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0631->then_instructions;
+
+ body.emit(assign(r062C, r062A, 0x01));
+
+ body.emit(assign(r062D, r0607, 0x01));
+
+ body.emit(assign(r062E, r0606, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0631->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0634 = less(r062B, body.constant(int(32)));
+ ir_if *f0633 = new(mem_ctx) ir_if(operand(r0634).val);
+ exec_list *const f0633_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0633->then_instructions;
+
+ body.emit(assign(r062C, lshift(r0607, r062F), 0x01));
+
+ ir_expression *const r0635 = lshift(r0606, r062F);
+ ir_expression *const r0636 = rshift(r0607, r062B);
+ body.emit(assign(r062D, bit_or(r0635, r0636), 0x01));
+
+ body.emit(assign(r062E, rshift(r0606, r062B), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0633->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0638 = equal(r062B, body.constant(int(32)));
+ ir_if *f0637 = new(mem_ctx) ir_if(operand(r0638).val);
+ exec_list *const f0637_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0637->then_instructions;
+
+ body.emit(assign(r062C, r0607, 0x01));
+
+ body.emit(assign(r062D, r0606, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0637->else_instructions;
+
+ body.emit(assign(r062A, bit_or(body.constant(0u), r0607), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r063A = less(r062B, body.constant(int(64)));
+ ir_if *f0639 = new(mem_ctx) ir_if(operand(r063A).val);
+ exec_list *const f0639_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0639->then_instructions;
+
+ body.emit(assign(r062C, lshift(r0606, r062F), 0x01));
+
+ ir_expression *const r063B = bit_and(r062B, body.constant(int(31)));
+ body.emit(assign(r062D, rshift(r0606, r063B), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0639->else_instructions;
+
+ ir_variable *const r063C = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r063E = equal(r062B, body.constant(int(64)));
+ ir_if *f063D = new(mem_ctx) ir_if(operand(r063E).val);
+ exec_list *const f063D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f063D->then_instructions;
+
+ body.emit(assign(r063C, r0606, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f063D->else_instructions;
+
+ ir_expression *const r063F = nequal(r0606, body.constant(0u));
+ ir_expression *const r0640 = expr(ir_unop_b2i, r063F);
+ body.emit(assign(r063C, expr(ir_unop_i2u, r0640), 0x01));
+
+
+ body.instructions = f063D_parent_instructions;
+ body.emit(f063D);
+
+ /* END IF */
+
+ body.emit(assign(r062C, r063C, 0x01));
+
+ body.emit(assign(r062D, body.constant(0u), 0x01));
+
+
+ body.instructions = f0639_parent_instructions;
+ body.emit(f0639);
+
+ /* END IF */
+
+
+ body.instructions = f0637_parent_instructions;
+ body.emit(f0637);
+
+ /* END IF */
+
+ body.emit(assign(r062E, body.constant(0u), 0x01));
+
+
+ body.instructions = f0633_parent_instructions;
+ body.emit(f0633);
+
+ /* END IF */
+
+ ir_expression *const r0641 = nequal(r062A, body.constant(0u));
+ ir_expression *const r0642 = expr(ir_unop_b2i, r0641);
+ ir_expression *const r0643 = expr(ir_unop_i2u, r0642);
+ body.emit(assign(r062C, bit_or(r062C, r0643), 0x01));
+
+
+ body.instructions = f0631_parent_instructions;
+ body.emit(f0631);
+
+ /* END IF */
+
+ body.emit(assign(r0606, r062E, 0x01));
+
+ body.emit(assign(r0607, r062D, 0x01));
+
+ body.emit(assign(r0608, r062C, 0x01));
+
+
+ body.instructions = f0620_parent_instructions;
+ body.emit(f0620);
+
+ /* END IF */
+
+ body.emit(assign(r0605, sub(r0605, r0609), 0x01));
+
+ ir_variable *const r0644 = body.make_temp(glsl_type::int_type, "zExp");
+ body.emit(assign(r0644, r0605, 0x01));
+
+ ir_variable *const r0645 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0645, r0606, 0x01));
+
+ ir_variable *const r0646 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0646, r0607, 0x01));
+
+ ir_variable *const r0647 = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r0647, r0608, 0x01));
+
+ ir_variable *const r0648 = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r0648, body.constant(true), 0x01));
+
+ ir_variable *const r0649 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r064A = new(mem_ctx) ir_variable(glsl_type::bool_type, "increment", ir_var_auto);
+ body.emit(r064A);
+ ir_expression *const r064B = expr(ir_unop_u2i, r0608);
+ body.emit(assign(r064A, less(r064B, body.constant(int(0))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r064D = lequal(body.constant(int(2045)), r0605);
+ ir_if *f064C = new(mem_ctx) ir_if(operand(r064D).val);
+ exec_list *const f064C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f064C->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r064F = less(body.constant(int(2045)), r0605);
+ ir_expression *const r0650 = equal(r0605, body.constant(int(2045)));
+ ir_expression *const r0651 = equal(body.constant(2097151u), r0606);
+ ir_expression *const r0652 = equal(body.constant(4294967295u), r0607);
+ ir_expression *const r0653 = logic_and(r0651, r0652);
+ ir_expression *const r0654 = logic_and(r0650, r0653);
+ ir_expression *const r0655 = logic_and(r0654, r064A);
+ ir_expression *const r0656 = logic_or(r064F, r0655);
+ ir_if *f064E = new(mem_ctx) ir_if(operand(r0656).val);
+ exec_list *const f064E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f064E->then_instructions;
+
+ ir_variable *const r0657 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0657);
+ ir_expression *const r0658 = lshift(r0218, body.constant(int(31)));
+ body.emit(assign(r0657, add(r0658, body.constant(2146435072u)), 0x02));
+
+ body.emit(assign(r0657, body.constant(0u), 0x01));
+
+ body.emit(assign(r0649, r0657, 0x03));
+
+ body.emit(assign(r0648, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f064E->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r065A = less(r0605, body.constant(int(0)));
+ ir_if *f0659 = new(mem_ctx) ir_if(operand(r065A).val);
+ exec_list *const f0659_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0659->then_instructions;
+
+ ir_variable *const r065B = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r065B, r0608, 0x01));
+
+ ir_variable *const r065C = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r065C, neg(r0605), 0x01));
+
+ ir_variable *const r065D = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r065D);
+ ir_variable *const r065E = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r065E);
+ ir_variable *const r065F = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r065F);
+ ir_variable *const r0660 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0661 = neg(r065C);
+ body.emit(assign(r0660, bit_and(r0661, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0663 = equal(r065C, body.constant(int(0)));
+ ir_if *f0662 = new(mem_ctx) ir_if(operand(r0663).val);
+ exec_list *const f0662_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0662->then_instructions;
+
+ body.emit(assign(r065D, r0608, 0x01));
+
+ body.emit(assign(r065E, r0607, 0x01));
+
+ body.emit(assign(r065F, r0606, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0662->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0665 = less(r065C, body.constant(int(32)));
+ ir_if *f0664 = new(mem_ctx) ir_if(operand(r0665).val);
+ exec_list *const f0664_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0664->then_instructions;
+
+ body.emit(assign(r065D, lshift(r0607, r0660), 0x01));
+
+ ir_expression *const r0666 = lshift(r0606, r0660);
+ ir_expression *const r0667 = rshift(r0607, r065C);
+ body.emit(assign(r065E, bit_or(r0666, r0667), 0x01));
+
+ body.emit(assign(r065F, rshift(r0606, r065C), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0664->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0669 = equal(r065C, body.constant(int(32)));
+ ir_if *f0668 = new(mem_ctx) ir_if(operand(r0669).val);
+ exec_list *const f0668_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0668->then_instructions;
+
+ body.emit(assign(r065D, r0607, 0x01));
+
+ body.emit(assign(r065E, r0606, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0668->else_instructions;
+
+ body.emit(assign(r065B, bit_or(r0608, r0607), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r066B = less(r065C, body.constant(int(64)));
+ ir_if *f066A = new(mem_ctx) ir_if(operand(r066B).val);
+ exec_list *const f066A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f066A->then_instructions;
+
+ body.emit(assign(r065D, lshift(r0606, r0660), 0x01));
+
+ ir_expression *const r066C = bit_and(r065C, body.constant(int(31)));
+ body.emit(assign(r065E, rshift(r0606, r066C), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f066A->else_instructions;
+
+ ir_variable *const r066D = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r066F = equal(r065C, body.constant(int(64)));
+ ir_if *f066E = new(mem_ctx) ir_if(operand(r066F).val);
+ exec_list *const f066E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f066E->then_instructions;
+
+ body.emit(assign(r066D, r0606, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f066E->else_instructions;
+
+ ir_expression *const r0670 = nequal(r0606, body.constant(0u));
+ ir_expression *const r0671 = expr(ir_unop_b2i, r0670);
+ body.emit(assign(r066D, expr(ir_unop_i2u, r0671), 0x01));
+
+
+ body.instructions = f066E_parent_instructions;
+ body.emit(f066E);
+
+ /* END IF */
+
+ body.emit(assign(r065D, r066D, 0x01));
+
+ body.emit(assign(r065E, body.constant(0u), 0x01));
+
+
+ body.instructions = f066A_parent_instructions;
+ body.emit(f066A);
+
+ /* END IF */
+
+
+ body.instructions = f0668_parent_instructions;
+ body.emit(f0668);
+
+ /* END IF */
+
+ body.emit(assign(r065F, body.constant(0u), 0x01));
+
+
+ body.instructions = f0664_parent_instructions;
+ body.emit(f0664);
+
+ /* END IF */
+
+ ir_expression *const r0672 = nequal(r065B, body.constant(0u));
+ ir_expression *const r0673 = expr(ir_unop_b2i, r0672);
+ ir_expression *const r0674 = expr(ir_unop_i2u, r0673);
+ body.emit(assign(r065D, bit_or(r065D, r0674), 0x01));
+
+
+ body.instructions = f0662_parent_instructions;
+ body.emit(f0662);
+
+ /* END IF */
+
+ body.emit(assign(r0645, r065F, 0x01));
+
+ body.emit(assign(r0646, r065E, 0x01));
+
+ body.emit(assign(r0647, r065D, 0x01));
+
+ body.emit(assign(r0644, body.constant(int(0)), 0x01));
+
+ body.emit(assign(r064A, less(r065D, body.constant(0u)), 0x01));
+
+
+ body.instructions = f0659_parent_instructions;
+ body.emit(f0659);
+
+ /* END IF */
+
+
+ body.instructions = f064E_parent_instructions;
+ body.emit(f064E);
+
+ /* END IF */
+
+
+ body.instructions = f064C_parent_instructions;
+ body.emit(f064C);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0675 = new(mem_ctx) ir_if(operand(r0648).val);
+ exec_list *const f0675_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0675->then_instructions;
+
+ /* IF CONDITION */
+ ir_if *f0676 = new(mem_ctx) ir_if(operand(r064A).val);
+ exec_list *const f0676_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0676->then_instructions;
+
+ ir_variable *const r0677 = body.make_temp(glsl_type::uint_type, "assignment_tmp");
+ body.emit(assign(r0677, add(r0646, body.constant(1u)), 0x01));
+
+ ir_expression *const r0678 = less(r0677, r0646);
+ ir_expression *const r0679 = expr(ir_unop_b2i, r0678);
+ ir_expression *const r067A = expr(ir_unop_i2u, r0679);
+ body.emit(assign(r0645, add(r0645, r067A), 0x01));
+
+ ir_expression *const r067B = equal(r0647, body.constant(0u));
+ ir_expression *const r067C = expr(ir_unop_b2i, r067B);
+ ir_expression *const r067D = expr(ir_unop_i2u, r067C);
+ ir_expression *const r067E = add(r0647, r067D);
+ ir_expression *const r067F = bit_and(r067E, body.constant(1u));
+ ir_expression *const r0680 = expr(ir_unop_bit_not, r067F);
+ body.emit(assign(r0646, bit_and(r0677, r0680), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0676->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0682 = bit_or(r0645, r0646);
+ ir_expression *const r0683 = equal(r0682, body.constant(0u));
+ ir_if *f0681 = new(mem_ctx) ir_if(operand(r0683).val);
+ exec_list *const f0681_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0681->then_instructions;
+
+ body.emit(assign(r0644, body.constant(int(0)), 0x01));
+
+
+ body.instructions = f0681_parent_instructions;
+ body.emit(f0681);
+
+ /* END IF */
+
+
+ body.instructions = f0676_parent_instructions;
+ body.emit(f0676);
+
+ /* END IF */
+
+ ir_variable *const r0684 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0684);
+ ir_expression *const r0685 = lshift(r0218, body.constant(int(31)));
+ ir_expression *const r0686 = expr(ir_unop_i2u, r0644);
+ ir_expression *const r0687 = lshift(r0686, body.constant(int(20)));
+ ir_expression *const r0688 = add(r0685, r0687);
+ body.emit(assign(r0684, add(r0688, r0645), 0x02));
+
+ body.emit(assign(r0684, r0646, 0x01));
+
+ body.emit(assign(r0649, r0684, 0x03));
+
+ body.emit(assign(r0648, body.constant(false), 0x01));
+
+
+ body.instructions = f0675_parent_instructions;
+ body.emit(f0675);
+
+ /* END IF */
+
+ body.emit(assign(r0217, r0649, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f05FD->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r068A = less(r03AD, r03AF);
+ ir_if *f0689 = new(mem_ctx) ir_if(operand(r068A).val);
+ exec_list *const f0689_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0689->then_instructions;
+
+ ir_variable *const r068B = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r068C = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r068C, sub(r03AF, r03AD), 0x01));
+
+ ir_expression *const r068D = sub(r03AE, r03AC);
+ ir_expression *const r068E = less(r03AF, r03AD);
+ ir_expression *const r068F = expr(ir_unop_b2i, r068E);
+ ir_expression *const r0690 = expr(ir_unop_i2u, r068F);
+ body.emit(assign(r068B, sub(r068D, r0690), 0x01));
+
+ body.emit(assign(r03B0, add(r03AB, body.constant(int(-1))), 0x01));
+
+ ir_variable *const r0691 = body.make_temp(glsl_type::int_type, "zExp");
+ body.emit(assign(r0691, add(r03B0, body.constant(int(-10))), 0x01));
+
+ ir_variable *const r0692 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r0692, r068B, 0x01));
+
+ ir_variable *const r0693 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r0693, r068C, 0x01));
+
+ ir_variable *const r0694 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r0694);
+ ir_variable *const r0695 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r0695);
+ /* IF CONDITION */
+ ir_expression *const r0697 = equal(r068B, body.constant(0u));
+ ir_if *f0696 = new(mem_ctx) ir_if(operand(r0697).val);
+ exec_list *const f0696_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0696->then_instructions;
+
+ body.emit(assign(r0692, r068C, 0x01));
+
+ body.emit(assign(r0693, body.constant(0u), 0x01));
+
+ body.emit(assign(r0691, add(r0691, body.constant(int(-32))), 0x01));
+
+
+ body.instructions = f0696_parent_instructions;
+ body.emit(f0696);
+
+ /* END IF */
+
+ ir_variable *const r0698 = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r0698, r0692, 0x01));
+
+ ir_variable *const r0699 = body.make_temp(glsl_type::int_type, "return_value");
+ ir_variable *const r069A = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r069A);
+ /* IF CONDITION */
+ ir_expression *const r069C = equal(r0692, body.constant(0u));
+ ir_if *f069B = new(mem_ctx) ir_if(operand(r069C).val);
+ exec_list *const f069B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f069B->then_instructions;
+
+ body.emit(assign(r0699, body.constant(int(32)), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f069B->else_instructions;
+
+ body.emit(assign(r069A, body.constant(int(0)), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r069E = bit_and(r0692, body.constant(4294901760u));
+ ir_expression *const r069F = equal(r069E, body.constant(0u));
+ ir_if *f069D = new(mem_ctx) ir_if(operand(r069F).val);
+ exec_list *const f069D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f069D->then_instructions;
+
+ body.emit(assign(r069A, body.constant(int(16)), 0x01));
+
+ body.emit(assign(r0698, lshift(r0692, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f069D_parent_instructions;
+ body.emit(f069D);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r06A1 = bit_and(r0698, body.constant(4278190080u));
+ ir_expression *const r06A2 = equal(r06A1, body.constant(0u));
+ ir_if *f06A0 = new(mem_ctx) ir_if(operand(r06A2).val);
+ exec_list *const f06A0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06A0->then_instructions;
+
+ body.emit(assign(r069A, add(r069A, body.constant(int(8))), 0x01));
+
+ body.emit(assign(r0698, lshift(r0698, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f06A0_parent_instructions;
+ body.emit(f06A0);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r06A4 = bit_and(r0698, body.constant(4026531840u));
+ ir_expression *const r06A5 = equal(r06A4, body.constant(0u));
+ ir_if *f06A3 = new(mem_ctx) ir_if(operand(r06A5).val);
+ exec_list *const f06A3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06A3->then_instructions;
+
+ body.emit(assign(r069A, add(r069A, body.constant(int(4))), 0x01));
+
+ body.emit(assign(r0698, lshift(r0698, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f06A3_parent_instructions;
+ body.emit(f06A3);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r06A7 = bit_and(r0698, body.constant(3221225472u));
+ ir_expression *const r06A8 = equal(r06A7, body.constant(0u));
+ ir_if *f06A6 = new(mem_ctx) ir_if(operand(r06A8).val);
+ exec_list *const f06A6_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06A6->then_instructions;
+
+ body.emit(assign(r069A, add(r069A, body.constant(int(2))), 0x01));
+
+ body.emit(assign(r0698, lshift(r0698, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f06A6_parent_instructions;
+ body.emit(f06A6);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r06AA = bit_and(r0698, body.constant(2147483648u));
+ ir_expression *const r06AB = equal(r06AA, body.constant(0u));
+ ir_if *f06A9 = new(mem_ctx) ir_if(operand(r06AB).val);
+ exec_list *const f06A9_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06A9->then_instructions;
+
+ body.emit(assign(r069A, add(r069A, body.constant(int(1))), 0x01));
+
+
+ body.instructions = f06A9_parent_instructions;
+ body.emit(f06A9);
+
+ /* END IF */
+
+ body.emit(assign(r0699, r069A, 0x01));
+
+
+ body.instructions = f069B_parent_instructions;
+ body.emit(f069B);
+
+ /* END IF */
+
+ body.emit(assign(r0695, add(r0699, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r06AD = lequal(body.constant(int(0)), r0695);
+ ir_if *f06AC = new(mem_ctx) ir_if(operand(r06AD).val);
+ exec_list *const f06AC_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06AC->then_instructions;
+
+ body.emit(assign(r0694, body.constant(0u), 0x01));
+
+ ir_variable *const r06AE = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r06AE, lshift(r0693, r0695), 0x01));
+
+ ir_variable *const r06AF = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r06B1 = equal(r0695, body.constant(int(0)));
+ ir_if *f06B0 = new(mem_ctx) ir_if(operand(r06B1).val);
+ exec_list *const f06B0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06B0->then_instructions;
+
+ body.emit(assign(r06AF, r0692, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06B0->else_instructions;
+
+ ir_expression *const r06B2 = lshift(r0692, r0695);
+ ir_expression *const r06B3 = neg(r0695);
+ ir_expression *const r06B4 = bit_and(r06B3, body.constant(int(31)));
+ ir_expression *const r06B5 = rshift(r0693, r06B4);
+ body.emit(assign(r06AF, bit_or(r06B2, r06B5), 0x01));
+
+
+ body.instructions = f06B0_parent_instructions;
+ body.emit(f06B0);
+
+ /* END IF */
+
+ body.emit(assign(r0692, r06AF, 0x01));
+
+ body.emit(assign(r0693, r06AE, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06AC->else_instructions;
+
+ ir_variable *const r06B6 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r06B6, body.constant(0u), 0x01));
+
+ ir_variable *const r06B7 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r06B7, neg(r0695), 0x01));
+
+ ir_variable *const r06B8 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r06B8);
+ ir_variable *const r06B9 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r06B9);
+ ir_variable *const r06BA = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r06BA);
+ ir_variable *const r06BB = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r06BC = neg(r06B7);
+ body.emit(assign(r06BB, bit_and(r06BC, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r06BE = equal(r06B7, body.constant(int(0)));
+ ir_if *f06BD = new(mem_ctx) ir_if(operand(r06BE).val);
+ exec_list *const f06BD_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06BD->then_instructions;
+
+ body.emit(assign(r06B8, r06B6, 0x01));
+
+ body.emit(assign(r06B9, r0693, 0x01));
+
+ body.emit(assign(r06BA, r0692, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06BD->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r06C0 = less(r06B7, body.constant(int(32)));
+ ir_if *f06BF = new(mem_ctx) ir_if(operand(r06C0).val);
+ exec_list *const f06BF_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06BF->then_instructions;
+
+ body.emit(assign(r06B8, lshift(r0693, r06BB), 0x01));
+
+ ir_expression *const r06C1 = lshift(r0692, r06BB);
+ ir_expression *const r06C2 = rshift(r0693, r06B7);
+ body.emit(assign(r06B9, bit_or(r06C1, r06C2), 0x01));
+
+ body.emit(assign(r06BA, rshift(r0692, r06B7), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06BF->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r06C4 = equal(r06B7, body.constant(int(32)));
+ ir_if *f06C3 = new(mem_ctx) ir_if(operand(r06C4).val);
+ exec_list *const f06C3_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06C3->then_instructions;
+
+ body.emit(assign(r06B8, r0693, 0x01));
+
+ body.emit(assign(r06B9, r0692, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06C3->else_instructions;
+
+ body.emit(assign(r06B6, bit_or(body.constant(0u), r0693), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r06C6 = less(r06B7, body.constant(int(64)));
+ ir_if *f06C5 = new(mem_ctx) ir_if(operand(r06C6).val);
+ exec_list *const f06C5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06C5->then_instructions;
+
+ body.emit(assign(r06B8, lshift(r0692, r06BB), 0x01));
+
+ ir_expression *const r06C7 = bit_and(r06B7, body.constant(int(31)));
+ body.emit(assign(r06B9, rshift(r0692, r06C7), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06C5->else_instructions;
+
+ ir_variable *const r06C8 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r06CA = equal(r06B7, body.constant(int(64)));
+ ir_if *f06C9 = new(mem_ctx) ir_if(operand(r06CA).val);
+ exec_list *const f06C9_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06C9->then_instructions;
+
+ body.emit(assign(r06C8, r0692, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06C9->else_instructions;
+
+ ir_expression *const r06CB = nequal(r0692, body.constant(0u));
+ ir_expression *const r06CC = expr(ir_unop_b2i, r06CB);
+ body.emit(assign(r06C8, expr(ir_unop_i2u, r06CC), 0x01));
+
+
+ body.instructions = f06C9_parent_instructions;
+ body.emit(f06C9);
+
+ /* END IF */
+
+ body.emit(assign(r06B8, r06C8, 0x01));
+
+ body.emit(assign(r06B9, body.constant(0u), 0x01));
+
+
+ body.instructions = f06C5_parent_instructions;
+ body.emit(f06C5);
+
+ /* END IF */
+
+
+ body.instructions = f06C3_parent_instructions;
+ body.emit(f06C3);
+
+ /* END IF */
+
+ body.emit(assign(r06BA, body.constant(0u), 0x01));
+
+
+ body.instructions = f06BF_parent_instructions;
+ body.emit(f06BF);
+
+ /* END IF */
+
+ ir_expression *const r06CD = nequal(r06B6, body.constant(0u));
+ ir_expression *const r06CE = expr(ir_unop_b2i, r06CD);
+ ir_expression *const r06CF = expr(ir_unop_i2u, r06CE);
+ body.emit(assign(r06B8, bit_or(r06B8, r06CF), 0x01));
+
+
+ body.instructions = f06BD_parent_instructions;
+ body.emit(f06BD);
+
+ /* END IF */
+
+ body.emit(assign(r0692, r06BA, 0x01));
+
+ body.emit(assign(r0693, r06B9, 0x01));
+
+ body.emit(assign(r0694, r06B8, 0x01));
+
+
+ body.instructions = f06AC_parent_instructions;
+ body.emit(f06AC);
+
+ /* END IF */
+
+ body.emit(assign(r0691, sub(r0691, r0695), 0x01));
+
+ ir_variable *const r06D0 = body.make_temp(glsl_type::int_type, "zExp");
+ body.emit(assign(r06D0, r0691, 0x01));
+
+ ir_variable *const r06D1 = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r06D1, r0692, 0x01));
+
+ ir_variable *const r06D2 = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r06D2, r0693, 0x01));
+
+ ir_variable *const r06D3 = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r06D3, r0694, 0x01));
+
+ ir_variable *const r06D4 = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r06D4, body.constant(true), 0x01));
+
+ ir_variable *const r06D5 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r06D6 = new(mem_ctx) ir_variable(glsl_type::bool_type, "increment", ir_var_auto);
+ body.emit(r06D6);
+ ir_expression *const r06D7 = expr(ir_unop_u2i, r0694);
+ body.emit(assign(r06D6, less(r06D7, body.constant(int(0))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r06D9 = lequal(body.constant(int(2045)), r0691);
+ ir_if *f06D8 = new(mem_ctx) ir_if(operand(r06D9).val);
+ exec_list *const f06D8_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06D8->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r06DB = less(body.constant(int(2045)), r0691);
+ ir_expression *const r06DC = equal(r0691, body.constant(int(2045)));
+ ir_expression *const r06DD = equal(body.constant(2097151u), r0692);
+ ir_expression *const r06DE = equal(body.constant(4294967295u), r0693);
+ ir_expression *const r06DF = logic_and(r06DD, r06DE);
+ ir_expression *const r06E0 = logic_and(r06DC, r06DF);
+ ir_expression *const r06E1 = logic_and(r06E0, r06D6);
+ ir_expression *const r06E2 = logic_or(r06DB, r06E1);
+ ir_if *f06DA = new(mem_ctx) ir_if(operand(r06E2).val);
+ exec_list *const f06DA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06DA->then_instructions;
+
+ ir_variable *const r06E3 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r06E3);
+ ir_expression *const r06E4 = lshift(r0218, body.constant(int(31)));
+ body.emit(assign(r06E3, add(r06E4, body.constant(2146435072u)), 0x02));
+
+ body.emit(assign(r06E3, body.constant(0u), 0x01));
+
+ body.emit(assign(r06D5, r06E3, 0x03));
+
+ body.emit(assign(r06D4, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06DA->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r06E6 = less(r0691, body.constant(int(0)));
+ ir_if *f06E5 = new(mem_ctx) ir_if(operand(r06E6).val);
+ exec_list *const f06E5_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06E5->then_instructions;
+
+ ir_variable *const r06E7 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r06E7, r0694, 0x01));
+
+ ir_variable *const r06E8 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r06E8, neg(r0691), 0x01));
+
+ ir_variable *const r06E9 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r06E9);
+ ir_variable *const r06EA = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r06EA);
+ ir_variable *const r06EB = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r06EB);
+ ir_variable *const r06EC = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r06ED = neg(r06E8);
+ body.emit(assign(r06EC, bit_and(r06ED, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r06EF = equal(r06E8, body.constant(int(0)));
+ ir_if *f06EE = new(mem_ctx) ir_if(operand(r06EF).val);
+ exec_list *const f06EE_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06EE->then_instructions;
+
+ body.emit(assign(r06E9, r0694, 0x01));
+
+ body.emit(assign(r06EA, r0693, 0x01));
+
+ body.emit(assign(r06EB, r0692, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06EE->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r06F1 = less(r06E8, body.constant(int(32)));
+ ir_if *f06F0 = new(mem_ctx) ir_if(operand(r06F1).val);
+ exec_list *const f06F0_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06F0->then_instructions;
+
+ body.emit(assign(r06E9, lshift(r0693, r06EC), 0x01));
+
+ ir_expression *const r06F2 = lshift(r0692, r06EC);
+ ir_expression *const r06F3 = rshift(r0693, r06E8);
+ body.emit(assign(r06EA, bit_or(r06F2, r06F3), 0x01));
+
+ body.emit(assign(r06EB, rshift(r0692, r06E8), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06F0->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r06F5 = equal(r06E8, body.constant(int(32)));
+ ir_if *f06F4 = new(mem_ctx) ir_if(operand(r06F5).val);
+ exec_list *const f06F4_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06F4->then_instructions;
+
+ body.emit(assign(r06E9, r0693, 0x01));
+
+ body.emit(assign(r06EA, r0692, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06F4->else_instructions;
+
+ body.emit(assign(r06E7, bit_or(r0694, r0693), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r06F7 = less(r06E8, body.constant(int(64)));
+ ir_if *f06F6 = new(mem_ctx) ir_if(operand(r06F7).val);
+ exec_list *const f06F6_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06F6->then_instructions;
+
+ body.emit(assign(r06E9, lshift(r0692, r06EC), 0x01));
+
+ ir_expression *const r06F8 = bit_and(r06E8, body.constant(int(31)));
+ body.emit(assign(r06EA, rshift(r0692, r06F8), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06F6->else_instructions;
+
+ ir_variable *const r06F9 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r06FB = equal(r06E8, body.constant(int(64)));
+ ir_if *f06FA = new(mem_ctx) ir_if(operand(r06FB).val);
+ exec_list *const f06FA_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f06FA->then_instructions;
+
+ body.emit(assign(r06F9, r0692, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f06FA->else_instructions;
+
+ ir_expression *const r06FC = nequal(r0692, body.constant(0u));
+ ir_expression *const r06FD = expr(ir_unop_b2i, r06FC);
+ body.emit(assign(r06F9, expr(ir_unop_i2u, r06FD), 0x01));
+
+
+ body.instructions = f06FA_parent_instructions;
+ body.emit(f06FA);
+
+ /* END IF */
+
+ body.emit(assign(r06E9, r06F9, 0x01));
+
+ body.emit(assign(r06EA, body.constant(0u), 0x01));
+
+
+ body.instructions = f06F6_parent_instructions;
+ body.emit(f06F6);
+
+ /* END IF */
+
+
+ body.instructions = f06F4_parent_instructions;
+ body.emit(f06F4);
+
+ /* END IF */
+
+ body.emit(assign(r06EB, body.constant(0u), 0x01));
+
+
+ body.instructions = f06F0_parent_instructions;
+ body.emit(f06F0);
+
+ /* END IF */
+
+ ir_expression *const r06FE = nequal(r06E7, body.constant(0u));
+ ir_expression *const r06FF = expr(ir_unop_b2i, r06FE);
+ ir_expression *const r0700 = expr(ir_unop_i2u, r06FF);
+ body.emit(assign(r06E9, bit_or(r06E9, r0700), 0x01));
+
+
+ body.instructions = f06EE_parent_instructions;
+ body.emit(f06EE);
+
+ /* END IF */
+
+ body.emit(assign(r06D1, r06EB, 0x01));
+
+ body.emit(assign(r06D2, r06EA, 0x01));
+
+ body.emit(assign(r06D3, r06E9, 0x01));
+
+ body.emit(assign(r06D0, body.constant(int(0)), 0x01));
+
+ body.emit(assign(r06D6, less(r06E9, body.constant(0u)), 0x01));
+
+
+ body.instructions = f06E5_parent_instructions;
+ body.emit(f06E5);
+
+ /* END IF */
+
+
+ body.instructions = f06DA_parent_instructions;
+ body.emit(f06DA);
+
+ /* END IF */
+
+
+ body.instructions = f06D8_parent_instructions;
+ body.emit(f06D8);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f0701 = new(mem_ctx) ir_if(operand(r06D4).val);
+ exec_list *const f0701_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0701->then_instructions;
+
+ /* IF CONDITION */
+ ir_if *f0702 = new(mem_ctx) ir_if(operand(r06D6).val);
+ exec_list *const f0702_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0702->then_instructions;
+
+ ir_variable *const r0703 = body.make_temp(glsl_type::uint_type, "assignment_tmp");
+ body.emit(assign(r0703, add(r06D2, body.constant(1u)), 0x01));
+
+ ir_expression *const r0704 = less(r0703, r06D2);
+ ir_expression *const r0705 = expr(ir_unop_b2i, r0704);
+ ir_expression *const r0706 = expr(ir_unop_i2u, r0705);
+ body.emit(assign(r06D1, add(r06D1, r0706), 0x01));
+
+ ir_expression *const r0707 = equal(r06D3, body.constant(0u));
+ ir_expression *const r0708 = expr(ir_unop_b2i, r0707);
+ ir_expression *const r0709 = expr(ir_unop_i2u, r0708);
+ ir_expression *const r070A = add(r06D3, r0709);
+ ir_expression *const r070B = bit_and(r070A, body.constant(1u));
+ ir_expression *const r070C = expr(ir_unop_bit_not, r070B);
+ body.emit(assign(r06D2, bit_and(r0703, r070C), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0702->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r070E = bit_or(r06D1, r06D2);
+ ir_expression *const r070F = equal(r070E, body.constant(0u));
+ ir_if *f070D = new(mem_ctx) ir_if(operand(r070F).val);
+ exec_list *const f070D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f070D->then_instructions;
+
+ body.emit(assign(r06D0, body.constant(int(0)), 0x01));
+
+
+ body.instructions = f070D_parent_instructions;
+ body.emit(f070D);
+
+ /* END IF */
+
+
+ body.instructions = f0702_parent_instructions;
+ body.emit(f0702);
+
+ /* END IF */
+
+ ir_variable *const r0710 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r0710);
+ ir_expression *const r0711 = lshift(r0218, body.constant(int(31)));
+ ir_expression *const r0712 = expr(ir_unop_i2u, r06D0);
+ ir_expression *const r0713 = lshift(r0712, body.constant(int(20)));
+ ir_expression *const r0714 = add(r0711, r0713);
+ body.emit(assign(r0710, add(r0714, r06D1), 0x02));
+
+ body.emit(assign(r0710, r06D2, 0x01));
+
+ body.emit(assign(r06D5, r0710, 0x03));
+
+ body.emit(assign(r06D4, body.constant(false), 0x01));
+
+
+ body.instructions = f0701_parent_instructions;
+ body.emit(f0701);
+
+ /* END IF */
+
+ body.emit(assign(r0217, r06D5, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0689->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0716 = less(r03AF, r03AD);
+ ir_if *f0715 = new(mem_ctx) ir_if(operand(r0716).val);
+ exec_list *const f0715_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0715->then_instructions;
+
+ ir_variable *const r0717 = body.make_temp(glsl_type::uint_type, "z0Ptr");
+ ir_variable *const r0718 = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r0718, sub(r03AD, r03AF), 0x01));
+
+ ir_expression *const r0719 = sub(r03AC, r03AE);
+ ir_expression *const r071A = less(r03AD, r03AF);
+ ir_expression *const r071B = expr(ir_unop_b2i, r071A);
+ ir_expression *const r071C = expr(ir_unop_i2u, r071B);
+ body.emit(assign(r0717, sub(r0719, r071C), 0x01));
+
+ body.emit(assign(r0218, bit_xor(r0218, body.constant(1u)), 0x01));
+
+ body.emit(assign(r03B0, add(r03AA, body.constant(int(-1))), 0x01));
+
+ ir_variable *const r071D = body.make_temp(glsl_type::int_type, "zExp");
+ body.emit(assign(r071D, add(r03B0, body.constant(int(-10))), 0x01));
+
+ ir_variable *const r071E = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r071E, r0717, 0x01));
+
+ ir_variable *const r071F = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r071F, r0718, 0x01));
+
+ ir_variable *const r0720 = new(mem_ctx) ir_variable(glsl_type::uint_type, "zFrac2", ir_var_auto);
+ body.emit(r0720);
+ ir_variable *const r0721 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r0721);
+ /* IF CONDITION */
+ ir_expression *const r0723 = equal(r0717, body.constant(0u));
+ ir_if *f0722 = new(mem_ctx) ir_if(operand(r0723).val);
+ exec_list *const f0722_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0722->then_instructions;
+
+ body.emit(assign(r071E, r0718, 0x01));
+
+ body.emit(assign(r071F, body.constant(0u), 0x01));
+
+ body.emit(assign(r071D, add(r071D, body.constant(int(-32))), 0x01));
+
+
+ body.instructions = f0722_parent_instructions;
+ body.emit(f0722);
+
+ /* END IF */
+
+ ir_variable *const r0724 = body.make_temp(glsl_type::uint_type, "a");
+ body.emit(assign(r0724, r071E, 0x01));
+
+ ir_variable *const r0725 = body.make_temp(glsl_type::int_type, "return_value");
+ ir_variable *const r0726 = new(mem_ctx) ir_variable(glsl_type::int_type, "shiftCount", ir_var_auto);
+ body.emit(r0726);
+ /* IF CONDITION */
+ ir_expression *const r0728 = equal(r071E, body.constant(0u));
+ ir_if *f0727 = new(mem_ctx) ir_if(operand(r0728).val);
+ exec_list *const f0727_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0727->then_instructions;
+
+ body.emit(assign(r0725, body.constant(int(32)), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0727->else_instructions;
+
+ body.emit(assign(r0726, body.constant(int(0)), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r072A = bit_and(r071E, body.constant(4294901760u));
+ ir_expression *const r072B = equal(r072A, body.constant(0u));
+ ir_if *f0729 = new(mem_ctx) ir_if(operand(r072B).val);
+ exec_list *const f0729_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0729->then_instructions;
+
+ body.emit(assign(r0726, body.constant(int(16)), 0x01));
+
+ body.emit(assign(r0724, lshift(r071E, body.constant(int(16))), 0x01));
+
+
+ body.instructions = f0729_parent_instructions;
+ body.emit(f0729);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r072D = bit_and(r0724, body.constant(4278190080u));
+ ir_expression *const r072E = equal(r072D, body.constant(0u));
+ ir_if *f072C = new(mem_ctx) ir_if(operand(r072E).val);
+ exec_list *const f072C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f072C->then_instructions;
+
+ body.emit(assign(r0726, add(r0726, body.constant(int(8))), 0x01));
+
+ body.emit(assign(r0724, lshift(r0724, body.constant(int(8))), 0x01));
+
+
+ body.instructions = f072C_parent_instructions;
+ body.emit(f072C);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0730 = bit_and(r0724, body.constant(4026531840u));
+ ir_expression *const r0731 = equal(r0730, body.constant(0u));
+ ir_if *f072F = new(mem_ctx) ir_if(operand(r0731).val);
+ exec_list *const f072F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f072F->then_instructions;
+
+ body.emit(assign(r0726, add(r0726, body.constant(int(4))), 0x01));
+
+ body.emit(assign(r0724, lshift(r0724, body.constant(int(4))), 0x01));
+
+
+ body.instructions = f072F_parent_instructions;
+ body.emit(f072F);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0733 = bit_and(r0724, body.constant(3221225472u));
+ ir_expression *const r0734 = equal(r0733, body.constant(0u));
+ ir_if *f0732 = new(mem_ctx) ir_if(operand(r0734).val);
+ exec_list *const f0732_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0732->then_instructions;
+
+ body.emit(assign(r0726, add(r0726, body.constant(int(2))), 0x01));
+
+ body.emit(assign(r0724, lshift(r0724, body.constant(int(2))), 0x01));
+
+
+ body.instructions = f0732_parent_instructions;
+ body.emit(f0732);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_expression *const r0736 = bit_and(r0724, body.constant(2147483648u));
+ ir_expression *const r0737 = equal(r0736, body.constant(0u));
+ ir_if *f0735 = new(mem_ctx) ir_if(operand(r0737).val);
+ exec_list *const f0735_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0735->then_instructions;
+
+ body.emit(assign(r0726, add(r0726, body.constant(int(1))), 0x01));
+
+
+ body.instructions = f0735_parent_instructions;
+ body.emit(f0735);
+
+ /* END IF */
+
+ body.emit(assign(r0725, r0726, 0x01));
+
+
+ body.instructions = f0727_parent_instructions;
+ body.emit(f0727);
+
+ /* END IF */
+
+ body.emit(assign(r0721, add(r0725, body.constant(int(-11))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0739 = lequal(body.constant(int(0)), r0721);
+ ir_if *f0738 = new(mem_ctx) ir_if(operand(r0739).val);
+ exec_list *const f0738_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0738->then_instructions;
+
+ body.emit(assign(r0720, body.constant(0u), 0x01));
+
+ ir_variable *const r073A = body.make_temp(glsl_type::uint_type, "z1Ptr");
+ body.emit(assign(r073A, lshift(r071F, r0721), 0x01));
+
+ ir_variable *const r073B = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r073D = equal(r0721, body.constant(int(0)));
+ ir_if *f073C = new(mem_ctx) ir_if(operand(r073D).val);
+ exec_list *const f073C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f073C->then_instructions;
+
+ body.emit(assign(r073B, r071E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f073C->else_instructions;
+
+ ir_expression *const r073E = lshift(r071E, r0721);
+ ir_expression *const r073F = neg(r0721);
+ ir_expression *const r0740 = bit_and(r073F, body.constant(int(31)));
+ ir_expression *const r0741 = rshift(r071F, r0740);
+ body.emit(assign(r073B, bit_or(r073E, r0741), 0x01));
+
+
+ body.instructions = f073C_parent_instructions;
+ body.emit(f073C);
+
+ /* END IF */
+
+ body.emit(assign(r071E, r073B, 0x01));
+
+ body.emit(assign(r071F, r073A, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0738->else_instructions;
+
+ ir_variable *const r0742 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0742, body.constant(0u), 0x01));
+
+ ir_variable *const r0743 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r0743, neg(r0721), 0x01));
+
+ ir_variable *const r0744 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0744);
+ ir_variable *const r0745 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0745);
+ ir_variable *const r0746 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0746);
+ ir_variable *const r0747 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0748 = neg(r0743);
+ body.emit(assign(r0747, bit_and(r0748, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r074A = equal(r0743, body.constant(int(0)));
+ ir_if *f0749 = new(mem_ctx) ir_if(operand(r074A).val);
+ exec_list *const f0749_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0749->then_instructions;
+
+ body.emit(assign(r0744, r0742, 0x01));
+
+ body.emit(assign(r0745, r071F, 0x01));
+
+ body.emit(assign(r0746, r071E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0749->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r074C = less(r0743, body.constant(int(32)));
+ ir_if *f074B = new(mem_ctx) ir_if(operand(r074C).val);
+ exec_list *const f074B_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f074B->then_instructions;
+
+ body.emit(assign(r0744, lshift(r071F, r0747), 0x01));
+
+ ir_expression *const r074D = lshift(r071E, r0747);
+ ir_expression *const r074E = rshift(r071F, r0743);
+ body.emit(assign(r0745, bit_or(r074D, r074E), 0x01));
+
+ body.emit(assign(r0746, rshift(r071E, r0743), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f074B->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0750 = equal(r0743, body.constant(int(32)));
+ ir_if *f074F = new(mem_ctx) ir_if(operand(r0750).val);
+ exec_list *const f074F_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f074F->then_instructions;
+
+ body.emit(assign(r0744, r071F, 0x01));
+
+ body.emit(assign(r0745, r071E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f074F->else_instructions;
+
+ body.emit(assign(r0742, bit_or(body.constant(0u), r071F), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0752 = less(r0743, body.constant(int(64)));
+ ir_if *f0751 = new(mem_ctx) ir_if(operand(r0752).val);
+ exec_list *const f0751_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0751->then_instructions;
+
+ body.emit(assign(r0744, lshift(r071E, r0747), 0x01));
+
+ ir_expression *const r0753 = bit_and(r0743, body.constant(int(31)));
+ body.emit(assign(r0745, rshift(r071E, r0753), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0751->else_instructions;
+
+ ir_variable *const r0754 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0756 = equal(r0743, body.constant(int(64)));
+ ir_if *f0755 = new(mem_ctx) ir_if(operand(r0756).val);
+ exec_list *const f0755_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0755->then_instructions;
+
+ body.emit(assign(r0754, r071E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0755->else_instructions;
+
+ ir_expression *const r0757 = nequal(r071E, body.constant(0u));
+ ir_expression *const r0758 = expr(ir_unop_b2i, r0757);
+ body.emit(assign(r0754, expr(ir_unop_i2u, r0758), 0x01));
+
+
+ body.instructions = f0755_parent_instructions;
+ body.emit(f0755);
+
+ /* END IF */
+
+ body.emit(assign(r0744, r0754, 0x01));
+
+ body.emit(assign(r0745, body.constant(0u), 0x01));
+
+
+ body.instructions = f0751_parent_instructions;
+ body.emit(f0751);
+
+ /* END IF */
+
+
+ body.instructions = f074F_parent_instructions;
+ body.emit(f074F);
+
+ /* END IF */
+
+ body.emit(assign(r0746, body.constant(0u), 0x01));
+
+
+ body.instructions = f074B_parent_instructions;
+ body.emit(f074B);
+
+ /* END IF */
+
+ ir_expression *const r0759 = nequal(r0742, body.constant(0u));
+ ir_expression *const r075A = expr(ir_unop_b2i, r0759);
+ ir_expression *const r075B = expr(ir_unop_i2u, r075A);
+ body.emit(assign(r0744, bit_or(r0744, r075B), 0x01));
+
+
+ body.instructions = f0749_parent_instructions;
+ body.emit(f0749);
+
+ /* END IF */
+
+ body.emit(assign(r071E, r0746, 0x01));
+
+ body.emit(assign(r071F, r0745, 0x01));
+
+ body.emit(assign(r0720, r0744, 0x01));
+
+
+ body.instructions = f0738_parent_instructions;
+ body.emit(f0738);
+
+ /* END IF */
+
+ body.emit(assign(r071D, sub(r071D, r0721), 0x01));
+
+ ir_variable *const r075C = body.make_temp(glsl_type::int_type, "zExp");
+ body.emit(assign(r075C, r071D, 0x01));
+
+ ir_variable *const r075D = body.make_temp(glsl_type::uint_type, "zFrac0");
+ body.emit(assign(r075D, r071E, 0x01));
+
+ ir_variable *const r075E = body.make_temp(glsl_type::uint_type, "zFrac1");
+ body.emit(assign(r075E, r071F, 0x01));
+
+ ir_variable *const r075F = body.make_temp(glsl_type::uint_type, "zFrac2");
+ body.emit(assign(r075F, r0720, 0x01));
+
+ ir_variable *const r0760 = body.make_temp(glsl_type::bool_type, "execute_flag");
+ body.emit(assign(r0760, body.constant(true), 0x01));
+
+ ir_variable *const r0761 = body.make_temp(glsl_type::uvec2_type, "return_value");
+ ir_variable *const r0762 = new(mem_ctx) ir_variable(glsl_type::bool_type, "increment", ir_var_auto);
+ body.emit(r0762);
+ ir_expression *const r0763 = expr(ir_unop_u2i, r0720);
+ body.emit(assign(r0762, less(r0763, body.constant(int(0))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0765 = lequal(body.constant(int(2045)), r071D);
+ ir_if *f0764 = new(mem_ctx) ir_if(operand(r0765).val);
+ exec_list *const f0764_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0764->then_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0767 = less(body.constant(int(2045)), r071D);
+ ir_expression *const r0768 = equal(r071D, body.constant(int(2045)));
+ ir_expression *const r0769 = equal(body.constant(2097151u), r071E);
+ ir_expression *const r076A = equal(body.constant(4294967295u), r071F);
+ ir_expression *const r076B = logic_and(r0769, r076A);
+ ir_expression *const r076C = logic_and(r0768, r076B);
+ ir_expression *const r076D = logic_and(r076C, r0762);
+ ir_expression *const r076E = logic_or(r0767, r076D);
+ ir_if *f0766 = new(mem_ctx) ir_if(operand(r076E).val);
+ exec_list *const f0766_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0766->then_instructions;
+
+ ir_variable *const r076F = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r076F);
+ ir_expression *const r0770 = lshift(r0218, body.constant(int(31)));
+ body.emit(assign(r076F, add(r0770, body.constant(2146435072u)), 0x02));
+
+ body.emit(assign(r076F, body.constant(0u), 0x01));
+
+ body.emit(assign(r0761, r076F, 0x03));
+
+ body.emit(assign(r0760, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0766->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0772 = less(r071D, body.constant(int(0)));
+ ir_if *f0771 = new(mem_ctx) ir_if(operand(r0772).val);
+ exec_list *const f0771_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0771->then_instructions;
+
+ ir_variable *const r0773 = body.make_temp(glsl_type::uint_type, "a2");
+ body.emit(assign(r0773, r0720, 0x01));
+
+ ir_variable *const r0774 = body.make_temp(glsl_type::int_type, "count");
+ body.emit(assign(r0774, neg(r071D), 0x01));
+
+ ir_variable *const r0775 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z2", ir_var_auto);
+ body.emit(r0775);
+ ir_variable *const r0776 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z1", ir_var_auto);
+ body.emit(r0776);
+ ir_variable *const r0777 = new(mem_ctx) ir_variable(glsl_type::uint_type, "z0", ir_var_auto);
+ body.emit(r0777);
+ ir_variable *const r0778 = body.make_temp(glsl_type::int_type, "assignment_tmp");
+ ir_expression *const r0779 = neg(r0774);
+ body.emit(assign(r0778, bit_and(r0779, body.constant(int(31))), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r077B = equal(r0774, body.constant(int(0)));
+ ir_if *f077A = new(mem_ctx) ir_if(operand(r077B).val);
+ exec_list *const f077A_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f077A->then_instructions;
+
+ body.emit(assign(r0775, r0720, 0x01));
+
+ body.emit(assign(r0776, r071F, 0x01));
+
+ body.emit(assign(r0777, r071E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f077A->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r077D = less(r0774, body.constant(int(32)));
+ ir_if *f077C = new(mem_ctx) ir_if(operand(r077D).val);
+ exec_list *const f077C_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f077C->then_instructions;
+
+ body.emit(assign(r0775, lshift(r071F, r0778), 0x01));
+
+ ir_expression *const r077E = lshift(r071E, r0778);
+ ir_expression *const r077F = rshift(r071F, r0774);
+ body.emit(assign(r0776, bit_or(r077E, r077F), 0x01));
+
+ body.emit(assign(r0777, rshift(r071E, r0774), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f077C->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r0781 = equal(r0774, body.constant(int(32)));
+ ir_if *f0780 = new(mem_ctx) ir_if(operand(r0781).val);
+ exec_list *const f0780_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0780->then_instructions;
+
+ body.emit(assign(r0775, r071F, 0x01));
+
+ body.emit(assign(r0776, r071E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0780->else_instructions;
+
+ body.emit(assign(r0773, bit_or(r0720, r071F), 0x01));
+
+ /* IF CONDITION */
+ ir_expression *const r0783 = less(r0774, body.constant(int(64)));
+ ir_if *f0782 = new(mem_ctx) ir_if(operand(r0783).val);
+ exec_list *const f0782_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0782->then_instructions;
+
+ body.emit(assign(r0775, lshift(r071E, r0778), 0x01));
+
+ ir_expression *const r0784 = bit_and(r0774, body.constant(int(31)));
+ body.emit(assign(r0776, rshift(r071E, r0784), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0782->else_instructions;
+
+ ir_variable *const r0785 = body.make_temp(glsl_type::uint_type, "conditional_tmp");
+ /* IF CONDITION */
+ ir_expression *const r0787 = equal(r0774, body.constant(int(64)));
+ ir_if *f0786 = new(mem_ctx) ir_if(operand(r0787).val);
+ exec_list *const f0786_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0786->then_instructions;
+
+ body.emit(assign(r0785, r071E, 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0786->else_instructions;
+
+ ir_expression *const r0788 = nequal(r071E, body.constant(0u));
+ ir_expression *const r0789 = expr(ir_unop_b2i, r0788);
+ body.emit(assign(r0785, expr(ir_unop_i2u, r0789), 0x01));
+
+
+ body.instructions = f0786_parent_instructions;
+ body.emit(f0786);
+
+ /* END IF */
+
+ body.emit(assign(r0775, r0785, 0x01));
+
+ body.emit(assign(r0776, body.constant(0u), 0x01));
+
+
+ body.instructions = f0782_parent_instructions;
+ body.emit(f0782);
+
+ /* END IF */
+
+
+ body.instructions = f0780_parent_instructions;
+ body.emit(f0780);
+
+ /* END IF */
+
+ body.emit(assign(r0777, body.constant(0u), 0x01));
+
+
+ body.instructions = f077C_parent_instructions;
+ body.emit(f077C);
+
+ /* END IF */
+
+ ir_expression *const r078A = nequal(r0773, body.constant(0u));
+ ir_expression *const r078B = expr(ir_unop_b2i, r078A);
+ ir_expression *const r078C = expr(ir_unop_i2u, r078B);
+ body.emit(assign(r0775, bit_or(r0775, r078C), 0x01));
+
+
+ body.instructions = f077A_parent_instructions;
+ body.emit(f077A);
+
+ /* END IF */
+
+ body.emit(assign(r075D, r0777, 0x01));
+
+ body.emit(assign(r075E, r0776, 0x01));
+
+ body.emit(assign(r075F, r0775, 0x01));
+
+ body.emit(assign(r075C, body.constant(int(0)), 0x01));
+
+ body.emit(assign(r0762, less(r0775, body.constant(0u)), 0x01));
+
+
+ body.instructions = f0771_parent_instructions;
+ body.emit(f0771);
+
+ /* END IF */
+
+
+ body.instructions = f0766_parent_instructions;
+ body.emit(f0766);
+
+ /* END IF */
+
+
+ body.instructions = f0764_parent_instructions;
+ body.emit(f0764);
+
+ /* END IF */
+
+ /* IF CONDITION */
+ ir_if *f078D = new(mem_ctx) ir_if(operand(r0760).val);
+ exec_list *const f078D_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f078D->then_instructions;
+
+ /* IF CONDITION */
+ ir_if *f078E = new(mem_ctx) ir_if(operand(r0762).val);
+ exec_list *const f078E_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f078E->then_instructions;
+
+ ir_variable *const r078F = body.make_temp(glsl_type::uint_type, "assignment_tmp");
+ body.emit(assign(r078F, add(r075E, body.constant(1u)), 0x01));
+
+ ir_expression *const r0790 = less(r078F, r075E);
+ ir_expression *const r0791 = expr(ir_unop_b2i, r0790);
+ ir_expression *const r0792 = expr(ir_unop_i2u, r0791);
+ body.emit(assign(r075D, add(r075D, r0792), 0x01));
+
+ ir_expression *const r0793 = equal(r075F, body.constant(0u));
+ ir_expression *const r0794 = expr(ir_unop_b2i, r0793);
+ ir_expression *const r0795 = expr(ir_unop_i2u, r0794);
+ ir_expression *const r0796 = add(r075F, r0795);
+ ir_expression *const r0797 = bit_and(r0796, body.constant(1u));
+ ir_expression *const r0798 = expr(ir_unop_bit_not, r0797);
+ body.emit(assign(r075E, bit_and(r078F, r0798), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f078E->else_instructions;
+
+ /* IF CONDITION */
+ ir_expression *const r079A = bit_or(r075D, r075E);
+ ir_expression *const r079B = equal(r079A, body.constant(0u));
+ ir_if *f0799 = new(mem_ctx) ir_if(operand(r079B).val);
+ exec_list *const f0799_parent_instructions = body.instructions;
+
+ /* THEN INSTRUCTIONS */
+ body.instructions = &f0799->then_instructions;
+
+ body.emit(assign(r075C, body.constant(int(0)), 0x01));
+
+
+ body.instructions = f0799_parent_instructions;
+ body.emit(f0799);
+
+ /* END IF */
+
+
+ body.instructions = f078E_parent_instructions;
+ body.emit(f078E);
+
+ /* END IF */
+
+ ir_variable *const r079C = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r079C);
+ ir_expression *const r079D = lshift(r0218, body.constant(int(31)));
+ ir_expression *const r079E = expr(ir_unop_i2u, r075C);
+ ir_expression *const r079F = lshift(r079E, body.constant(int(20)));
+ ir_expression *const r07A0 = add(r079D, r079F);
+ body.emit(assign(r079C, add(r07A0, r075D), 0x02));
+
+ body.emit(assign(r079C, r075E, 0x01));
+
+ body.emit(assign(r0761, r079C, 0x03));
+
+ body.emit(assign(r0760, body.constant(false), 0x01));
+
+
+ body.instructions = f078D_parent_instructions;
+ body.emit(f078D);
+
+ /* END IF */
+
+ body.emit(assign(r0217, r0761, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ /* ELSE INSTRUCTIONS */
+ body.instructions = &f0715->else_instructions;
+
+ ir_variable *const r07A1 = new(mem_ctx) ir_variable(glsl_type::uvec2_type, "z", ir_var_auto);
+ body.emit(r07A1);
+ body.emit(assign(r07A1, body.constant(0u), 0x02));
+
+ body.emit(assign(r07A1, body.constant(0u), 0x01));
+
+ body.emit(assign(r0217, r07A1, 0x03));
+
+ body.emit(assign(r0216, body.constant(false), 0x01));
+
+
+ body.instructions = f0715_parent_instructions;
+ body.emit(f0715);
+
+ /* END IF */
+
+
+ body.instructions = f0689_parent_instructions;
+ body.emit(f0689);
+
+ /* END IF */
+
+
+ body.instructions = f05FD_parent_instructions;
+ body.emit(f05FD);
+
+ /* END IF */
+
+
+ body.instructions = f0571_parent_instructions;
+ body.emit(f0571);
+
+ /* END IF */
+
+
+ body.instructions = f0553_parent_instructions;
+ body.emit(f0553);
+
+ /* END IF */
+
+
+ body.instructions = f0488_parent_instructions;
+ body.emit(f0488);
+
+ /* END IF */
+
+
+ body.instructions = f03C1_parent_instructions;
+ body.emit(f03C1);
+
+ /* END IF */
+
+
+ body.instructions = f021B_parent_instructions;
+ body.emit(f021B);
+
+ /* END IF */
+
+ body.emit(ret(r0217));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
diff --git a/src/compiler/glsl/builtin_functions.cpp b/src/compiler/glsl/builtin_functions.cpp
index 8bff322bdd..9ad7617d78 100644
--- a/src/compiler/glsl/builtin_functions.cpp
+++ b/src/compiler/glsl/builtin_functions.cpp
@@ -3348,6 +3348,10 @@ builtin_builder::create_builtins()
generate_ir::flt64(mem_ctx, integer_functions_supported),
NULL);
+ add_function("__builtin_fadd64",
+ generate_ir::fadd64(mem_ctx, integer_functions_supported),
+ NULL);
+
#undef F
#undef FI
#undef FIUD_VEC
diff --git a/src/compiler/glsl/builtin_functions.h b/src/compiler/glsl/builtin_functions.h
index 1e3ecddbd9..0b9871bf56 100644
--- a/src/compiler/glsl/builtin_functions.h
+++ b/src/compiler/glsl/builtin_functions.h
@@ -85,6 +85,9 @@ fle64(void *mem_ctx, builtin_available_predicate avail);
ir_function_signature *
flt64(void *mem_ctx, builtin_available_predicate avail);
+ir_function_signature *
+fadd64(void *mem_ctx, builtin_available_predicate avail);
+
}
#endif /* BULITIN_FUNCTIONS_H */
diff --git a/src/compiler/glsl/float64.glsl b/src/compiler/glsl/float64.glsl
index 44a96da0db..da7630589d 100644
--- a/src/compiler/glsl/float64.glsl
+++ b/src/compiler/glsl/float64.glsl
@@ -201,3 +201,486 @@ flt64(uvec2 a, uvec2 b)
return (aSign != 0u) ? lt64(b.y, b.x, a.y, a.x)
: lt64(a.y, a.x, b.y, b.x);
}
+
+/* Adds the 64-bit value formed by concatenating `a0' and `a1' to the 64-bit
+ * value formed by concatenating `b0' and `b1'. Addition is modulo 2^64, so
+ * any carry out is lost. The result is broken into two 32-bit pieces which
+ * are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
+ */
+void
+add64(uint a0, uint a1, uint b0, uint b1,
+ inout uint z0Ptr,
+ inout uint z1Ptr)
+{
+ uint z1 = a1 + b1;
+ z1Ptr = z1;
+ z0Ptr = a0 + b0 + uint(z1 < a1);
+}
+
+
+/* Subtracts the 64-bit value formed by concatenating `b0' and `b1' from the
+ * 64-bit value formed by concatenating `a0' and `a1'. Subtraction is modulo
+ * 2^64, so any borrow out (carry out) is lost. The result is broken into two
+ * 32-bit pieces which are stored at the locations pointed to by `z0Ptr' and
+ * `z1Ptr'.
+ */
+void
+sub64(uint a0, uint a1, uint b0, uint b1,
+ inout uint z0Ptr,
+ inout uint z1Ptr)
+{
+ z1Ptr = a1 - b1;
+ z0Ptr = a0 - b0 - uint(a1 < b1);
+}
+
+/* Shifts the 64-bit value formed by concatenating `a0' and `a1' right by the
+ * number of bits given in `count'. If any nonzero bits are shifted off, they
+ * are "jammed" into the least significant bit of the result by setting the
+ * least significant bit to 1. The value of `count' can be arbitrarily large;
+ * in particular, if `count' is greater than 64, the result will be either 0
+ * or 1, depending on whether the concatenation of `a0' and `a1' is zero or
+ * nonzero. The result is broken into two 32-bit pieces which are stored at
+ * the locations pointed to by `z0Ptr' and `z1Ptr'.
+ */
+void
+shift64RightJamming(uint a0,
+ uint a1,
+ int count,
+ inout uint z0Ptr,
+ inout uint z1Ptr)
+{
+ uint z0;
+ uint z1;
+ int negCount = (-count) & 31;
+
+ if (count == 0) {
+ z1 = a1;
+ z0 = a0;
+ } else if (count < 32) {
+ z1 = (a0<<negCount) | (a1>>count) | uint ((a1<<negCount) != 0u);
+ z0 = a0>>count;
+ } else {
+ if (count == 32) {
+ z1 = a0 | uint(a1 != 0u);
+ } else if (count < 64) {
+ z1 = (a0>>(count & 31)) | uint(((a0<<negCount) | a1) != 0u);
+ } else {
+ z1 = uint((a0 | a1) != 0u);
+ }
+ z0 = 0u;
+ }
+ z1Ptr = z1;
+ z0Ptr = z0;
+}
+
+/* Shifts the 96-bit value formed by concatenating `a0', `a1', and `a2' right
+ * by 32 _plus_ the number of bits given in `count'. The shifted result is
+ * at most 64 nonzero bits; these are broken into two 32-bit pieces which are
+ * stored at the locations pointed to by `z0Ptr' and `z1Ptr'. The bits shifted
+ * off form a third 32-bit result as follows: The _last_ bit shifted off is
+ * the most-significant bit of the extra result, and the other 31 bits of the
+ * extra result are all zero if and only if _all_but_the_last_ bits shifted off
+ * were all zero. This extra result is stored in the location pointed to by
+ * `z2Ptr'. The value of `count' can be arbitrarily large.
+ * (This routine makes more sense if `a0', `a1', and `a2' are considered
+ * to form a fixed-point value with binary point between `a1' and `a2'. This
+ * fixed-point value is shifted right by the number of bits given in `count',
+ * and the integer part of the result is returned at the locations pointed to
+ * by `z0Ptr' and `z1Ptr'. The fractional part of the result may be slightly
+ * corrupted as described above, and is returned at the location pointed to by
+ * `z2Ptr'.)
+ */
+void
+shift64ExtraRightJamming(uint a0, uint a1, uint a2,
+ int count,
+ inout uint z0Ptr,
+ inout uint z1Ptr,
+ inout uint z2Ptr)
+{
+ uint z0;
+ uint z1;
+ uint z2;
+ int negCount = (-count) & 31;
+
+ if (count == 0) {
+ z2 = a2;
+ z1 = a1;
+ z0 = a0;
+ } else {
+ if (count < 32) {
+ z2 = a1<<negCount;
+ z1 = (a0<<negCount) | (a1>>count);
+ z0 = a0>>count;
+ } else {
+ if (count == 32) {
+ z2 = a1;
+ z1 = a0;
+ } else {
+ a2 |= a1;
+ if (count < 64) {
+ z2 = a0<<negCount;
+ z1 = a0>>(count & 31);
+ } else {
+ z2 = (count == 64) ? a0 : uint(a0 != 0u);
+ z1 = 0u;
+ }
+ }
+ z0 = 0u;
+ }
+ z2 |= uint(a2 != 0u);
+ }
+ z2Ptr = z2;
+ z1Ptr = z1;
+ z0Ptr = z0;
+}
+
+/* Shifts the 64-bit value formed by concatenating `a0' and `a1' left by the
+ * number of bits given in `count'. Any bits shifted off are lost. The value
+ * of `count' must be less than 32. The result is broken into two 32-bit
+ * pieces which are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.
+ */
+void
+shortShift64Left(uint a0, uint a1,
+ int count,
+ inout uint z0Ptr, inout uint z1Ptr)
+{
+ z1Ptr = a1<<count;
+ z0Ptr = (count == 0) ? a0 : (a0<<count) | (a1>>((-count) & 31));
+}
+
+/* Packs the sign `zSign', the exponent `zExp', and the significand formed by
+ * the concatenation of `zFrac0' and `zFrac1' into a double-precision floating-
+ * point value, returning the result. After being shifted into the proper
+ * positions, the three fields `zSign', `zExp', and `zFrac0' are simply added
+ * together to form the most significant 32 bits of the result. This means
+ * that any integer portion of `zFrac0' will be added into the exponent. Since
+ * a properly normalized significand will have an integer portion equal to 1,
+ * the `zExp' input should be 1 less than the desired result exponent whenever
+ * `zFrac0' and `zFrac1' concatenated form a complete, normalized significand.
+ */
+uvec2
+packFloat64(uint zSign, int zExp, uint zFrac0, uint zFrac1)
+{
+ uvec2 z;
+
+ z.y = (zSign<<31) + (uint(zExp)<<20) + zFrac0;
+ z.x = zFrac1;
+ return z;
+}
+
+/* Takes an abstract floating-point value having sign `zSign', exponent `zExp',
+ * and extended significand formed by the concatenation of `zFrac0', `zFrac1',
+ * and `zFrac2', and returns the proper double-precision floating-point value
+ * corresponding to the abstract input. Ordinarily, the abstract value is
+ * simply rounded and packed into the double-precision format, with the inexact
+ * exception raised if the abstract input cannot be represented exactly.
+ * However, if the abstract value is too large, the overflow and inexact
+ * exceptions are raised and an infinity or maximal finite value is returned.
+ * If the abstract value is too small, the input value is rounded to a
+ * subnormal number, and the underflow and inexact exceptions are raised if the
+ * abstract input cannot be represented exactly as a subnormal double-precision
+ * floating-point number.
+ * The input significand must be normalized or smaller. If the input
+ * significand is not normalized, `zExp' must be 0; in that case, the result
+ * returned is a subnormal number, and it must not require rounding. In the
+ * usual case that the input significand is normalized, `zExp' must be 1 less
+ * than the "true" floating-point exponent. The handling of underflow and
+ * overflow follows the IEEE Standard for Floating-Point Arithmetic.
+ */
+uvec2
+roundAndPackFloat64(uint zSign,
+ int zExp,
+ uint zFrac0,
+ uint zFrac1,
+ uint zFrac2)
+{
+ bool roundNearestEven;
+ bool increment;
+
+ roundNearestEven = FLOAT_ROUNDING_MODE == FLOAT_ROUND_NEAREST_EVEN;
+ increment = int(zFrac2) < 0;
+ if (!roundNearestEven) {
+ if (FLOAT_ROUNDING_MODE == FLOAT_ROUND_TO_ZERO) {
+ increment = false;
+ } else {
+ if (zSign != 0u) {
+ increment = (FLOAT_ROUNDING_MODE == FLOAT_ROUND_DOWN) &&
+ (zFrac2 != 0u);
+ } else {
+ increment = (FLOAT_ROUNDING_MODE == FLOAT_ROUND_UP) &&
+ (zFrac2 != 0u);
+ }
+ }
+ }
+ if (0x7FD <= zExp) {
+ if ((0x7FD < zExp) ||
+ ((zExp == 0x7FD) &&
+ (0x001FFFFFu == zFrac0 && 0xFFFFFFFFu == zFrac1) &&
+ increment)) {
+ if ((FLOAT_ROUNDING_MODE == FLOAT_ROUND_TO_ZERO) ||
+ ((zSign != 0u) && (FLOAT_ROUNDING_MODE == FLOAT_ROUND_UP)) ||
+ ((zSign == 0u) && (FLOAT_ROUNDING_MODE == FLOAT_ROUND_DOWN))) {
+ return packFloat64(zSign, 0x7FE, 0x000FFFFFu, 0xFFFFFFFFu);
+ }
+ return packFloat64(zSign, 0x7FF, 0u, 0u);
+ }
+ if (zExp < 0) {
+ shift64ExtraRightJamming(
+ zFrac0, zFrac1, zFrac2, -zExp, zFrac0, zFrac1, zFrac2);
+ zExp = 0;
+ if (roundNearestEven) {
+ increment = zFrac2 < 0u;
+ } else {
+ if (zSign != 0u) {
+ increment = (FLOAT_ROUNDING_MODE == FLOAT_ROUND_DOWN) &&
+ (zFrac2 != 0u);
+ } else {
+ increment = (FLOAT_ROUNDING_MODE == FLOAT_ROUND_UP) &&
+ (zFrac2 != 0u);
+ }
+ }
+ }
+ }
+ if (increment) {
+ add64(zFrac0, zFrac1, 0u, 1u, zFrac0, zFrac1);
+ zFrac1 &= ~((zFrac2 + uint(zFrac2 == 0u)) & uint(roundNearestEven));
+ } else {
+ if ((zFrac0 | zFrac1) == 0u)
+ zExp = 0;
+ }
+ return packFloat64(zSign, zExp, zFrac0, zFrac1);
+}
+
+/* Returns the number of leading 0 bits before the most-significant 1 bit of
+ * `a'. If `a' is zero, 32 is returned.
+ */
+int
+countLeadingZeros32(uint a)
+{
+ if (a == 0u)
+ return 32;
+
+ int shiftCount = 0;
+ if ((a & 0xFFFF0000u) == 0u) {shiftCount += 16; a <<= 16;}
+ if ((a & 0xFF000000u) == 0u) {shiftCount += 8; a <<= 8;}
+ if ((a & 0xF0000000u) == 0u) {shiftCount += 4; a <<= 4;}
+ if ((a & 0xC0000000u) == 0u) {shiftCount += 2; a <<= 2;}
+ if ((a & 0x80000000u) == 0u) {shiftCount += 1;}
+
+ return shiftCount;
+}
+
+/* Takes an abstract floating-point value having sign `zSign', exponent `zExp',
+ * and significand formed by the concatenation of `zSig0' and `zSig1', and
+ * returns the proper double-precision floating-point value corresponding
+ * to the abstract input. This routine is just like `roundAndPackFloat64'
+ * except that the input significand has fewer bits and does not have to be
+ * normalized. In all cases, `zExp' must be 1 less than the "true" floating-
+ * point exponent.
+ */
+uvec2
+normalizeRoundAndPackFloat64(uint zSign,
+ int zExp,
+ uint zFrac0,
+ uint zFrac1)
+{
+ int shiftCount;
+ uint zFrac2;
+
+ if (zFrac0 == 0u) {
+ zFrac0 = zFrac1;
+ zFrac1 = 0u;
+ zExp -= 32;
+ }
+ shiftCount = countLeadingZeros32(zFrac0) - 11;
+ if (0 <= shiftCount) {
+ zFrac2 = 0u;
+ shortShift64Left(zFrac0, zFrac1, shiftCount, zFrac0, zFrac1);
+ } else {
+ shift64ExtraRightJamming(
+ zFrac0, zFrac1, 0u, -shiftCount, zFrac0, zFrac1, zFrac2);
+ }
+ zExp -= shiftCount;
+ return roundAndPackFloat64(zSign, zExp, zFrac0, zFrac1, zFrac2);
+}
+
+/* Takes two double-precision floating-point values `a' and `b', one of which
+ * is a NaN, and returns the appropriate NaN result.
+ */
+uvec2
+propagateFloat64NaN(uvec2 a, uvec2 b)
+{
+ bool aIsNaN = is_nan(a);
+ bool bIsNaN = is_nan(b);
+ a.y |= 0x00080000u;
+ b.y |= 0x00080000u;
+ if (aIsNaN)
+ return (bIsNaN) ? b : a;
+ else
+ return b;
+}
+
+/* Returns the result of adding the double-precision floating-point values
+ * `a' and `b'. The operation is performed according to the IEEE Standard for
+ * Floating-Point Arithmetic.
+ */
+uvec2
+fadd64(uvec2 a, uvec2 b)
+{
+ uint aSign = extractFloat64Sign(a);
+ uint bSign = extractFloat64Sign(b);
+
+ if (aSign == bSign) {
+ uint zFrac0 = 0u;
+ uint zFrac1 = 0u;
+ uint zFrac2 = 0u;
+ int zExp;
+
+ uint aFracLo = extractFloat64FracLo(a);
+ uint aFracHi = extractFloat64FracHi(a);
+ uint bFracLo = extractFloat64FracLo(b);
+ uint bFracHi = extractFloat64FracHi(b);
+ int aExp = extractFloat64Exp(a);
+ int bExp = extractFloat64Exp(b);
+ int expDiff = aExp - bExp;
+ if (0 < expDiff) {
+ if (aExp == 0x7FF) {
+ if ((aFracHi | aFracLo) != 0u)
+ return propagateFloat64NaN(a, b);
+ return a;
+ }
+ if (bExp == 0)
+ --expDiff;
+ else
+ bFracHi |= 0x00100000u;
+ shift64ExtraRightJamming(
+ bFracHi, bFracLo, 0u, expDiff, bFracHi, bFracLo, zFrac2);
+ zExp = aExp;
+ } else if (expDiff < 0) {
+ if (bExp == 0x7FF) {
+ if ((bFracHi | bFracLo) != 0u)
+ return propagateFloat64NaN(a, b);
+ return packFloat64(aSign, 0x7FF, 0u, 0u);
+ }
+ if (aExp == 0)
+ ++expDiff;
+ else
+ aFracHi |= 0x00100000u;
+ shift64ExtraRightJamming(
+ aFracHi, aFracLo, 0u, - expDiff, aFracHi, aFracLo, zFrac2);
+ zExp = bExp;
+ } else {
+ if (aExp == 0x7FF) {
+ if ((aFracHi | aFracLo | bFracHi | bFracLo) != 0u)
+ return propagateFloat64NaN(a, b);
+ return a;
+ }
+ add64(aFracHi, aFracLo, bFracHi, bFracLo, zFrac0, zFrac1);
+ if (aExp == 0)
+ return packFloat64(aSign, 0, zFrac0, zFrac1);
+ zFrac2 = 0u;
+ zFrac0 |= 0x00200000u;
+ zExp = aExp;
+ shift64ExtraRightJamming(
+ zFrac0, zFrac1, zFrac2, 1, zFrac0, zFrac1, zFrac2);
+ return roundAndPackFloat64(aSign, zExp, zFrac0, zFrac1, zFrac2);
+ }
+ aFracHi |= 0x00100000u;
+ add64(aFracHi, aFracLo, bFracHi, bFracLo, zFrac0, zFrac1);
+ --zExp;
+ if (zFrac0 < 0x00200000u)
+ return roundAndPackFloat64(aSign, zExp, zFrac0, zFrac1, zFrac2);
+ ++zExp;
+ shift64ExtraRightJamming(zFrac0, zFrac1, zFrac2, 1, zFrac0, zFrac1, zFrac2);
+ return roundAndPackFloat64(aSign, zExp, zFrac0, zFrac1, zFrac2);
+
+ } else {
+ uvec2 z;
+ int zExp;
+ uint zFrac0 = 0u;
+ uint zFrac1 = 0u;
+
+ uint aFracLo = extractFloat64FracLo(a);
+ uint aFracHi = extractFloat64FracHi(a);
+ uint bFracLo = extractFloat64FracLo(b);
+ uint bFracHi = extractFloat64FracHi(b);
+ int aExp = extractFloat64Exp(a);
+ int bExp = extractFloat64Exp(b);
+ int expDiff = aExp - bExp;
+ shortShift64Left(aFracHi, aFracLo, 10, aFracHi, aFracLo);
+ shortShift64Left(bFracHi, bFracLo, 10, bFracHi, bFracLo);
+ if (0 < expDiff) {
+ if (aExp == 0x7FF) {
+ if ((aFracHi | aFracLo) != 0u) {
+ return propagateFloat64NaN(a, b);
+ }
+ return a;
+ }
+ if (bExp == 0)
+ --expDiff;
+ else
+ bFracHi |= 0x40000000u;
+ shift64RightJamming(bFracHi, bFracLo, expDiff, bFracHi, bFracLo);
+ aFracHi |= 0x40000000u;
+ sub64(aFracHi, aFracLo, bFracHi, bFracLo, zFrac0, zFrac1);
+ zExp = aExp;
+ --zExp;
+ return normalizeRoundAndPackFloat64(aSign, zExp - 10, zFrac0, zFrac1);
+ }
+ if (expDiff < 0) {
+ if (bExp == 0x7FF) {
+ if ((bFracHi | bFracLo) != 0u)
+ return propagateFloat64NaN(a, b);
+ return packFloat64(aSign ^ 1u, 0x7FF, 0u, 0u);
+ }
+ if (aExp == 0)
+ ++expDiff;
+ else
+ aFracHi |= 0x40000000u;
+ shift64RightJamming(aFracHi, aFracLo, - expDiff, aFracHi, aFracLo);
+ bFracHi |= 0x40000000u;
+ sub64(bFracHi, bFracLo, aFracHi, aFracLo, zFrac0, zFrac1);
+ zExp = bExp;
+ aSign ^= 1u;
+ --zExp;
+ return normalizeRoundAndPackFloat64(aSign, zExp - 10, zFrac0, zFrac1);
+ }
+ if (aExp == 0x7FF) {
+ if ((aFracHi | aFracLo | bFracHi | bFracLo) != 0u)
+ return propagateFloat64NaN(a, b);
+ return uvec2(0xFFFFFFFFu, 0xFFFFFFFFu);
+ }
+ if (aExp == 0) {
+ aExp = 1;
+ bExp = 1;
+ }
+ if (bFracHi < aFracHi) {
+ sub64(aFracHi, aFracLo, bFracHi, bFracLo, zFrac0, zFrac1);
+ zExp = aExp;
+ --zExp;
+ return normalizeRoundAndPackFloat64(aSign, zExp - 10, zFrac0, zFrac1);
+ }
+ if (aFracHi < bFracHi) {
+ sub64(bFracHi, bFracLo, aFracHi, aFracLo, zFrac0, zFrac1);
+ zExp = bExp;
+ aSign ^= 1u;
+ --zExp;
+ return normalizeRoundAndPackFloat64(aSign, zExp - 10, zFrac0, zFrac1);
+ }
+ if (bFracLo < aFracLo) {
+ sub64(aFracHi, aFracLo, bFracHi, bFracLo, zFrac0, zFrac1);
+ zExp = aExp;
+ --zExp;
+ return normalizeRoundAndPackFloat64(aSign, zExp - 10, zFrac0, zFrac1);
+ }
+ if (aFracLo < bFracLo) {
+ sub64(bFracHi, bFracLo, aFracHi, aFracLo, zFrac0, zFrac1);
+ zExp = bExp;
+ aSign ^= 1u;
+ --zExp;
+ return normalizeRoundAndPackFloat64(aSign, zExp - 10, zFrac0, zFrac1);
+ }
+ return packFloat64(
+ uint(FLOAT_ROUNDING_MODE == FLOAT_ROUND_DOWN), 0, 0u, 0u);
+ }
+}
diff --git a/src/compiler/glsl/glcpp/glcpp-parse.y b/src/compiler/glsl/glcpp/glcpp-parse.y
index c0efe33215..c9a5a03a56 100644
--- a/src/compiler/glsl/glcpp/glcpp-parse.y
+++ b/src/compiler/glsl/glcpp/glcpp-parse.y
@@ -2455,6 +2455,7 @@ _glcpp_parser_handle_version_declaration(glcpp_parser_t *parser, intmax_t versio
add_builtin_define(parser, "__have_builtin_builtin_feq64", 1);
add_builtin_define(parser, "__have_builtin_builtin_fle64", 1);
add_builtin_define(parser, "__have_builtin_builtin_flt64", 1);
+ add_builtin_define(parser, "__have_builtin_builtin_fadd64", 1);
}
}
--
2.14.1
More information about the mesa-dev
mailing list