[Mesa-dev] [PATCH 21/47] i965/fs: Enable rounding mode on f2f16 ops
Alejandro Piñeiro
apinheiro at igalia.com
Thu Aug 24 13:54:36 UTC 2017
By default we don't set the rounding mode. We only set
round-to-near-even or round-to-zero mode if explicitly set from nir.
Signed-off-by: Jose Maria Casanova Crespo <jmcasanova at igalia.com>
Signed-off-by: Alejandro Piñeiro <apinheiro at igalia.com>
---
src/intel/compiler/brw_fs_nir.cpp | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index ca560d0aab8..0e7738761c1 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -715,6 +715,14 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
inst->saturate = instr->dest.saturate;
break;
+ case nir_op_f2f16_rtne:
+ case nir_op_f2f16_rtz:
+ if (instr->op == nir_op_f2f16_rtz)
+ bld.emit(SHADER_OPCODE_RND_MODE_RTZ);
+ else if (instr->op == nir_op_f2f16_rtne)
+ bld.emit(SHADER_OPCODE_RND_MODE_RTE);
+ /* fallthrough */
+
case nir_op_f2f16:
/* In theory, it would be better to use BRW_OPCODE_F32TO16. Depending
* on the HW gen, it is a special hw opcode or just a MOV, and
--
2.11.0
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