[Mesa-dev] [PATCH 06/13] i965: Add functions to abstract access to 3src register types
Matt Turner
mattst88 at gmail.com
Sat Aug 26 01:25:36 UTC 2017
---
src/intel/compiler/brw_eu_emit.c | 22 ++--------------------
src/intel/compiler/brw_inst.h | 21 +++++++++++++++++++++
2 files changed, 23 insertions(+), 20 deletions(-)
diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index e4fcbe908d..f1a2283de8 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -814,26 +814,8 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest,
* may send us mixed D and UD types and want us to ignore that and use
* the destination type.
*/
- switch (dest.type) {
- case BRW_REGISTER_TYPE_F:
- brw_inst_set_3src_a16_src_hw_type(devinfo, inst, BRW_3SRC_TYPE_F);
- brw_inst_set_3src_a16_dst_hw_type(devinfo, inst, BRW_3SRC_TYPE_F);
- break;
- case BRW_REGISTER_TYPE_DF:
- brw_inst_set_3src_a16_src_hw_type(devinfo, inst, BRW_3SRC_TYPE_DF);
- brw_inst_set_3src_a16_dst_hw_type(devinfo, inst, BRW_3SRC_TYPE_DF);
- break;
- case BRW_REGISTER_TYPE_D:
- brw_inst_set_3src_a16_src_hw_type(devinfo, inst, BRW_3SRC_TYPE_D);
- brw_inst_set_3src_a16_dst_hw_type(devinfo, inst, BRW_3SRC_TYPE_D);
- break;
- case BRW_REGISTER_TYPE_UD:
- brw_inst_set_3src_a16_src_hw_type(devinfo, inst, BRW_3SRC_TYPE_UD);
- brw_inst_set_3src_a16_dst_hw_type(devinfo, inst, BRW_3SRC_TYPE_UD);
- break;
- default:
- unreachable("not reached");
- }
+ brw_inst_set_3src_a16_src_type(devinfo, inst, dest.type);
+ brw_inst_set_3src_a16_dst_type(devinfo, inst, dest.type);
}
return inst;
diff --git a/src/intel/compiler/brw_inst.h b/src/intel/compiler/brw_inst.h
index e0bc2c1ceb..0cc1a3e911 100644
--- a/src/intel/compiler/brw_inst.h
+++ b/src/intel/compiler/brw_inst.h
@@ -246,6 +246,27 @@ F(3src_access_mode, 8, 8)
F(3src_opcode, 6, 0)
/** @} */
+#define REG_TYPE(reg) \
+static inline void \
+brw_inst_set_3src_a16_##reg##_type(const struct gen_device_info *devinfo, \
+ brw_inst *inst, enum brw_reg_type type) \
+{ \
+ unsigned hw_type = brw_reg_type_to_hw_3src_type(devinfo, type); \
+ brw_inst_set_3src_a16_##reg##_hw_type(devinfo, inst, hw_type); \
+} \
+ \
+static inline enum brw_reg_type \
+brw_inst_3src_a16_##reg##_type(const struct gen_device_info *devinfo, \
+ const brw_inst *inst) \
+{ \
+ unsigned hw_type = brw_inst_3src_a16_##reg##_hw_type(devinfo, inst); \
+ return brw_hw_3src_type_to_reg_type(devinfo, hw_type); \
+}
+
+REG_TYPE(dst)
+REG_TYPE(src)
+#undef REG_TYPE
+
/**
* Flow control instruction bits:
* @{
--
2.13.5
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