[Mesa-dev] [PATCH] nir/spirv: add support for chain access with different index bit sizes

[Jason Ekstrand]

On August 28, 2017 1:18:33 AM Samuel Iglesias Gonsálvez 
<siglesias at igalia.com> wrote:

> Fixes dEQP-VK.spirv_assembly.instruction.*.indexing.*
>
> Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
> ---
>  src/compiler/spirv/vtn_variables.c | 31 +++++++++++++++++++++++++++++--
>  1 file changed, 29 insertions(+), 2 deletions(-)
>
> diff --git a/src/compiler/spirv/vtn_variables.c 
> b/src/compiler/spirv/vtn_variables.c
> index 4432e72e54..c86f7d5c3a 100644
> --- a/src/compiler/spirv/vtn_variables.c
> +++ b/src/compiler/spirv/vtn_variables.c
> @@ -104,8 +104,20 @@ vtn_access_link_as_ssa(struct vtn_builder *b, struct 
> vtn_access_link link,
>     } else if (stride == 1) {
>        return vtn_ssa_value(b, link.id)->def;
>     } else {
> -      return nir_imul(&b->nb, vtn_ssa_value(b, link.id)->def,
> -                              nir_imm_int(&b->nb, stride));
> +      nir_ssa_def *src0 = vtn_ssa_value(b, link.id)->def;
> +      nir_ssa_def *src1;
> +      switch (src0->bit_size) {
> +      case 64:
> +         src1 = nir_imm_int64(&b->nb, stride);

There are lots of places in NIR that assume UBO/SSBO offsets and array 
indices are 32-bit.  It's probably safer to just force it to 32-bit instead 
of trying to support 64 for now.

> +         break;
> +      case 32:
> +         src1 = nir_imm_int(&b->nb, stride);
> +         break;
> +      default:
> +         unreachable("Type not supported");
> +      }
> +
> +      return nir_imul(&b->nb, src0, src1);
>     }
>  }
>
> @@ -189,6 +201,21 @@ vtn_ssa_offset_pointer_dereference(struct vtn_builder *b,
>        case GLSL_TYPE_ARRAY: {
>           nir_ssa_def *elem_offset =
>              vtn_access_link_as_ssa(b, deref_chain->link[idx], type->stride);
> +         if (elem_offset->bit_size != offset->bit_size) {
> +            switch (elem_offset->bit_size) {
> +            case 64:
> +               offset = nir_i2i64(&b->nb, offset);
> +               break;
> +            case 32:
> +               offset = nir_i2i32(&b->nb, offset);
> +               break;
> +            case 16:
> +               offset = nir_i2i16(&b->nb, offset);
> +               break;
> +            default:
> +               unreachable("Type not supported");
> +            }
> +         }
>           offset = nir_iadd(&b->nb, offset, elem_offset);
>           type = type->array_element;
>           break;
> --
> 2.14.1
>
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