[Mesa-dev] [PATCH 7/7] radeonsi: enable STD430 packing of UBOs by default

[Marek Olšák]

On Tue, Aug 22, 2017 at 2:14 PM, Timothy Arceri <tarceri at itsqueeze.com> wrote:
> Before this change we were defaulting to STD140 which is slightly
> less efficient at packing arrays.
> ---
>  src/gallium/drivers/radeonsi/si_pipe.c | 2 +-
>  src/mesa/state_tracker/st_context.c    | 3 +++
>  2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
> index 1d1db02c76..b41a6f5ce7 100644
> --- a/src/gallium/drivers/radeonsi/si_pipe.c
> +++ b/src/gallium/drivers/radeonsi/si_pipe.c
> @@ -522,20 +522,21 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
>         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
>         case PIPE_CAP_DOUBLES:
>         case PIPE_CAP_TGSI_TEX_TXF_LZ:
>         case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
>         case PIPE_CAP_BINDLESS_TEXTURE:
>         case PIPE_CAP_QUERY_TIMESTAMP:
>         case PIPE_CAP_QUERY_TIME_ELAPSED:
>         case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
>         case PIPE_CAP_QUERY_SO_OVERFLOW:
>         case PIPE_CAP_MEMOBJ:
> +       case PIPE_CAP_LOAD_CONSTBUF:
>                 return 1;
>
>         case PIPE_CAP_INT64:
>         case PIPE_CAP_INT64_DIVMOD:
>         case PIPE_CAP_TGSI_CLOCK:
>         case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
>         case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
>                 return 1;
>
>         case PIPE_CAP_TGSI_VOTE:
> @@ -611,21 +612,20 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
>         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
>         case PIPE_CAP_VERTEXID_NOBASE:
>         case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
>         case PIPE_CAP_MAX_WINDOW_RECTANGLES:
>         case PIPE_CAP_NATIVE_FENCE_FD:
>         case PIPE_CAP_TGSI_FS_FBFETCH:
>         case PIPE_CAP_TGSI_MUL_ZERO_WINS:
>         case PIPE_CAP_UMA:
>         case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
>         case PIPE_CAP_POST_DEPTH_COVERAGE:
> -       case PIPE_CAP_LOAD_CONSTBUF:
>                 return 0;
>
>         case PIPE_CAP_QUERY_BUFFER_OBJECT:
>                 return si_have_tgsi_compute(sscreen);
>
>         case PIPE_CAP_DRAW_PARAMETERS:
>         case PIPE_CAP_MULTI_DRAW_INDIRECT:
>         case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
>                 return sscreen->has_draw_indirect_multi;
>
> diff --git a/src/mesa/state_tracker/st_context.c b/src/mesa/state_tracker/st_context.c
> index ef2e73e741..bd990fc34a 100644
> --- a/src/mesa/state_tracker/st_context.c
> +++ b/src/mesa/state_tracker/st_context.c
> @@ -367,20 +367,23 @@ st_create_context_priv( struct gl_context *ctx, struct pipe_context *pipe,
>
>     /* Need these flags:
>      */
>     ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
>
>     ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
>
>     if (no_error)
>        ctx->Const.ContextFlags |= GL_CONTEXT_FLAG_NO_ERROR_BIT_KHR;
>
> +   ctx->Const.UseSTD430AsDefaultPacking =
> +      screen->get_param(screen, PIPE_CAP_LOAD_CONSTBUF);
> +

This st/mesa change should be a separate patch. Also, ctx->Const is
typically initialized in st_extensions.c and CAPs are also checked
mostly there. If you split this patch into two, you can add my Rb to
both IF you initialize ctx->Const... in st_extensions.c.

Other than that, for patches 1-3, 5-6:

Reviewed-by: Marek Olšák <marek.olsak at amd.com>

I commented on patch 4.

Marek