[Mesa-dev] [PATCH v4 21/44] i965/fs: Use byte scattered read for 16-bit load_ssbo

[Jason Ekstrand]

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

On Wed, Nov 29, 2017 at 6:50 PM, Jose Maria Casanova Crespo <
jmcasanova at igalia.com> wrote:

> Used to enable 16-bit reads at do_untyped_vector_read, that is used on
> the following intrinsics:
>
>    * nir_intrinsic_load_shared
>    * nir_intrinsic_load_ssbo
>
> v2: Removed use of stride = 2 on 16-bit sources (Jason Ekstrand)
>
> v3: - Add bitsize to scattered read operation (Jason Ekstrand)
>     - Remove implementation of 16-bit UBO read from this patch.
>     - Avoid assertion at opt_algebraic caused by ADD of two IMM with
>       offset with BRW_REGISTER_TYPE_UD type found on matrix tests.
>       (Jose Maria Casanova)
> ---
>  src/intel/compiler/brw_fs_nir.cpp | 13 ++++++++++++-
>  1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/src/intel/compiler/brw_fs_nir.cpp
> b/src/intel/compiler/brw_fs_nir.cpp
> index ff04e2468b..726b2fcee7 100644
> --- a/src/intel/compiler/brw_fs_nir.cpp
> +++ b/src/intel/compiler/brw_fs_nir.cpp
> @@ -2353,6 +2353,18 @@ do_untyped_vector_read(const fs_builder &bld,
>
>           bld.ADD(read_offset, read_offset, brw_imm_ud(16));
>        }
> +   } else if (type_sz(dest.type) == 2) {
>

You could make this "if (type_sz(dest.type) <= 2)" and put it at the
beginning of the ladder.


> +      fs_reg read_offset = bld.vgrf(BRW_REGISTER_TYPE_UD);
> +      bld.MOV(read_offset, offset_reg);
> +      for (unsigned i = 0; i < num_components; i++) {
> +         fs_reg read_reg = emit_byte_scattered_read(bld, surf_index,
> read_offset,
> +                                                    1 /* dims */,
> +                                                    1,
> +                                                    16 /*bit_size */,
>

and just make this type_sz(dest.type) * 8


> +                                                    BRW_PREDICATE_NONE);
> +         bld.MOV(offset(dest,bld,i), subscript(read_reg, dest.type, 0));
> +         bld.ADD(read_offset, read_offset, brw_imm_ud(type_sz(dest.type))
> );
> +      }
>     } else {
>        unreachable("Unsupported type");
>     }
> @@ -3929,7 +3941,6 @@ fs_visitor::nir_emit_intrinsic(const fs_builder
> &bld, nir_intrinsic_instr *instr
>        if (const_offset == NULL) {
>           fs_reg base_offset = retype(get_nir_src(instr->src[1]),
>                                       BRW_REGISTER_TYPE_UD);
> -
>

Spurrious change


>           for (int i = 0; i < instr->num_components; i++)
>              VARYING_PULL_CONSTANT_LOAD(bld, offset(dest, bld, i),
> surf_index,
>                                         base_offset, i *
> type_sz(dest.type));
> --
> 2.14.3
>
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